ADLINK Technology PCI-7200 Manuale utente
PCI-7200 / cPCI-7200
12MB/S High Speed
Digital Input/ Output Card
@Copyright 1999 ADLink Technology Inc.
All Rights Reserved.
Manual Rev. 2.10: September 16, 1999
The information in this document is subject to change without prior notice in order
to improve reliability, design and function and does not represent a commitment
on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special, incidental,
or consequential damages arising out of the use or inability to use the product or
documentation, even if advised of the possibility of such damages.
This document contains proprietary information protected by copyright. All rights
are reserved. No part of this manual may be reproduced by any mechanical,
electronic, or other means in any form without prior written permission of the
manufacturer.
Trademarks
PCI-7200 and cPCI-7200 are registered trademarks of ADLink Technology Inc.,
Other product names mentioned herein are used for identification purposes only
and may be trademarks and/or registered trademarks of their respective
companies.
Contents •• i
CONTENTS
CONTENTS .......................................................i
How to Use This Guide........................................ v
CHAPTER 1 Introduction................................... 1
1.1 Applications......................................................................2
1.2 Features.............................................................................2
1.3 Specifications....................................................................3
CHAPTER 2 Installation.................................... 5
2.1 What You Have..................................................................5
2.2 Unpacking .........................................................................6
2.3 Device Driver Installation for Windows 95.......................6
2.4 PCI-7200’s Layout.............................................................8
2.5 PCI-7200 Installation Outline..........................................10
2.5.1 Hardware configuration .........................................10
2.5.2 Slot selection..........................................................10
2.5.3 Installation Procedure............................................10
2.5.4 Running the 7200UTIL.EXE....................................11
2.6 Connector Pin Assignment ............................................11
2.6.1 PCI-7200 Pin Assignment.......................................11
2.6.2 cPCI-7200 Pin Assignment.....................................13
2.7 8254 for Timer Pacer Generation....................................13
CHAPTER 3 Register Structure & Format....... 15
3.1 I/O Registers Format.......................................................15
3.2 Digital Input Register (BASE + 10) .................................16
3.3 Digital Output Register (BASE + 14)...............................16
3.4 DIO Status & Control Register (BASE + 18)...................17
3.5 Interrupt Status & Control Register (BASE + 1C) ..........19
ii •• Contents
CHAPTER 4 Operation Theorem ..................... 23
4.1 Direct Program Control ......................................................23
4.2 Timer Pacer Mode...............................................................24
4.3 External Trigger..................................................................26
4.4 Handshaking.......................................................................27
4.5 Timing Characteristic.........................................................29
CHAPTER 5 C/C++ & DLL Libraries................. 33
5.1 Installation.......................................................................33
5.1.1 Installation..............................................................33
5.2 Running Testing Utility (7200UTIL.EXE) ........................35
5.3 Software Driver Naming Convention..............................36
5.4 _7200_Initial ....................................................................36
5.5 _7200_Switch_Card_No..................................................38
5.6 _7200_AUX_DI.................................................................39
5.7 _7200_AUX_DI_Channel.................................................40
5.8 _7200_AUX_DO...............................................................41
5.9 _7200_AUX_DO_Channel ...............................................42
5.10 _7200_DI..........................................................................43
5.11 _7200_DI_Channel ..........................................................44
5.12 _7200_DO ........................................................................45
5.13 _7200_DO_Channel.........................................................46
5.14 _7200_Alloc_DMA_Mem .................................................47
5.15 _7200_Free_DMA_Mem...................................................49
5.16 _7200_Alloc_DBDMA_Mem ............................................50
5.17 _7200_Free_DBDMA_Mem..............................................51
5.18 _7200_DI_DMA_Start ......................................................52
5.19 _7200_DI_DMA_Status....................................................56
5.20 _7200_DI_DMA_Stop.......................................................57
5.21 _7200_DblBufferMode.....................................................58
5.22 _7200_CheckHalfReady..................................................59
5.23 _7200_DblBufferTransfer................................................60
5.24 _7200_GetOverrunStatus................................................61
5.25 _7200_DO_DMA_Start.....................................................62
Contents •• iii
5.26 _7200_DO_DMA_Status..................................................64
5.27 _7200_DO_DMA_Stop.....................................................65
5.28 _7200_DI_Timer...............................................................66
5.29 _7200_DO_Timer.............................................................68
CHAPTER 6 Double Buffer Mode Principle...... 71
CHAPTER 7 Limitation.................................... 73
Appendix A. 8254 Programmable Interval Timer ..
.................................................... 75
A.1 The Intel (NEC) 8254........................................................75
A.2 The Control Byte.............................................................76
A.3 Mode Definition...............................................................77
Product Warranty/Service ................................. 81
How to Use This Manual •• v
How to Use This Guide
This manual is designed to help you use the PCI-7200 and cPCI-7200.
The functionality of PCI-7200 and cPCI-7200 are the same except that
cPCI-7200 has 4 auxiliary digital input and output. Therefore, the “PCI-
7200” represents both PCI-7200 and cPCI-7200 if not specified.
The manual describes how to modify various settings on the PCI-7200
card to meet your requirements. It is divided into seven chapters:
•Chapter 1, "Introduction," gives an overview of the
productfeatures, applications, and specifications.
•Chapter 2, "Installation," describes how to install the PCI-7200.
The layout of PCI-7200 is shown, and the installation
procedures, pin assignment of connectors, and timer pacer
generation are specified.
•Chapter 3, "Register Structure & Format," describes the low-
level register structure and format of the PCI-7200.
•Chapter 4, "Operation Theorem," describes how the PCI-7200
works.
•Chapter 5, "C/C++ & DLL Library," describes the high level C
and DLL library functions. It will help you to programming in
DOS, Win 3.11, and Win-95 environments.
•Chapter 6, "Double Buffer Mode Principle," describes the data
buffer for double-buffered DMA DI operation.
•Chapter 7, "Limitation," describes three limitations on using
PCI-7200.
•Appendix A, "8254 Programmable Interval Timer“, describes
the detailed structure and register format.
Introduction •• 1
1
Introduction
The PCI-7200/cPCI-7200 is PCI/CompactPCI form factor high speed
digital I/O card, it consists of 32 digital input channels, and 32 digital
output channels. High performance designs and the state-of-the-art
technology make this card to be ideal for high speed digital input and
output applications.
The PCI-7200 performs high-speed data transfers using bus mastering
DMA via 32-bit PCI bus architecture. The maximum data transfer rates
can be up to 12MB per second. It is very suitable for interface between
high speed peripherals and your computer system.
Several different digital I/O operation modes are supported:
1. Direct Program Control: the digital inputs and outputs can be
accessed and controlled by its corresponding I/O ports directly.
2. Timer Pacer Mode: the digital input and output operations are
handled by internal timer pacer clock and transferred by bus mastering
DMA.
3. External Clock Mode: the digital input operations are handled by
external input strobe signal (I_REQ) and transferred by bus mastering
DMA.
4. Handshaking: through REQ signal and ACK signal, the digital I/O
data can have simple handshaking data transfer.
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