ARP ODYSSEY Manuale utente

ARPODYSSEY

SERVICE

MANUAL

MODELS

2800

THROUGH

2823

SECTION

1

1.1

Introduction

This

service

manual

is

divided

into

three

major

sections:

А)

Circuit

Descriptions,

B)

Trim

Pro-

cedures,

and

C)

Board

Test

Points.

The

circuit

descriptions

should

be

consulted

when

a

problem

is

suspected

in

a

particular

area

of

the

instrument.

The

trim

procedures

should

be

used

to

verify

cali-

brations

or

when

a

component

has

been

changed.

The

board

test

points

are

a

quick

reference

to

verify

circuits

with

suspected

problems

and

should

be

checked

whenever

a

problem

has

been

identified.

1.2

Board

Identification

Three

types

of

Odyssey

models

have

been

produced:

1)

2800,

2)

2810-2815

апа

3)

2820-2823.

The

model

and

serial

number

are

located

at

the

rear

or

bottom

of

the

Odyssey

chassis.

Except

for

2800,

a

typical

number

might

read:

2813-0490.

For

model

2800,

the

first

two

digits

of

the

serial

number

denote

the

model,

such

as:

28490.

Listed

below

are

the

board

identification

numbers

for

each

model;

they

will

be

referenced

in

the

service

manual

by

model

number

for

easy

identification.

ODYSSEY-|

Model

2800

Board:

A-1

B-1

C-1

PWR

SUP-1

ODYSSEY-II

Model

2810-2813

Model

2820-2823

Board:

A-II

Board:

A-IH

(with

PPC)

B-II B-II

C-I

С-ІІ

PWR

5ОР-ІІ

PWR

5ОР-ІІ

Note:

Some

Odyssey-2

models

employ

the

older

style

Board

В-І.

1.3

Model

Changes

The

Odyssey

has

undergone

major

cosmetic

and

electrical

changes

since

its

original

production

in

1972,

however,

the

functional

capabilities

have

remained

virtually

unchanged.

The

following

are

the

most

noticeable

physical

differences

among

models:

PRELIMINARY

INFORMATION

MODEL

2800

Black

and

white

face

panel

(some

later

models

have

black

and

gold

face

panels).

Pitch

Bend

knob

No

Factory

installed

interface

jacks.

Wrap

around

vinyl

bottom

cover.

MODEL

2810-2813

Black

and

gold

face

panel.

New

style

power

switch.

Factory

installed

interface

jacks:

Pitch

Bend

knob.

(Some

later

models

have

PPC.)

Wrap

around

vinyl

bottom

cover.

MODEL

2820-2823

(current

model,

Odyssey

'78)

Black

and

orange

face

panel:

Steel

chassis

Leather

endblocks

PPC

The

major

electrical

changes

found

in

the

Odyssey-ll

ὁ

as

compared

to

the

Odyssey-l

are:

1.

Uses

24db/octave

filter

in

place

of

12db/

octave.

2.

Improved

VCO

design

for

better

tracking;

and

stability.

3.

Improved

power

supply

regulation.

4.

Improved

keyboard

current

source

for

CV

generation.

5.

Improved

S/H

memory

circuit

design.

1.4

Revisions/Changes

1.4.1

MODIFICATION

KITS

The

following

modifications

are

available

from

the

Factory

for

updating

older

style

Odysseys:

Modification

For

Model

Kit

No.

Interface

Jacks

2800

6800101

PPC

2810-2815

6800301

PPC

2800

6800501

1.4.2

KEYBOARD

CONVERSION

The

Odyssey-ll

is

designed

to

be

used

with

а

two

bus

keyboard.

When

an

Odyssey-ll

is

used

with

a

three

bus

keyboard,

an

interface

board

is

inserted

on

the

molex

pins

on

Board

Α-ἱ

to

make

the

keyboard

compatible

with

the

electronics.

Illustrated

below

are

the

two

types

of

keyboards

employed

in

the

Odyssey

and

their

schematics.

TWO

BUS

KEYBOARD

Models

2810-2813

(Later

models

use

cat-whisker

style

shown

in

maintenance

section

6.2.

Schematic

remains

the

same.)

KYBD

LO

4

99

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WEYS

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KEYS

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IN

1.4.3

TYPES

OF

VOLTAGE

CONTROLLED

FILTERS

The

4023

voltage

controlled

filter

is

no

longer

avail-

able

from

the

Factory.

Instead,

the

newer

4075

filter

can

be

used

to

replace

the

4023

with

the

following

modification

(see

Field

Change

Notice

007):

The

earlier

model

Odyssey-lls

used

a

4035

voltage

controlled

filter,

which

has

since

then

been

replaced

by

the

4075.

Мо

modifications

are

necessary

when

replacing

a

4035

filter

with

a

4075.

"THREE

BUS

KEYBOARD

GATE

TRIGGER

ον

KYBD

LO

KYBD

HI

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cv

sus󰾰

اا

4

+15

8

XX

=

1

GROUND

267

\

IIl

5

е

7

——

O

TRIG

BUS

#———

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GATE

BUS

r

<

ш

з

v

a

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е

9

5

a

ІМІЕНЬУСЕ

ВО"

VIOLET

A

change

R1,2,&

3

to

680K

Change

T4

to

100

ohm

trimmer

Ж

=

Break

connection

1.4.4

NOISE

MODIFICATION

The

newer

style

Odysseys

use

a

zener

diode

as

a

noise

source

instead

of

a

noise

transistor.

Defective

noise

transistors

can

be

replaced

with

a

zener

diode,

pro-

vided

the

following

circuit

modification

is

performed:

Zener

diodes

tend

to

produce

a

greater

spectrum

of

white

noise

with

little

or

no

noise

break-up.

1.9

Specifications

Noise

Generator

Noise

spectrum

types:

White

and

Pink

Voltage

Controlled

Oscillators

Waveforms:

Sawtooth,

Square,

Pulse,

Dynamic

Pulse

Frequency

range:

VCO

1

іп

low

freq.

mode,

.2

Hz

to

20

Hz;

VCO

1

and

VCO

2

(audio

range),

20

Hz

to

20

KHz

Warm

up

drift:

1/30

semitone

from

turn

on

max.

Pulse

width:

5096

to

596

Pulse

width

modulation:

ADSR,

+45%;

ГЕО,

+15%

Voltage

controlled

response:

1V/oct.

Maximum

frequency

shifts:

LFO

sine

wave,

+1⁄2

oct.;

LFO

square

wave,

+1.5

oct.;

ADSR

+9oct.;

S/H

*2

oct.

Note:

VCO

1

is

a

low

note

priority;

VCO

2

is

high

note

priority

Transpose

Positions:

Down

2

octaves,

normal,

up

2

octaves

Pitch

Bend

Frequency

shift:

About

+

1

oct.

(exactly

1

octave

on

Odyssey-2)

PPC

Frequency

shift:

About

5

semitones

+1

semitone.

Portamento

.

Maximum

speed:

About

.01

msec./oct.

Minimum

speed:

About

1.5

seconds/oct.

Ring

Modulator

Type:

Digital

Input

signals:

VCO

1

and

VCO

2

pulse

waves

ud

REMOVE

|

O.O

гмеоте

Cn

ws

Voltage

Controlled

Filter

Type:

Low

pass

Frequency

range:

16

Hz

to

16

KHz

Maximum

usable

Q:

30

Resonance

1⁄2

to

self

oscillate

Voltage

controlled

response:

1V/oct.

Voltage

Controlled

Amplifier

Dynamic

Range:

80dB

Sample

and

Hold

Command

sources:

Sampled

signals:

VCO

1

square

wave

and

sawtooth

wave,

VCO

2

square

wave

and

pink

noise

Keyboard

or

LFO

trigger

ADSR

Envelope

Generator

Attack

time:

5

msec.

to

5

seconds

Decay

time:

10

msec.

to

8

seconds

Sustain

level:

O

to

10096

of

peak

Release

time:

15

msec.

to

10

seconds

AR

Envelope

Generator

Attack

time:

5

msec.

to

5

seconds

Release

time:

10

msec.

to

8

seconds

Audio

Outputs

High

level:

2.5VPP

max.;

100K

impedance

Low

level:

.25VPP

max.;

10K

impedance

Interface

Jacks

Keyboard

CV

IN/OUT:

1V/oct.

Gate

OUT:

+10V,

key

down;

OV

all

keys

up

Gate

IN:

+8V

minimum

Trigger

OUT:

+10\/

pulse

on

key

depression,

10

microsec.

duration

Trigger

IN:

+8V

pulse

min.,

10

microsec.

duration

minimum

External

Audio

Input:

500

millivolts

for

full

output

9)

Front

and

Back

Panel

Configuration

Model

2823

HC

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ASSEMBLY/DISSASSEMBLY

MODEL

2800

:

2815

MODEL

2820

-

2823

Ф

NOTE:

These

two

screws

MUST

be

replaced

in

ые

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SECTION

2

CIRCUIT

DESCRIPTIONS

(Board

А-1)

2.1.1

Trigger

Circuit

Each

key

on

the

keyboard

has

its

own

capacitor-

resistor-diode

network.

The

capacitors

are

normally

charged

to

+15

volts

until

a

key

is

depressed

at

which

time

the

capacitor

discharges

through

the

diode

creating

a

trigger

pulse

on

the

trigger

bus

rod.

Q1

through

O4

are

a

monostable

multivibrator

which

delays

the

trigger

pulses

15

milliseconds

to

allow

the

gate

and

CV

to

stabilize.

2.1.2

PITCH

BEND

P1,

the

pitch

bend

control,

supplies

a

control

voltage

to

both

VCOs

on

Board

B.

CR4

and

СНБ

create

a

'dead'

zone

when

the

control

is

centered.

2.1.3.

CURRENT

SOURCE

Q5

supplies

constant

current

to

a

resistor

divider

chain

made

up

of

thirty-six

100

ohm

resistors

con-

nected

in

series,

The

CV

contacts

are

located

at

the

junction

of

each

of

the

100

ohm

resistors

to

supply

a

specific

voltage

to

the

contro!

voltage

memory

when

a

key

is

depressed.

There

is

a

three

volt

drop

across

the

entire

resistor

chain,

or

one

volt

per

octave.

T1,

the

Volts/Octave

trimmer,

adjusts

the

current

through

the

resistor

chain

to

produce

the

correct

voltage

drop

across

the

keyboard.

2.1.4.

TRANSPOSE

SWITCH

Half

of

the

transpose

switch

is

connected

to

the

bottom

end

of

the

resistor

chain

to,

in

effect,

add

two

or

four

octaves

worth

of

resistance

(about

1200

or

2400

ohms)

to

the

resistor

chain.

This

raises

the

control

voltage

level

supplied

to

the

CV

memory.

The

following

chart

summarizes

the

CV

output

for

low

'C'

and

high

'C'

on

the

keyboard

for

each

of

the

transpose

switch

positions:

TRANSPOSE

SWITCH:

DOWN

2

OCT.

NORMAL

UP

2

OCT.

The

remaining

half

of

the

transpose

switch

com-

pensates

the

second

voice

control

voltage

for

the

difference

in

the

resistor

chain

resistance.

2.1.5

CV

Memory

Circuit

Об

апа

АЛА

are

a

FET

input

op

amp

which

buffers

the

voltage

from

the

keyboard

CV

bus

and

supplies

it

to

the

memory

circuit

through

R23

and

CR3.

When

a

key

is

depressed,

+15

volts

is

supplied

from

the

keyboard

gate

through

CR2

and

R21

which

reverse

biases

CR3

and

allows

Q7

to

conduct.

The

control

voltage

from

A1A

is

then

allowed

to

charge

the

memory

capacitor,

C8.

When

a

key

is

released,

Q7

turns

off

to

prevent

СВ

from

discharging.

О8

and

A1B

are

a

FET

op

amp

which

buffers

the

control

voltage

on

C8

and

supplies

it

to

the

control

input

of

VCO

1

and

VCO

2

on

Board

B

and

to

the

VCF

on

Board

C.

2.1.6

Second

Voice

CV

Generator

When

two

or

more

keys

are

depressed,

a

section

of

the

resistor

chain

is

effectively

shorted

out

which

drops

the

voltage

at

the

top

end

of

the

resistor

chain.

This

voltage

drop

corresponds

to

the

‘voltage

dif-

ference’

between

two

held

keys.

A2A

is

a

unity

gain

buffer

which

monitors

the

voltage

at

the

top

of

the

resistor

chain

and

supplies

it

to

A2B.

A2B

sums

the

voltage

from

А2А

with

the

voltage

supplied

by

R31

and

R30.

These

resistors

are

selected

to

produce

zero

volts

on

the

output

of

A2B

when

either

no

keys

or

one

key

is

depressed.

When

two

or

more

keys

are

depressed,

the

voltage

at

the

top

end

of

the

resistor

chain

drops,

which,

in

turn,

decreases

the

voltage

supplied

to

228.

228

then

supplies

the

difference

voltage

to

the

control

input

of

VCO

2

where

it is

summed

with

the

control

voltage

from

the

CV

memory

circuit.

This

summation

allows

VCO

2

to

be

controlled

by

the

highest

key

depressed.

Since

VCO

1

is

fed the

con-

trol

voltage

from

the

CV

memory

only,

its

pitch

is

controlled

by

the

lowest

key

depressed.

2.1.7

Noise

Generator

The

noise

generator

circuit

produces

10VPP

white

and

pink

noise

signals

which

are

supplied

to

the

VCF

audio

input

and

the

S/H

mixer.

The

noise

is

obtained

by

amplifying

a

reversed

biased

transistor

junction

(Q9)

in

avalanche

breakdown.

Q9

is

a

transistor

selected

for

optimum

avalanche

characteristics;

and

therefore,

has

good

noise

producing

capability.

A3

amplifies

and

clips

the

noise

signal.

АЗ

filters

the

noise

to

provide

pink

noise

to

the

VCF

and

S/H.

CIRCUIT

DESCRIPTIONS

(Board

B-

1)

2.2.1

Sample

&

Hold

(S/H)

The

sample

and

hold

circuit

provides

a

DC

voltage

output

by

sampling

and

storing

the

instantaneous

voltage

level

of

signals

on

its

input

each time

a

trigger

pulse

is

provided.

This

stored

voltage

is

held

until

the

pulse

occurs.

Signals

which

are

to

be

sampled

and

applied

to

3

of

A3.

A3

is

an

op-

erational

transconductance

amplifier

(OTA),

which

is

used

as

a

gated

voltage

follower:

when

a

pulse

is

applied

to

5

of

Z3,

capacitor

C7

charges

to

the

voltage

level

on

3.

This

voltage

level

is

held

until

another

pulse

is

applied

to

5.

ОЗ

buffers

the

voltage

on

C7

and

supplies

it

to

A2B

through

the

lag

slider

(P16).

A2B

is

a

unity

gain

buffer.

The

sample

and

hold

output

is

supplied

to

the

control

inputs

of

VCO

1

and

УСО2

and

to

the

УСЕ

on

Board

С.

2.2.2

Low

Frequency

Oscillator

(LFO)

The

LFO

produces

a

triangle

and

square

wave

output

in

a

frequency

range

from

about

.1

Hz

to

25

Hz.

Z1A

and

C3

are

an

integrator

which

charges

from

current

passing

through

R11.

218

is

а

hysteretic

switch

whose

output

switches

from

-15

volts

to

+15

volts

when

the

output

of

Z1A

reaches

+5

volts.

This

then

reverses

the

direction

of

current

through

R11

and

the

rate

control

(Z5)

and

thus

the

direction

of

integration

at

the

output

of

Z1A.

When

the

output

of

Z1A

reaches

-5

volts,

the

output

of

Z1B

switches

back

to

-15

volts

and

the

cycle

repeats.

An

LFO

reset

pulse

is

supplied

from

the

keyboard

every

time

a

key

is

depressed.

O1

and

Q2

are

turned

on

momentarily

by

the

keyboard

trigger

pulse

to

discharge

the

integrating

capacitor

(C3)

thus

reini-

tializing

the

LFO

to

zero.

2.2.3

Voltage

Controlled

Oscillators

(VCO)

Oscillator

circuit

(VCO

1

&

2):

Control

voltages

from

the

keyboard,

initial

frequency

and

fine

tune

sliders,

pitch

bend

(2800

only)

and

both

FM

input

sliders

are

summed

on

the

base

of

O4.

O4

and

Q5

are

a

linear

voltage

to

exponential

current

generator;

for

every

volt

applied

from

the

keyboard,

the

current

through

Q5

will

double.

C12

is

the

integrating

capacitor;

it

is

initially

charged

to

+15

volts

and

discharges

through

R51

and

Q5

toward

ground.

Q5

determines

the

discharge

time

of

the

capacitor

and

therefore

the

period

of

oscillation.

Z1D

is

a

CMOS

nand

gate

used

as

a

comparator.

When

the

voltage

on

12

of

210

falls

below

“7,5

volts,

the

output

of

Z1

(pin

11)

changes

from

zero

volts

to

+15

volts

which

turns

on

Q10,

О7

and

Об.

Об

recharges

the

integrating

capacitor

(C12)

to

+15

volts

to

start

the

cycle

over

again.

Q8

buffers

the

sawtooth

wave

on

C12

and

supplies

it

to

the

sawtooth

to

pulse

converter

and

09,

the

output

emitter

follower.

The

oscillator

circuit

for

VCO

2

is

the

same

as

VCO

1.

When

the

‘SYNC’

switch

is

on,

the

reset

pulse

from

VCO

1

is

applied

to

Z2D

which

causes

VCO

2

to

reset

at

the

same

time

as

VCO

1,

regardless

of

the

voltage

level

on

12

of

Z2D.

The

waveform

on

the

output

of

VCO

2

is

then

synchronized

with

VCO

1.

Sawtooth

to

square

wave

converter:

Z1A

and

Z1B

are

a

R-S

flip-flop

with

8

used

as

a

comparator.

The

reset

pulse

from

Z1C

is

supplied

to

1

and

the

sawtooth

wave

to

8.

Аз

the

sawtooth

wave

is

raised

above

the

zero

reference

by

the

pulse

width

trimmer

and

sliders

(T2,

P8

and

P9)

the

flip-flop

will

change

state

on

a

different

point

of

the

sawtooth

slope

resulting

in

a

different

pulse

width.

With

all

of

the

pulse

width

sliders

on

the

front

panel

at

mini-

mum,

the

pulse

wave

should

be

square

(5096

duty

cycle).

The

pulse

wave

output

is

supplied

to

the

audio

input

of

the

VCF

on

Board

C

and

to

the

ring

modulator

circuit

on

Board

B.

2.2.4

Ring

Modulator

The

ring

modulator

utilizes

two

CMOS

nand

gates

(218

and

228)

and

O18

in

an

exclusive

‘or’

functior.

Square

waves

from

VCO

1

and

VCO

2

are

supplied

to

5

of

Z1

and

Z2

and

the

output

is

taken

from

the

emitter

of

O18.

GATE

TRUTH

TABLES

AND

GATE

B

C

XCLUSIVE

OR

VCO

2

|

ΠΗΓΗ

ΠῚ

RING

MODULATOR

OUTPUT

2.3.1

Voltage

Controlled

Filter

(УСЕ)

Audio

signals

from

both

VCOs,

the

ring

modulator,

and

the

noise

generator

are

applied

to

the

audio

input

of

the

voltage

controlled

filter

(pin

1,

4023)

through

C1.

Control

voltage

from

the

S/H,

LFO,

KYBD

CV,

and

the

envelope

generators

are

summed

and

inverted

by

А1.

The

control

input

of

the

МСЕ

accepts

negative

going

control

voltages;

as

the

voltage

on

3

of

the

4023

module

is

decreased,

the

filter

cutoff

increases.

Signals

on

the

output

of

the

VCF

(pin

10)

are

fed

back

to

the

resonance

input

(pin

2)

via

the

resonance

slider,

(P2).

2.3.2

Voltage

Controlled

Amplifier

(VCA)

Audio

signals

from

the

VCF

are

processed

through

the

high

pass

filter

(C3,

R13

and

P3)

and

connected

to

the

noninverting

input

of

A3.

A3

is

an

operational

transconductance

amplifier

(OTA)

whose

gain

is

a

function

of

the

current

supplied

to

5.

Control

voltages

from

the

two

envelope

generators

and

the

УСА

gain

slider

are

connected

to

Q1

which

supplies

current

to

the

OTA.

T2,

the

control

reject

trimmer,

balances

the

inputs

of

the

OTA

to

minimize

the

effect

of

control

voltages

on

the

audio

output

of

the

VCA.

2.3.3

AR

Envelope

Generator

The

Attack-Release

envelope

generator

produces

a

control

voltage

with

variable

rise

and

fall

times.

Itis

used

to

control

the

VCF

or

the

VCA.

When

a

gate

voltage

is

supplied

by

the

keyboard

or

the

LFO

through

510,

Q4

turns

on

which

charges

capacitor

C7

through

P5,

R32

and

CR5.

The

position

of

P5

(Attack

Slider)

determines

the

time

C7

takes

to

charge

up.

When

the

gate

voltage

is

removed,

Q4

turns

off

which

allows

Q5

to

turn

on.

The

voltage

on

C7

then

discharges

through

CR6,

P6,

R31,

and Q5.

P6

(Release

slider)

sets

the

release

time.

Q6

and

Q7

buffer

the

voltage

on

C7

and

supply

it

to

the

VCA

and

VCF.

2.3.4

ADSR

Envelope

Generator

The

Attack-Decay-Sustain-Release

envelope

generator

produces

a

control

voltage

with

variable

rise

and

fall

times.

It

is

used

to

control

the

VCF

or

the

VCA

and

a

gate

and

trigger

signal

must

be

supplied

from

the

keyboard

or

LFO

to

start

the

ADSR

voltage

rising.

Attack:

When

a

gate

signal

(+10

volts)

is

supplied

through

S8,

Q8,

09

and

010

turn

on

which

then

allows

O16

to

turn

off.

With

Q16

off,

a

trigger

applied

through

C9

and

R55

will

momentarily

turn

CIRCUIT

DESCRIPTIONS

(Board

C-

1)

TRIGGER

ATTACK

LI

AR

OUTPUT

ADSR

OUTPUT

SUSTAIN

KEY

DOWN

NOTE:

The

ADSR

is

initiated

with

a

gate

and

trigger

volt-

age,

and

the

AR

envelope

requires

only

the

gate.

оп

О18

and

017.

017

then

supplies

+15

volts

through

CR18,

CR19,

CR17

and

R57

to

hold

Q18

on.

018

and

017

(the

attack

latch)

now

supplies

+15

volts

through

the

attack

slider

(P4),

R43,

and

CR9

and

charges

up

the

integrating

capacitor,

C8.

012,

013,

and

014

buffer

the

voltage

оп

C8

апа

provides

it

to

the

VCA

and

МСЕ.

Q15

is

the

peak

detector

which

monitors

the

output

of

the

ADSR.

When

the

ADSR

voltage

reaches

its

maximum,

(about

*10

volts),

Q15

will

turn

on

and

provide

this

voltage

to

the

base

ої

Q16

through

CR15.

016

then

grounds

out

the

voltage

on

the

base

of

018

to

unlatch

018

and

Q17

and

end

the

attack

portion

of

the

ADSR

cycle.

Decay

&

Sustain:

When

the

attack

portion

of

the

ADSR

cycle

has

completed,

the

voltage

on

C8

is

allowed

to

discharge

through

CR11,

R47,

and

the

decay

slider

(P15)

to

the

emitter

of

Q11.

The

sustain

slider

(P16)

sets

the

voltage

level

on

the

base

of

O11.

When

the

voltage

level

on

the

emitter

of

O11

falls

below

the

level

on

the

base,

Q11

turns

off

and

prevents

the

voltage

on

O8

from

discharging

further.

Release:

When

the

gate

is

removed,

the

remaining

voltage

оп

C8

is

discharged

to

ground

through

CR

10,

R44

and

the

release

slider

(P17).

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