Crown XLS 1000 Series Manuale utente
XLS1000 – 2500
Service Manual
142195-1 4/10
XLS3 Tech Support.doc
XLS-3 MENU:
The XLS main menu structure communicates functionalit of the amplifier in terms
of its input routing (MODE), filter selection (FILTER), and frequenc of the filter
(FREQ)…when available.
MODE: Amplifier audio routing.
STEREO: Channel 1 input to Channel 1 output, Channel 2 input to Channel 2
output.
BRID E: Channel 1 input to Channel 1, with the inverted Channel 1 input to
Channel 2. B taking the two positive outputs of the amplifier, twice the output
voltage (twice the power) is realized. In BRIDGE mode, Crossover (XOVER)
filters are not allowed since the same audio is required for both output channels.
INPUT Y: Channel 1 input to both Channel 1 and Channel 2’s processing and
output. Switching occurs pre-pot and pre-filter.
FILTER: Audio filtering.
BYPASS: Both channels are full spectrum audio (20Hz – 20KHz). In BYPASS
mode, no FREQ choice is allowed.
LOWPASS: Both channels are 4
th
order Linkwitz-Rile filters with frequenc
breakpoint determined b the FREQ choice.
HI HPASS: Both channels are 4
th
order Linkwitz-Rile filters with frequenc
breakpoint determined b the FREQ choice.
XOVER: When XOVER is selected, the MODE choice is automaticall changed
to INPUT Y. Channel 1 is fed to both channels’ processing with Channel 1 being
Lowpass and Channel 2 being Highpass. The crossover frequenc is determined
b the FREQ choice.
CLIP COMPRESSOR: Allows the clip compressor for each channel to be either
turned on or off. The Clip compressor is a proprietar algorithm that limits clipping
on a real-time basis.
DIA NOSTIC MENU:
A set of diagnostic menus can be accessed at an time b pushing all three menu
buttons at the same time. The amplifier continues to pass audio, but the diagnostic
menus are displa ed until the MODE/MENU button is pushed and normal amplifier
functionalit returns.
MODEL & VOLTA E TYPE: Displa s the Model and voltage t pe.
POWER SUPPLY TEMP & LOW VOLTA E RAIL: Displa s the Power
Suppl Heatsink Temperature and the Low Voltage rail (in volts).
AMPLIFIER CHANNEL TEMP: Displa s the heatsink temperature for the power
devices of each channel.
HI H VOLTA E RAILS: Indicates the Amplifier voltage rails, Positive (VP) and
Negative (VN).
FIRMWARE VERSION: Shows the firmware version.
FAULT STATUS: Indicates the latest fault that the amplifier has had and the
number of instances of that fault. Refer to the Error Codes section for specific
Fault/Error codes.
ERROR CODES:
The amplifier’s processor runs through a series of Power On Self Tests (POST) when
the amplifier is first powered up. If the processor encounters an error, it will
communicate the error via the front panel Thermal LED’s.
These error codes are unique and based upon a Major and Minor element. The Major
element is determined b which portion of the amplifier failed POST, while the
Minor portion is which part of the Major element failed. The are displa ed b CH1
Thermal LED = MAJOR, CH2 Thermal LED = MINOR. The MAJOR is blinked 1
st
,
then the MINOR.
MAJOR MINOR
ERROR COMMENT
0 1 Processor POST Fail Internal MCU error (PLL, etc)
0 2 Processor Assert Fail Something catastrophic in the
firmware.
0 3 Processor Watchdog Fail Firmware error where
watchdog timeout has not
been attended.
0 4 Power Fail Power Sequencing of the
Power Suppl has failed.
1 1 LCD POST Fail Initialization of LCD failed
1 2 LCD Communications Fail MCU unable to communicate
with LCD. Can occur
an time as opposed to POST
2 1 DSP Boot Fail MCU is unable to boot the
DSP via I2C
2 2 DSP POST Fail MCU was able to boot the
DSP, but not able to
communicate and control.
2 3 DSP Communications Fail Can happen an time. Would
have been found via Boot or
POST failure if full time I2C
problem
3 1 RUBY POST Fail Unable to communicate with
Rub on amplifier board
initiall .
3 2 RUBY Communications Fail I2C communications failure
for some reason. Not caught
at POST
3 3 RUBY ADC Sensor Fail An illegal ADC value was
encountered b MCA via
Rub
4 1 MFGTEST Result B te Failure APM’s MFGTEST b te
indicates test failure or not
tested.
4 2 MFGTEST GPIO Comm Fail APM is unable to
communicate with the MFG
Test fixture’s I2C GPIO
registers.
4 3 MFGTEST ADC Comm Fail APM is unable to
communicate with the MFG
Test fixture’s I2C ADC
registers.
CHASSIS LEVEL SELF-TEST:
This test is used to ensure the functionalit of the LCD, Buttons, and Fan once the
amplifier is assembled. The self-test is initiated b holding down the PREVIOUS
(middle) button during power up. The amplifier enters a test mode where all of the
front panel LED’s except the SPI indicators are lit. Additionall , the fan is at full
speed and the LCD indicates which of the three front panel buttons are pushed. Once
all three buttons have been pushed and released, the test completes and the amplifier
returns to normal operation.
APM SECTION THEORY OF OPERATION
ANALO INPUTS:
The input to the APM can accept 1.4Vrms input and drive the resultant APM output
to a level that drives the amplifier to full rated power into 8Ω. The differential analog
inputs come from J700 which connects to the MAIN board of the amplifier. The
input XLR, ¼”, and RCA connectors tie directl to this point on the MAIN board.
The following will be for CH2, with CH1 being identical except for the analog Y
input switch (U601).
U600-A,B form a differential to single ended gain stage with a gain of -3.54dB. See
Gain Block Diagrams below. The output of U600B drives the input of U601, which
is a unit gain amplifier that selects either the ‘A’ input (CH2) or ‘B’ input (CH1)
dependent upon the INPUT_Y drive from the microprocessor (Q600 to U601-1).
U601 provides the Input Y audio routing. The output of U601 drives front panel pot
R610 that feeds single ended amplifier section U600-C. This stage has a maximum
gain of +13.86dB as shown.
For CH2, the output of U601-5,6 drives a comparator, U700-B, that lights the front
panel SPI LED when the input signal is >-40dBu. R600/601 provides the DC bias
that provides the comparator reference point. For CH1, the input to the SPI indicator
comes from U500-7.
U600-D acts as a unit gain inverter that creates a differential signal (+6dB gain) to
feed the attenuator for either the TI DSP’s ADC (XLS1000) or Cirrus Codec
(XLS1500, 2000, 2500). For the XLS1000, R618-619, R621-623 form a voltage
divider and bias network into the TI DSP (CH2±_DSP_AD). In the case of the
XLS1500 – 2500, R613-614, R617, R620 form the voltage divider and bias network
into the Cirrus codec (CH2±_AD).
As ou can see, the major difference between the XLS1000 and XLS1500 – 2500
APM’s resides in the use of an external Cirrus Codec (U702) for the larger amplifiers.
This results in ~4dB better S/N, but at an additional cost of $2.
ANALO OUTPUTS:
The output of the APM is driven b a differential gain stage (U701-C,D) that receives
its input from the DAC. In the case of the XLS1000, the DAC resides within the TI
DSP (CH2±_DSP_DA), while in the case of the XLS1500 – 2500, the DAC is part of
the Cirrus codec (CH2±_DA). This gain stage matches the output of the DAC to the
amplifier’s input requirement of 5.66Vrms to drive the amplifier’s output to full rated
power.
DI ITAL PROCESSIN :
The TAS3202 is an integrated converter and DSP that provides all of our signal
processing at an affordable cost. The IC is powered from +3.3V and uses ~200mA.
Clock eneration:
The amplifier runs from a single clock that is generated b the TAS3202 (U703)
using the 24.576MHz cr stal, Y700. This clock is divided b 2 internall b the
DSP and sent to the microprocessor (MCLK_UP) and Cirrus codec
(MCLK_CODEC). The fundamental clock is divided internall in the DSP to
768KHz and sent to Divide-b -2 (U704-B) to provide differential 384KHz to the
MAIN board’s Rub PWM IC and the 384KHz is then divided b U704-A to
provide 192KHz to the MAIN SMPS via J700.
Digital Audio:
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