EKF CompactPCI SC5-FESTIVAL Manuale utente

User Guide

SC5-FESTIVAL • CompactPCI ® Serial CPU Card

Intel®Mobile Workstation Processor XEON®E3 v6 Family

& 7th Generation Intel®Core™ Processor (Kaby Lake)

Document No. 8548 • Edition 14 • 22nd September 2020

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

Contents

AboutthisManual ........................................................... 5

EditionHistory......................................................... 5

RelatedDocuments ..................................................... 6

Nomenclature ......................................................... 6

TradeMarks .......................................................... 6

Legal Disclaimer - Liability Exclusion ......................................... 6

Standards ............................................................ 7

Overview............................................................. 8

TechnicalFeatures ........................................................... 9

FeatureSummary ...................................................... 9

PowerRequirements ................................................... 15

BlockDiagram........................................................ 16

TopViewComponentAssembly .......................................... 17

BottomViewComponentAssembly........................................ 18

Front Panel Connectors ................................................. 19

FrontPanelSwitches&Indicators ......................................... 19

On-Board Connectors & Sockets .......................................... 20

PinHeaders .......................................................... 20

Jumpers ............................................................ 20

Microprocessor ....................................................... 21

ThermalConsiderations ................................................. 22

MainMemory ........................................................ 23

GraphicsSubsystem ................................................... 24

LANSubsystem ....................................................... 25

SerialATAInterface(SATA) .............................................. 26

PCI Express®Interface .................................................. 27

UniversalSerialBus(USB) ............................................... 28

Utility Interfaces ...................................................... 29

Real-TimeClock....................................................... 30

SPIFlash ............................................................ 31

Reset............................................................... 32

Watchdog........................................................... 34

FrontPanelLEDs ...................................................... 35

PG(PowerGood)LED ............................................. 36

GP(GeneralPurpose)LED .......................................... 36

HD(HardDiskActivity)LED ......................................... 37

OT(ProcessorHot)LED ............................................ 37

MainPowerSupplyControl(PS_ON#) ...................................... 38

PowerSupplyStatus(PWR_FAIL#)......................................... 38

MezzanineSideBoardOptions ........................................... 39

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

CompactPCI®Serial .................................................... 48

SystemSlotController............................................. 48

PeripheralSlotOperation .......................................... 54

BoardHot-Plug.................................................. 54

SupplementaryInformation ........................................ 55

InstallingandReplacingComponents............................................ 56

BeforeYouBegin...................................................... 56

InstallingtheBoard .................................................... 57

RemovingtheBoard ................................................... 58

EMCRecommendations................................................. 59

ReplacementoftheBattery .............................................. 60

TechnicalReference ......................................................... 61

LocalPCIDevices ...................................................... 61

Local SMB/I2CDevices .................................................. 62

Hardware Monitor NCT7491 ............................................. 63

BoardControlandStatusRegisters(BCSR) ................................... 64

Write/ReadControlRegister0 ....................................... 65

Read/ClearStatusRegister0 ........................................ 66

Read/ClearStatusRegister1 ........................................ 67

ReadPLDRevisionRegister ......................................... 68

GPIOUsage.......................................................... 69

GPIO Usage CM238 PCH ........................................... 69

ConfigurationJumpers ................................................. 74

Loading UEFI/BIOS Setup Defaults/IEEE 1588 Pulse per Second (J-GP) ......... 74

ManufacturerModeJumper(J-MFG) ................................. 75

RTCReset(J-RTC) ................................................ 76

Connectors .......................................................... 77

Front Panel Connectors ............................................ 78

DisplayPort Connectors ...................................... 79

USB Connectors ............................................ 80

Ethernet Connectors ........................................ 81

Mezzanine Connectors ............................................ 82

P-HSE1 .................................................. 86

P-HSE2 .................................................. 87

P-EXP.................................................... 88

PinHeaders&Debug ............................................. 89

FrontPanelHandleMicroswitchHeaderP-FPH ..................... 89

PLDProgrammingHeaderP-ISP ................................ 90

ProcessorDebugHeaderP-XDP ................................ 91

CompactPCI®Serial Backplane Connectors P1 - P6 ....................... 92

MechanicalDetails ................................................... 101

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

About this Manual

This manual describes the technical aspects of the SC5-FESTIVAL, required for installation and system

integration. It is intended for the experienced user only.

Edition History

Ed. Contents/Changes Author Date

1 User Manual SC5-FESTIVAL, english, preliminary edition (formal structure and

some content), Text #8548, File: sc5_ug.wpd

gn 2017-06-07

2 Updated Processor Info and local PCI Device Table; updated section “Hardware

Monitor NCT7491"

gn 2017-08-01

2.1 Added photos S40-NVME & S80-P6 jj 3 August 2017

2.2 Added photos S80-P6 with M.2 NVMe loaded jj 21 August 2017

2.3 Added illustrations 1+4 slots backplane resources jj 23 August 2017

2.4 Added photos S20-NVME jj 6 October 2017

2.5 Added MTBF jj 9 October 2017

3.0 Added SCZ-NVM side card photos, added AMT to table 'Feature Summary' jj 3 November 2017

3.1 Added photos S82-P6 jj 25 July 2018

4 Added Power requirements gn 2018-08-03

5 Backplane resources - PCIe root port numbers added jj 9 August 2018

5.1 Mixup fixed regarding memory speed, added links to SCL & S82 mezzanines jj 25 September 2018

6 Photos showing SC5-FESTIVAL w. S40-NVME mezzanine updated to S40 PCB

rev.1

jj 8 October 2018

6.1 Added photos showing SC5-FESTIVAL w. SCL-RHYTHM side card jj 23 October 2018

7 Corrected title of CompactPCI Serial Backplane Connectors tables gn 2019-04-03

8 Added Power requirements SC5-440D gn 2019-08-30

8.1 Added sample custom backplane illustration for optimized PCIe usage jj 14 October 2019

9 Added CPCI Hot-Plug UEFI Settings, added Coin Cell Error handling gn 2020-01-13

10 Added tolerable high voltage level on TTL inputs of expansion connectors gn 2020-01-24

11 Added P01-M12 (8HP mezzanine, photo) jj 27 January 2020

12 Added mechanical details (mezzanine connector & mounting hole positions) jj 29 April 2020

13 PCIe Link width configurable via BIOS setup (HSE2 mezzanine connector) jj 17 July 2020

14 Corrected wrong pinout of backplane I2C in section “Local SMB/I2C Devices” gn 2020-09-22

Please note: If an EKF product was labelled with this special sign according to ISO 7010 M002, please

contact [email protected] for availability of additional documentation which may be important for proper

usage.

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

Related Documents

Related Information SC5-FESTIVAL

SC5-FESTIVAL Home www.ekf.com/s/sc5/sc5.html

SC5-FESTIVAL Product Information www.ekf.com/s/sc5/sc5_pi.pdf

Nomenclature

Signal names used herein with an attached '#' designate active low lines.

Trade Marks

Some terms used herein are property of their respective owners, e.g.

<XEON®, Core™: ®Intel

<CompactPCI, CompactPCI PlusIO, CompactPCI Serial: ®PICMG

<Windows: ®Microsoft

<EKF, ekf system: ®EKF

EKF does not claim this list to be complete.

Legal Disclaimer - Liability Exclusion

This manual has been edited as carefully as possible. We apologize for any potential mistake.

Information provided herein is designated exclusively to the proficient user (system integrator,

engineer). EKF can accept no responsibility for any damage caused by the use of this manual.

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

Standards

Reference Documents

Term Document Origin

CompactPCI®

Serial

CompactPCI Serial Specification, PICMG®CPCI-S.0 www.picmg.org

DisplayPort VESA DisplayPort Standard Version 1.2,

DisplayPort Alt Mode on USB Type-C

www.vesa.org

Ethernet IEEE Std 802.3

IEEE Std 1588-2008 Precision Time Protocol

standards.ieee.org

HD Audio High Definition Audio Specification Rev.1.0 www.intel.com

LPC Low Pin Count Interface Specification, Revision 1.1 www.intel.com

M.2 PCI Express M.2 Specification Revision 1.1 www.pcisig.com

NVMe NVM Express 1.2.1 specification www.nvmexpress.org

PCI Express®PCI Express®Base Specification 3.1 www.pcisig.com

SATA Serial ATA 3.0 & 3.1 Specification www.sata-io.org

TPM Trusted Platform Module 2.0 www.trustedcomputinggroup.org

UEFI Unified Extensible Firmware Interface

UEFI Specification Version 2.5,

ACPI Specification Version 6.0

www.uefi.org

USB Universal Serial Bus 3.0 Specification Rev.1.0,

Universal Serial Bus 3.1 Specification Rev.1.0,

Type-C Cable and Connector Specification Rev. 1.2,

Type-C Locking Connector Specification Rev. 1.0,

Universal Serial Bus Power Delivery Specification Rev. 3.0

www.usb.org

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

Overview

The SC5-FESTIVAL is a rich featured high

performance 4HP/3U CompactPCI®Serial CPU

board, equipped with an Intel®Xeon®E3 familiy

mobile workstation processor (Kaby Lake Halo

platform) for demanding applications. For

scalability, the SC5-FESTIVAL is also available

with a 7th Generation Intel®Core™ Kaby Lake

processor.

The SC5-FESTIVAL front panel is provided with

two Gigabit Ethernet jacks, two USB 3.0

receptacles, and two DisplayPort connectors. In

addition, up to two USB Type-C front panel

receptacles are available as an option, one of

them usable alternatively as (third) DisplayPort.

On-board mass-storage solutions are based on

low profile mezzanine expansion cards, which

accommodate up to two M.2 style SSD

modules. One of the M.2 sockets is suitable for

a fast NVMe (PCIe Gen3 x 4) module, and the

other for a low cost SATA type M.2.

The SC5-FESTIVAL is equipped with up to 32GB

DDR4 RAM with ECC support. Up to 16GB

memory-down are provided for rugged

applications, and another 16GB are available via

the DDR4 ECC SO-DIMM socket.

The powerful Xeon®E3-1500 v6 series

processor is accompanied by the CM238 mobile

PCH, for a maximum of high speed I/O

resources (e.g. PCI Express®, SATA, USB). Thus,

22 PCIe lanes are available for backplane use,

and up to 8 lanes for local mezzanine

expansion.

The SC5-FESTIVAL is provided with an on-board

SATA hardware RAID controller, enabling high-

capacity mass storage solutions across the

CompactPCI®Serial backplane.

As an option, up to eight Gigabit Ethernet Ports

are available via the backplane connector P6

(S80-P6 low profile mezzanine expansion card).

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

Technical Features

Feature Summary

General

<PICMG®CompactPCI®Serial (CPCI-S.0) CPU card

<Form factor single size Eurocard (board dimensions 100x160mm2)

<Mounting height 3U

<Front panel width 4HP (8HP/12HP assembly with optional mezzanine side card)

<Front panel I/O connectors for typical system configuration (2 x USB3, 2 x DisplayPort, 2 x GbE)

<Backplane communication via PCI Express®Gen3, SATA 6G, USB 3.0, Gigabit Ethernet

<Local mezzanine expansion option, COTS and custom specific boards

Processor

<Intel®Kaby Lake-H mobile platform with ECC (CM238 mobile workstation PCH)

<Intel®Xeon®processor E3 v6 family (mobile workstation)

<Xeon E3 1505M v6 P3/4GHz P8M P4C/8T PDDR4 2400 ECC P45/35W PGT2 - P630 PvPRO™/AMT

<Xeon E3 1505L v6 P2.2/3GHz P8M P4C/8T PDDR4 2400 ECC P25W PGT2 - P630 PvPRO™/AMT

Xeon E3 1501M v6

2.9/3.6GHz

4C/4T

DDR4 2400 ECC

45/35W

GT2 - P630

vPRO™/AMT

Xeon E3 1501L v6

2.1/2.9GHz

4C/4T

DDR4 2400 ECC

25W

GT2 - P630

vPRO™/AMT

<7th Generation Intel®Core™ mobile processor

<i3 7100E P2.9GHz P3M P2C/4T PDDR4 2400 ECC P35W PGT2 - 630

<i3 7102E P2.1GHz P3M P2C/4T PDDR4 2400 ECC P25W PGT2 -630

Firmware

<Phoenix®UEFI (Unified Extensible Firmware Interface) with CSM*

<Fully customizable by EKF

<Secure Boot and Measured Boot supported - meeting all demands as specified by Microsoft®

<Windows®, Linux and other (RT)OS' supported

<Intel®AMT supported for Intel®Xeon®E3 v6 (disabled by default, must be enabled via BIOS setup)

* CSM (Compatibility Support Module) emulates a legacy BIOS environment, which allows to boot a legacy operating system such

as DOS, 32-bit Windows and some RTOS'

User Guide • SC5-FESTIVAL • CompactPCI®Serial CPU Board

Feature Summary

Main Memory

<Integrated memory controller up to 32GB DDR4 2400 +ECC

<DDR4 +ECC soldered memory up to 16GB

<DDR4 +ECC SO-DIMM memory module socket up to 16GB

Performance Rating

<tbd

Graphics

<Integrated graphics engine, 3 symmetric independent displays

<3D HW acceleration DirectX12, OpenCL 2.x, OpenGL 4.4, ES 2.0

<HW video decode/encode HEVC10b 10-bit, VP9 10-bit, JPEG

<HDR (High Dynamic Range) Rec. 2020 Wide Color Gamut

<High-bandwidth Digital Content Protection (HDCP)

<UHD premium content playback

<Front panel options: Dual DisplayPort (DP) connectors

<3rd DisplayPort optional via Type-C connector on low profile mezzanine card

<Max resolution 4096 x 2304 @60Hz (any DisplayPort, concurrent operation)

<DisplayPort™ 1.2 Multi-Stream Transport (MST) - display daisy chaining

<MST max resolution via single DP connector 2880x1800@60Hz (2 displays), 2304x1440@60Hz (3 displays)

<Integrated audio (3 independent audio streams)

Networking

<Up to 10 networking interfaces in total - 2 x front RJ45 GbE, option 8 x backplane or 4 x M12-X front

<1000BASE-T, 100BASE-TX, 10BASE-T connections

<Front port 1 - I219LM with Intel®AMT support

<Front port 2 - Intel®I210-IT -40°C to +85°C operating temperature GbE NIC w. integrated PHY

<IPv4/IPv6 checksum offload, 9.5KB Jumbo Frame support, EEE Energy Efficient Ethernet

<IEEE 802.1Qav Audio-Video-Bridging (AVB) enhancements for time-sensivitive streams

<IEEE 1588 and 802.1AS packets hardware-based time stamping for high-precision time synchronization

<Backplane Gigabit Ethernet option w. S80-P6 mezzanine module - Marvell Peridot switch

<Backplane Gigabit Ethernet option w. S82-P6 mezzanine module - 4 x Intel®I210-IT NIC

<Option front panel M12 X-coded GbE ports with SCL-RHYTHM side card (8HP front panel width)

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