ELCODIS SD130ASM Manuale di installazione

07/13/06

Setup and Operating Instructions — SD130ASM Rev. G, Command Rev. 0.9

READ COMPLETELY BEFORE ATTEMPTING TO USE THIS EQUIPMENT.

SD130ASM Specifications —

DC input power: 7.5Vdc to 9.0Vdc ±5% @ 250mA, HD rate. Power supply ramp-up time <4ms. All device

supplies are regulated on-board.

Operating temperature range: 20°C, +30°C to –20°C (limited by crystal or oscillator module used)

RS-232 Command port: RS-232 standard levels for input and output. 9600 baud, 8 data bits, 1 stop bit, odd parity,

no flow control. Set the terminal or terminal emulator program to append a line feed after received carriage return

characters. Turn off local echo on terminal or terminal emulator program (The “Hyperterminal” program is

recommended).

TPG/BIST Crystal oscillator frequency: 27.000, 36.000, 54.000, 74.176 or 74.250MHz. Recommended operating

voltages are 3.3V and 5V, tolerance ±25ppm. The board is strapped for 5V operation and may be changed as

required. The optional oscillator XO1 is not supplied with the SD130ASM. A list of recommended manufacturers

and oscillators is given in the text.

Serial Data Outputs: SMPTE 259M or SMPTE 292M standard levels and impedances.

Parallel Video Data and Other Inputs and Outputs: See LMH0030 datasheet for drive levels and other

specifications. The SD130ASM has provision for user installed connectors at all inputs.

Reset Output (P2-3): Standard 3.3V HCMOS levels and drive.

SD130ASM Preliminary Setup —

Jumper Settings:

JP1 (Osc. Pwr.): This jumper is strapped for 5V operation. Cut the strap and solder a wire jumper from the center

via to the 3.3V via to change the voltage to 3.3V if required by the oscillator module being used. Note: Some

manufacturer’s 5V oscillators will give satisfactory performance when operated at 3.3V. Consult the oscillator

manufacturer for details. Though the LMH0030 has 5V-tolerant inputs, use of input signal swings greater than 3.3V

pk-pk for Vclk may cause increased serial data jitter due to increased substrate currents caused by input signal

excursions above the 3.3V supply or undershoot below the circuit ground reference.

JP2 (DCE/DTE): This jumper is strapped for this assembly to operate as RS232 Data Communications Equipment

(DCE), the normal mode when communicating with a PC serial port. To set the port to Data Terminal Equipment

(DTE) communications mode for other types of computer equipment or specific applications, cut the straps and

solder wire jumpers across the vias in the same direction as the DTE legend, i.e. both jumpers align parallel with the

legend DCE (default) or with DTE (optional).

Test Jumpers: Not used on this assembly.

IMPORTANT ! BIST and TPG Oscillator Installation and Operation —

The assembly is supplied with the BIST/TPG pre-enabled by jumper strapping. The jumper will be found

connecting I/O 7 to +3.3V on the top side at connector position P2. To use the Built-In Self-Test (BIST) capability

of the LMH0030 to test the SD130ASM or to use the LMH0030 in its Test Pattern Generator (TPG) mode, a crystal

oscillator of the correct frequency for the video mode desired must be installed at XO1. Provision is made for two

common DIL case sizes, 14-pin and 8-pin. It is suggested that a suitable socket or socket pins be installed at XO1 so

that different oscillators may be installed as required for the available rates and formats. Use 27MHz for SD, 36MHz

for wide-raster SD and 74.25 or 74.18MHz for HD. Set the power supply jumper JP1 as described above.

To use the assembly for normal parallel to serial video data conversion, disable the BIST/TPG operation by cutting

the strap between I/O 7 and +3.3V.

Operating Instructions SD130ASM Rev. G

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Caution! Do not attempt to use surface-mount oscillators with this board. Excessively noisy or poor quality

operation may result. If DIL packaged oscillators are not available, surface-mount oscillators should be mounted on

a surface-mount-to-DIL adapter that can be plugged (or soldered) into the board.

Manufacturers and oscillator types that have been tested in the SD130ASM are:

Connor-Winfield: HC15R8-27MHz, HC15R8-36MHz, AC51-74.25MHz, AC51-74.176MHz

Epson Electronics: SG-531PTJ-27.000MC, SG-531PTJ-36.000MC

When using BIST or TPG mode, control register 0Dh must be loaded with the code for the test pattern desired and

the TPG Enable bit must be set either by way of the control register bit or the Multi-function I/O port. See

LMH0030 datasheet for complete details.

DC Power Supply and Wiring—

It is strongly recommended that the power supply used to power this assembly have both voltage and current

limit setting capability. It should also have a DC output ON/OFF switch and DC output metering. A supply

such as the Agilent E3632A meets these requirements.

Attach suitable gauge wiring (#18 or 16AWG suggested) and connectors for supplying the regulated 7.5V to

9.0V±5% main power to the SD130ASM. Use of 0.25” spade type terminals is recommended. A crowbar diode is

provided to reduce possible damage to the SD130ASM in the event that main supply polarity is reversed when

connecting the SD130ASM to the power supply. In addition, the automotive-type regulators used in this design

provide additional fault protection. It is suggested that the power supply current limiting be set to 500mA.

RS-232 Command Port Communications —

The SD130ASM is supplied with the RS-232 port configured to operate with standard IBM-PC/AT 9-pin serial

ports. PC serial ports are configured as DTE. The SD130ASM is therefore configured as DCE (like a modem, for

example). A suitable 9-pin serial port extension or modem cable may be used to connect the SD130ASM to the PC.

Other control devices such as dumb terminals may also be used to communicate with the SD130ASM. Consult the

equipment manual for the required communication settings as DTE or DCE. Dumb terminals are commonly DTE.

The port uses RS-232 standard levels for input and output. 9600 baud, 8 data bits, 1 stop bit, odd parity, no flow

control. Set the terminal or terminal emulator program to append a line feed after received carriage return characters.

Turn off local echo on terminal or terminal emulator program (The “Hyperterminal” program is recommended).

Serial Data Outputs —

Attach the SD130ASM serial data outputs to external test and other equipment using suitable 75Ωcoaxial cables.

Terminate unused output in 75Ω. A Kings termination, part number 2555-3-32 (75Ω), is recommended for HD use.

Parallel Video, Clock, Ancilliary/Control Data and User Bus Inputs and Outputs —

Double-row pin (or socket) connectors may be installed at positions provided for P1 through P4. Connectors may be

installed either on the top or bottom side of the SD130ASM. These connectors together with suitable cabling

provide access to all necessary data inputs and outputs of the LMH0030. Consult the LMH0030 datasheet for details

of these inputs and outputs. Cable lengths should be as short as possible to minimize signal degradation due to

reflections and noise. Each input terminal is paired with a ground terminal. When ribbon or similar cable is used to

carry signals to or from the SD130ASM, signal conductors are automatically paired with a ground conductor. Due to

the wide variation of possible cabling schemes that may be used with the SD130ASM, termination resistors are not

installed. It is recommended that series termination of the proper value for the cable impedance used be employed at

the source end of the cable supplying signals to the SD130ASM. For example: The series termination value for

ribbon cable is 100 to 120Ω. The series termination for 50Ωcoaxial cable is 47 to 51Ω. For 75Ωcoax, the value is

75Ω.

NOTE: P4 serves as both the control port and ancilliary data port connection. The COP8 controller places its

outputs in tri-state when not communicating with the LMH0030. External equipment used to interface to the

Operating Instructions SD130ASM Rev. G

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Ancilliary/Control Data port must have tri-state-capable outputs. The outputs must be placed in tri-state when not

driving these lines. Otherwise, conflict with the COP8 outputs will result when it attempts to communicate with the

LMH0030. Conversely, attempts to access control information in the LMH0030 should not be made while using the

port to receive ancilliary data.

Reset Output —

The RESET on P2-3 is an output of the SD130ASM’s reset logic. It may be used to provide a reset signal to external

circuits or equipment. Output level and drive is standard 3.3V HCMOS.

SD130ASM Command Summary (Rev. 0.9)—

At reset or power-up, the COP8 toggles ACLK 3 times. This insures a proper reset of the LMH0030

Ancilliary/Control port (see device datasheet for details). Following command execution, the COP8 tri-states the

AD[9:0], ACLK, RD/WR(bar), ANC/CTRL(bar) lines. This allows other equipment to drive these inputs and

outputs.

NOTE: External equipment used to drive the aforementioned port and control lines must be capable of being placed

in tri-state when not being used to drive these lines. Otherwise, conflict with the COP8 outputs will result when it

attempts to communicate with these inputs or outputs.

Valid Control Commands —

The following commands are used with the LMH0030: Commands are case-sensitive and should be upper case only.

Wwhen received, begins the LMH0030 control register write sequence.

Rwhen received, begins the LMH0030 control register read sequence.

Pwhen received, continuously repeats the LMH0030 control register read sequence of the address last entered.

Iwhen received, begins the LMH0030 ANC FIFO insert sequence.

Mwhen received, begins the display of all LMH0030 registers on the terminal.

Lwhen received, clears all LMH0030 control registers (all writeable bits).

Kwhen received, toggles ACLK once.

%when preceding the next eight “0” or “1” characters indicates binary data follows.

Unused Commands

The following commands appear on the terminal display but are used only with the LMH0031:

X – Extract word from ancilliary FIFO

T – Extract all words from ancilliary FIFO

Z – CRC error polling command

W – Write to LMH0030 control registers

Following W, the next 2 valid characters entered are taken as the hexadecimal address to be written. The next 2

valid hexadecimal characters entered are taken as the data to be written. No termination (CR/LF) is needed. Entry of

the second valid data character initiates the write sequence.

Example: The character sequence W0B43 writes 43h to register 0Bh.

If a % character is received, the next eight “1” or “0” characters are taken as binary data to be written. No

termination (CR/LF) is needed. The eighth valid character initiates the write sequence.

Example: The character sequence W0B%01000011 writes 01000011b (43h) to register 0Bh.

Operating Instructions SD130ASM Rev. G

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Once the write mode is entered, the COP8 stays in write mode until ‘Enter’ or a R, X, M or L character is received.

Additional register addresses and data may be entered separated by the ‘space’ character. Therefore, a sequence such

as: W141B 151C 161D is valid and writes 1Bh to register 14h, 1Ch to register 15h and 1Dh to register 16h.

'Enter' terminates and exits the write command sequence.

R – Read from LMH0030 control registers

Following R, the next 2 valid characters entered are taken as the address to be read. No termination (CR/LF) is

needed. The second valid character entered initiates the read sequence. The COP8 responds with the hex value and

binary value read from the register addressed followed by a CR/LF character.

Once the read mode is entered, the COP8 stays in read mode until ‘Enter’ or a W, X, M or L character is received.

Example: The sequence: R14 15 16 is valid and reads from registers 14h, 15h and 16h. In this case, the COP8

responds with the sequence:

R14 1B 00011011

15 1C 00011100

16 1D 00011101

'Enter' terminates and exits the read command sequence.

P – Continuously rePeat reading from the last LMH0030 control register address entered

Following P, a read operation to the last control register address entered is continuously repeated. The results of the

read operations are sent to the terminal. This command is useful when monitoring dynamically updated registers and

bits like the H-V-F bits, CRC error registers or the format register.

I – Write to ANC FIFO for Insertion

The next 3 valid characters are taken as ANC DID, SDID and word count. Additional data words equal to that

specified by the word count follow. This data is loaded into the ANC FIFO and inserted into the serial data either

automatically or after the FIFO Insert Enable bit in the control registers is set.

M – Display all LMH0030 control registers

Displays all control register contents on the terminal.

L – Clear all LMH0030 control registers

Operating Instructions SD130ASM Rev. G

Page 4 of 4

Downloaded from Elcodis.com electronic components distributor

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