ESO STRAP Manuale utente

EUROPEAN SOUTHERN OBSERVATORY

Organisation Européenne pour des Recherches Astronomiques dans l'Hémisphère Austral

Europäische Organisation für astronomische Forschung in der südlichen Hemisphäre

VERY LARGE TELESCOPE

STRAP

Electronics Hardware Manual

Doc. No.:VLT-MAN-ESO-11670-1794

Issue: 1.0

Date: June 30, 2000

Prepared: R.Biasi, S.Moureau 30.05.00

.............................................................

Name Date Signature

Approved: D.Bonaccini,

R.Donaldson 29.06.00

.............................................................

Name Date Signature

Released: G.Monnet 04.07.00

.............................................................

Name Date Signature

VLT PROGRAMME * TELEPHONE: (089) 3 20 06-0 * FAX: (089) 3 20 23 62

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CHANGE RECORD

Issue Date Section/Page affected Reason/ Initiation/Remarks/ Changes Details

1.0 30.06’00 All First issue

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1. TABLE OF CONTENTS

1. TABLE OF CONTENTS.........................................................................................................................................3

2. DOCUMENTS AND ACRONYMS........................................................................................................................6

2.1 PURPOSE..............................................................................................................................................................6

2.2 APPLICABLE DOCUMENTS....................................................................................................................................6

2.3 APPLICABLE DRAWINGS.......................................................................................................................................7

2.4 LIST OF ACRONYMS.............................................................................................................................................7

3. OVERALL DESCRIPTION....................................................................................................................................8

3.1 GENERAL DESCRIPTION .......................................................................................................................................8

3.2 SENSOR UNIT.......................................................................................................................................................9

3.3 VMESTRAP UNIT............................................................................................................................................10

3.4 SUMMARY LIST OF STRAP FUNCTIONS AND CAPABILITIES................................................................................10

4. FUNCTIONAL UNITS..........................................................................................................................................12

4.1 STRAP SENSOR UNIT FUNCTIONALITY.............................................................................................................12

4.1.1 Sensor Unit functional blocks...................................................................................................................12

4.1.2 Current pulses signal conditioning (Active Quenching)...........................................................................12

4.1.3 Gating function.........................................................................................................................................13

4.1.4 Overcurrent protection.............................................................................................................................13

4.1.5 Permanent memory...................................................................................................................................14

4.1.6 Input-output interface...............................................................................................................................14

4.1.7 Diaphragm micro-motor controller..........................................................................................................14

4.1.8 Cooling circuit requirement......................................................................................................................16

4.1.9 Nitrogen gas flushing................................................................................................................................16

4.2 VMESTRAP CONTROL UNIT FUNCTIONALITY .................................................................................................17

4.2.1 VMESTRAP control unit functional blocks...............................................................................................17

4.2.2 Logic control unit .....................................................................................................................................17

4.2.3 High voltage unit ......................................................................................................................................21

4.2.4 Temperature control.................................................................................................................................22

4.2.5 Computational unit - DSP ........................................................................................................................23

4.2.6 Mirror outputs ..........................................................................................................................................23

4.2.7 Communication interfaces........................................................................................................................23

5. STRAP HARDWARE DESCRIPTION ...............................................................................................................25

5.1 STRAP SENSOR HEAD HARDWARE DESCRIPTION..............................................................................................25

5.1.1 Carrier board............................................................................................................................................26

5.1.2 AQC circuits board...................................................................................................................................26

5.1.3 Connection board .....................................................................................................................................26

5.2 VMESTRAP HARDWARE DESCRIPTION............................................................................................................26

5.2.1 DSP board ................................................................................................................................................27

5.2.2 High voltage and Thermal control board.................................................................................................27

5.2.3 Bridge boards assembly............................................................................................................................31

6. CONNECTIONS ....................................................................................................................................................32

6.1 STRAP SENSOR HEAD CONNECTIONS ...............................................................................................................32

6.2 VME STRAP CONTROL UNIT CONNECTIONS.....................................................................................................34

6.2.1 Front mounting option..............................................................................................................................36

6.2.2 Rear mounting option...............................................................................................................................39

6.2.3 Input/output signals specification............................................................................................................40

6.3 CABLES AND PIPING...........................................................................................................................................41

6.3.1 Cables from Sensor Housing to STRAP VME board................................................................................41

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6.3.2 Cable from Sensor Housing to MAC4 VME board...................................................................................41

6.3.3 Piping of coolant and N2..........................................................................................................................41

6.3.4 Input/output timing specification..............................................................................................................42

7. HARDWARE CONFIGURATION......................................................................................................................43

7.1 VME/SERIAL SELECTION ...................................................................................................................................43

7.2 VME SETTING ...................................................................................................................................................43

7.2.1 Interrupt vector configuration ..................................................................................................................44

7.2.2 Interrupt level configuration.....................................................................................................................44

7.2.3 VME base address configuration..............................................................................................................45

7.3 SERIAL INTERFACE SETTING ..............................................................................................................................45

7.4 MIRROR ANALOG OUTPUT RANGE CONFIGURATION ...........................................................................................45

7.5 DIP-SWITCHES CONFIGURATION EXAMPLE.........................................................................................................46

7.6 DIAPHRAGM MOTOR CONTROLLER SETTINGS ...................................................................................................46

8. TROUBLESHOOTING.........................................................................................................................................48

8.1 VME COMMUNICATION PROBLEMS ...................................................................................................................48

8.1.1 Serial communication problems ...............................................................................................................48

8.2 APDS’BIAS VOLTAGES......................................................................................................................................49

8.3 ANALOG MIRROR OUTPUTS ...............................................................................................................................49

8.4 COUNTERS’INPUTS............................................................................................................................................49

8.5 GATE FUNCTION ................................................................................................................................................50

8.6 THERMAL CONTROL...........................................................................................................................................50

9. MAINTENANCE....................................................................................................................................................51

9.1 REPLACEMENT OF THE QUAD-CELL SENSOR ON THE APD HEAD ASSEMBLY......................................................51

9.2 REPLACEMENT OF THE BOARDS ON THE APD HEAD ASSEMBLY ........................................................................51

9.3 REPLACEMENT OF THE BOARDS ON THE APD-DSP UNIT ...................................................................................53

9.3.1 Replacement of the Bridge boards assembly - front panel option............................................................53

9.3.2 Replacement of the Bridge boards assembly - rear panel option.............................................................54

9.3.3 Replacement of the DSP control board ....................................................................................................55

9.3.4 Replacement of the High Voltage and Thermal control board.................................................................55

10. TECHNICAL SPECIFICATIONS...................................................................................................................56

11. ELECTRICAL CIRCUIT DIAGRAMS ..........................................................................................................58

11.1 STRAP SENSOR UNIT CIRCUIT DIAGRAMS.........................................................................................................58

11.1.1 STRAP Sensor unit electronics part list....................................................................................................64

11.2 VMESTRAP BOARD CONTROL UNITCIRCUIT DIAGRAMS...................................................................................66

11.2.1 VMESTRAP board control unit electronics part list ................................................................................75

11.3 VMESTRAP CONTROL UNIT -BRIDGE...........................................................................................................78

11.3.1 VMESTRAP - Front Bridge circuit diagrams...........................................................................................78

11.3.2 VMESTRAP - Front Bridge - Electronics part list ...................................................................................83

11.3.3 VMESTRAP - Rear Bridge circuit diagrams............................................................................................84

11.3.4 VMESTRAP - Rear Bridge - Electronics part list.....................................................................................89

11.4 VMESTRAP -THERMAL CONTROL AND HIGH VOLTAGE CIRCUIT DIAGRAMS ......................................90

11.4.1 VMESTRAP - THERMAL CONTROL and HIGH VOLTAGE Electronics part list .................................95

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List of figure

FIGURE 1: STRAP ARCHITECTURE AND CONNECTIONS...........................................................................................................8

FIGURE 2: QUAD-CELL SENSOR GEOMETRY .........................................................................................................................9

FIGURE 3: STRAP SENSOR HEAD FUNCTIONAL BLOCKS ...................................................................................................12

FIGURE 4: STRAP DIAPHRAGM -MICRO-MOTOR AND ENCODER INTERNAL WIRING..........................................................16

FIGURE 5: VME STRAP CONTROL UNIT BLOCK SCHEME ..................................................................................................17

FIGURE 6: CONTROL TICK GENERATION LOGIC ..................................................................................................................18

FIGURE 7: PULSE COUNTERS LOGIC ...................................................................................................................................19

FIGURE 8: GATE SIGNAL TIMING........................................................................................................................................21

FIGURE 9: HIGH VOLTAGE UNIT BLOCK SCHEME................................................................................................................22

FIGURE 10: THERMAL CONTROL BLOCK SCHEME...............................................................................................................22

FIGURE 11 -STRAP SENSOR HEAD PHYSICAL LAYOUT .....................................................................................................25

FIGURE 12 -VME STRAP CONTROL UNIT PHYSICAL LAYOUT ..........................................................................................28

FIGURE 13 -STRAP DSP CONTROL BOARD ........................................................................................................................29

FIGURE 14: STRAP SENSOR HEAD REAR VIEW (CONNECTORS'SIDE).................................................................................32

FIGURE 15 :STRAP HEAD HOUSING ..................................................................................................................................34

FIGURE 16 :VME STRAP CONTROL UNIT CONNECTORS -FRONT PANEL OPTION...............................................................36

FIGURE 17 :VME STRAP CONTROL UNIT CONNECTORS -REAR PANEL OPTION.................................................................39

FIGURE 18 :DIGITAL MIRROR OUTPUT LATCH TIMING........................................................................................................42

FIGURE 19 :EXTERNAL SYNC SIGNAL TIMING ....................................................................................................................42

FIGURE 20 :DIAPHRAGM SERVO-DRIVE FUNCTION CABLE..................................................................................................47

FIGURE 21 -APD HEAD BOARDS ASSEMBLY.....................................................................................................................52

FIGURE 22 -VME STRAP CASE AND BOARDS ASSEMBLY -FRONT PANEL OPTION............................................................53

FIGURE 23 -VME STRAP CASE AND BOARDS ASSEMBLY -REAR PANEL OPTION..............................................................54

List of tables

TABLE 1-STRAP SENSOR HEAD CONNECTORS'PINOUT ...................................................................................................33

TABLE 2-VME STRAP CONTROL UNIT CONNECTORS (ALWAYS ON FRONT PANEL).........................................................35

TABLE 3-VME STRAP CONTROL UNIT CONNECTORS (FRONT OR REAR PANEL OPTION)..................................................38

TABLE 4-VMESTRAP CONTROL UNIT INPUT/OUTPUT FUNCTIONAL AND ELECTRICAL SPECIFICATIONS..........................40

TABLE 5-EXTERNAL SYNC SIGNAL TIMING SPECIFICATIONS.............................................................................................42

TABLE 6-VME STRAP HARDWARE CONFIGURATIONS ...................................................................................................43

TABLE 7-VME SETTING ON DIP-SWITCHES S2, S3 ...........................................................................................................43

TABLE 8-INTERRUPT VECTOR ASSIGNMENT .....................................................................................................................44

TABLE 9-INTERRUPT LEVEL ASSIGNMENT........................................................................................................................44

TABLE 10 -VME BASE ADDRESS ASSIGNMENT..................................................................................................................45

TABLE 11 -SERIAL COMMUNICATION SPEED SETTING .......................................................................................................45

TABLE 12 -MIRROR ANALOG OUTPUT RANGE SETTING .....................................................................................................45

TABLE 13 -DIP SWITCHES CONFIGURATION EXAMPLE.......................................................................................................46

TABLE 14 -DIAPHRAGM MOTOR SPEED LOOP SETTING ......................................................................................................46

TABLE 15 -DIAPHRAGM MOTION LOOP PARAMETER .........................................................................................................47

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2. Documents and Acronyms

2.1 Purpose

This document provides all the necessary information for the implementation and the operation of

the STRAP unit in a ESO VLT system.

This manual contains six major sections:

•Overall description

•Description of the functional units

•Description of the physical layout of the hardware

•Connections and System configuration

•Maintenance and troubleshooting

•Technical specifications and Schematics

2.2 Applicable documents

The following documents of the exact issue shown form part of this manual to the extent specified

herein. In the event of a conflict between the documents referenced herein and the contents of this

specification, the contents of this specification shall be considered as superseding requirements.

AD1 STRAP SW Driver User Manual, .: VLT-MAN-ESO-11670-1871, Issue 1.0, 16.12.1999

AD2 STRAP Interface Control Document, VLT-ICD-ESO-11670-0699, Issue 3.0, 20.04.00

AD3 APD overcurrent protection circuit design and test report, VLT-AOP-MGA-001

AD4 STRAP SW User Manual, VLT-MAN-ESO-11670-1870, Issue 2.0, 15.05.00

AD5 4 Channel DC servo-amplifier ESO-VME4SA-X1,VLT-MAN-ESO-17130-0273

AD6 ESO VME4SA Back plane, technical manual, VLT-MAN-ESO-17130-0274

AD7 MAC4-INC User and Software reference manuals (Version 4.2)

AD8 VLT Software CCS-LCU Configuration of VLT standard VME Boards,

VLT-MAN-ESO-17210-1358

AD9 STRAP Interface Control Document, VLT-ICD-ESO-11670-0699, Issue 3.0, 20.04.00

AD10 Electromagnetic compatibility and power quality specification Part 1: electromagnetic

environment of the VLT observatory and EMC levels of the power system;

VLT-SPE-ESO-10000-0002, issue 2, 11.03.92

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AD11 Electromagnetic compatibility and power quality specification Part 2: electromagnetic

disturbance emission and immunity limits of electric and electronic equipment;

VLT-SPE-ESO-10000-0003, issue 1, 05.02.92

AD12 STRAP Optomechanics HW manual

2.3 Applicable drawings

DWG 1 Adaptive Optics APD Quad-head sensor; mechanical assembly,

VLT-DWG-ESO-11670-0780-0000-1/2, rev. A 13.11.97

DWG 2 Adaptive Optics APD Quad-head sensor; interface drawing

VLT-DWG-ESO-11670-0780-0000-2/2

2.4 List of Acronyms

APD Avalanche Photo-Diodes

AQC Active Quenching Circuit

AT Auxiliary Telescope unit

DSP Digital Signal Processor

DWGxx Applicable Drawing # xx

EMC Electromagnetic Compatibility

ESO European Southern Observatory

FWHM Full Width at Half Maximum

HW Hardware

LCU Local Control Unit

M2 VLT secondary mirror unit

NGS Natural Guide Star, reference star for the tip-tilt servo-control

STRAP System for Tip-tilt Removal with Avalanche Photodiodes

SW Software

TCS Telescope Control System

UT Unit Telescope, VLT 8m telescope

VISA Very Large Telescope Interferometer Sub-Array

VLT Very Large Telescope

VLTI Very Large Telescope Interferometer

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3. Overall description

3.1 General description

The STRAP units are implemented into VLT instruments or VLT-sub-system (e.g: VLT and VLTI adaptive optics in

the Uts and Ats) for field stabilization, to remove the atmospheric and environmentally induced tilts.

STRAP is a self-contained system, which comes with its hardware and software interfaces, user,

operation and maintenance manuals. STRAP encompasses a photon-counting visible sensor, the

housekeeping and the loop control hardware/software. The input is a signal from a Natural Guide

Star (NGS) focussed on the sensor unit, the output is a command signal, optionally analog or

digital, which can drive most of the commercial steering mirrors drivers.

TCS

Fast

Steering Mirror

+ HV amplifiers

M2 Fast

Guiding

Tip-Tilt Loop

LAN

f/36 or slower beam

All cables to Sensor Head 15m max

optional LAN M2 control

Diaphragm

analog/

digital

HW Reset

STRAP Sensor Head

Workstation

filte

coolant

Diaphragm Control

External gating

External Clock

Figure 1: STRAP architecture and connections. The control of UT M2 (AT M6) via a dedicated LAN is optional. The

TIM board is optional. Only one channel of a MAC4 motor controller board is used for the STRAP field diaphragm.

External gating, clocking and hardware reset of VMESTRAP are possible. Mirror commands output can be analog or

digital.

STRAP as delivered consists of two separate units (Figure 1), with all interconnecting cables:

•the photon counting Sensor Unit

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•the VMESTRAP control board unit

The Sensor unit interacts with the VMESTRAP control board unit and one of the four channel of

a MAC4/INC-VME4SA for the control of the motorisd diaphragm .

The VMESTRAP board control unit interacts only with the CPU board of a LCU via the VME bus,

or via a serial link to a servicing PC.

The X,Y output commands of the VMESTRAP board to the mirror drivers are available as analog

signals and as digital formats.. It is also possible to drive the UT-M2 in fast guiding mode.

The VMESTRAP control board unit is inserted in a VME 19’–6HE rack with a CPU, a LAN

connection, an optional extra LAN connection to M2, a MAC4/INC motor controller , a VME4SA

DC motor servo-amplifier and an HP Workstation as console. Some or all of these boards may be

shared with an AO system such as MACAO, or with an associated instrument.

Note: The CPU board, the motion controller board, the DC servo-amplifier board and all necessary

power supply units, and associated cables are NOT part of STRAP delivery.

3.2 Sensor Unit

The sensor unit contains the integrated APD quad-cell mounted on a Peltier thermo-cooler, a cold

finger to off-load the heat, the integrated electronics for the active quenching/pulse generation and

for the APD protection. All the electronics are embedded in a dry Nitrogen atmosphere.

In the integrated APD quad-cell, the image of the guide star is focussed on a 2x2 lenslet array

crossing (Figure 2). Each lenslet makes an image of the pupil on the Slik APD sensor at its focal

plane.

Figure 2: Quad-cell sensor geometry

When the guide star is moving on the lenslet crossing, the illumination of the four pupils changes

but not their position on the APDs. The balancing of the four APD signals is the aim of the servo-

control. The APD response across its sensitive area is uniform.

The sensor head electronics transforms each photon detected into a pulse (RS485 level). The four

TTL signals of the quad-cell are transmitted to the VMESTRAP board. A motorised variable

aperture diaphragm is present to limit the sky background if necessary. The micro-motor and the

encoders are controlled by one channel of the MAC4/INC and VME4SA boards.

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3.3 VMESTRAP Unit

The DSP-based VMESTRAP control board is plugged into a VME rack at a distance not greater

than 20 meters (Maximum). The VMESTRAP unit controls the tip-tilt loop in real time, and

performs all the necessary housekeeping and data gathering for the diagnostics. The VMESTRAP

control unit dialogues with the CPU board of the same sub-rack through the VME bus (P1 only).

For diagnostic and setup purposes, the VMESTRAP control unit is also equipped with a RS232

serial output port which gives a similar access to the same servicing and diagnostic functions. ,The

VMESTRAP feedback commands to the steering mirror is performed via three possible ways:

through the VME bus , directly with two analog output signals or via two equivalent digital output

signals. The former is used to drive directly the UT M2 (AT M6) steering mirror via a dedicated

Ethernet LAN.

3.4 Summary list of STRAP functions and capabilities

Sensor unit:

•(1 inch) quad-cell integrated APD device - without optical fiber.

•APD breakdown voltages and dark counts stored on an E2PROM, together with the APD chip

in the sensor head unit.

•Electronic safety circuits to protect the APD from sustained overcounts or electronics failures.

•Temperature control of the APD dark counts, below 25cts/s at low flux regimes.

•Use “average” Slik diodes with 250 dark counts/sec, not specifically selected for low dark.

Motorised variable diaphragm to minimize the sky contribution at low NGS fluxes.

•No temperature gradients generated in the sensor area.

•Pressurised housing with dry nitrogen atmosphere, to avoid condensation on the High Voltage

electronic circuits.

VMESTRAP unit

•Real time control tip-tilt loop on custom DSP VMESTRAP board, connected with the APD

sensor unit

•Fourth order optimized digital filtering, for the tip and tilt channels.

•APD temperature loop. T can be set between 0 and -40°C to optimize the dark counts.

•After pulsing control via hold-off time selection.

•SW driver to interface to the VME Motorola PowerPC running VxWorks.

•Optional full PC control via RS232 serial link directly on the VMESTRAP board.

•Fast steering mirror output in analog and digital format, 6 programmable voltage ranges.

•Real time centroids and mirror command data streamed on the VME bus or the serial link.

•Real time APD counts data streamed on the VME bus or the serial link.

•Optional internal or external clocking.

•SW reset and HW external reset.

•SW/electronic gating of APDs at 10nsec response time.

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