Gainstrong Oolite V3.5 Manuale utente
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MT7628DAN Core Module
Oolite V3.5_Module _SPEC_EN
Specification Version V1.0.2
Author：James
June 12, 2018
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Revision
Date
Contents of Revision Change
Remark
1.0.0
2018-03-28
First release
James
1.0.1
2018-03-28
Update pictures
James
1.0.2
2018-03-28
Add Pins Map
James
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INTRODUCTION
Oolite V3.5 is powerful, reliable,easy to use and with
extremely small size(23.7mm x 23.7mm x 2.7mm).Low
power consumption so can use on IOT device.
MT7628DAN with 580/575 MHz MIPS 24KEc with 64
KB I-Cache and 32 KB D-Cache. WiFi: 2T2R 2.4 GHz With
300Mbps 802.11 b/g/n. MCM 64 Mbytes DDR2 KGD(Build in
MT7628DAN Chipset) .16MB SPI NOR Flash
ROM(8MB/16MB/32MB/64MB optional).
The MT7628DAN router-on-a-chip includes an 802.11n MAC and baseband, a 2.4 GHz
radio and FEM, a 575/580 MHz MIPS® 24K™ CPU core, a 5-port 10/100 fast ethernet switch.
The MT7628DAN includes everything needed to build an AP router from a single chip. The
embedded high performance CPU can process advanced applications effortlessly, such as
routing, security and VoIP. The MT7628DAN also includes a selection of interfaces to support
a variety of applications, such as a USB port for accessing external storage.
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FEATURES:
CPU: MT7628DAN with 580/575 MHz MIPS 24KEc
RAM: MCM 64 Mbytes DDR2 KGD(Build in MT7628DAN Chipset)
Flash: 16MBytes SPI NOR Flash ROM(8MB/16MB/32MB/64MB optional)
WiFi: SISO for 802.11b/g, MIMO for 802.11n20/n40.
GPIO: 37(total and share with), High-speed UART for console support
USB: 1 x USB 2.0 master interface, support USB hub extension
Ethernet Port : 5-port 10/100 FE PHY in Gateway Mode
Ethernet Port : 1-port 10/100 FE PHY in IOT Mode
Mini-Pcie: 1×Mini-PCIE interface
Antenna: 2 × IPEX external antenna(default) or use the stamp hole pins interface
UART(Debug): serial debugging interface has lead out.
Power supply voltage: 3.3V
Size: 23.7mm x 23.7mm x 2.7mm (without shield)
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FUNCTIONAL BLOCK DIAGRAM(MT7628DAN)
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PICTURES
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MECHANICAL
Length
Width
Height (without shield)
23.7mm
(Tolerance:±0.2mm)
23.7mm
(Tolerance:±0.2mm)
2.7mm
(Tolerance:±0.2mm)
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PIN DEFINITION
Pin
Name
Type
Description
1
GND
-
Exposed ground pad
2
SPI_CS1
O,IPD
SPI chip select1/GPIO#6
3
SPI_CLK
O,IPD
SPI clock/GPIO#7
4
SPI_MISO
I/O
SPI Master input/Slave output GPIO#9
5
SPI_MOSI
I/O,IPD
SPI Master output/Slave input GPIO#8
6
SPI_CS0
O
SPI chip select0/GPIO#10
7
GPIO#11
I/O,IPD
GPIO#11
8
UART_TXD0
O,IPD
UART0 Lite TXD/GPIO#12
9
UART_RXD0
I
UART0 Lite RXD/GPIO#13
10
3.3V
-
Supply voltage for digital blocks
11
MDI_RP_P0
A
10/100 PHY Port #0 RXN
12
MDI_RN_P0
A
10/100 PHY Port #0 RXP
13
MDI_TP_P0
A
10/100 PHY Port #0 TXN
14
MDI_TN_P0
A
10/100 PHY Port #0 TXP
15
GND
-
Exposed ground pad
16
MDI_TP_P1
A
SD-XC/eMMC/GPIO#14
17
MDI_TN_P1
A
SD-XC/eMMC/GPIO#15
Note:
IPD : Internal pull-down
IPU : Internal pull-up
I : Input
O : Output
IO : Bi-directional
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Pin
Name
Type
Description
18
MDI_RP_P1
A
SD-XC/eMMC/GPIO#16
19
MDI_RN_P1
A
SD-XC/eMMC/GPIO#17
20
GND
-
Exposed ground pad
21
MDI_RP_P2
A
SD-XC/eMMC/GPIO#18
22
MDI_RN_P2
A
SD-XC/eMMC/GPIO#19
23
MDI_TP_P2
A
SD-XC/eMMC/GPIO#20
24
MDI_TN_P2
A
SD-XC/eMMC/GPIO#21
25
MDI_TP_P3
A
SD-XC/eMMC/GPIO#22
26
MDI_TN_P3
A
SD-XC/eMMC/GPIO#23
27
MDI_RP_P3
A
SD-XC/eMMC/GPIO#24
28
MDI_RN_P3
A
SD-XC/eMMC/GPIO#25
29
MDI_RP_P4
A
SD-XC/eMMC/GPIO#26
30
MDI_RN_P4
A
SD-XC/eMMC/GPIO#27
31
MDI_TP_P4
A
SD-XC/eMMC/GPIO#28
32
MDI_TN_P4
A
SD-XC/eMMC/GPIO#29
33
GND
-
Exposed ground pad
34
USP_DP
I/O
USB port0 data pin Data+
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Pin
Name
Type
Description
35
USB_DN
I/O
USB port0 data pin Data-
36
GND
-
Exposed ground pad
37
3.3V
-
Supply voltage for digital blocks
38
3.3V
-
Supply voltage for digital blocks
39
3.3V
-
Supply voltage for digital blocks
40
GND
-
Exposed ground pad
41
WLED_N
O
WLAN Activity LED/GPIO#44
42
EPHY_LED0_N_JTDO
I/O
Port#0 activity LED/GPIO#43/JTAG_TDO
43
EPHY_LED1_N_JTDI
I/O
Port#1 activity LED/GPIO#42/JTAG_TDI
44
EPHY_LED2_N_JTMS
I/O
Port#2 activity LED/GPIO#41/JTAG_TMS
45
EPHY_LED3_N_JTCLK
I/O
Port#3 activity LED/GPIO#40/JTAG_CLK
46
EPHY_LED4_N_JTRST_N
I/O
Port#4 activity LED//GPIO#39/JTAG_TRST_N
47
GND
-
Exposed ground pads
48
PCIE_TXN0
I/O
PCIe0 differential transmit TX -
49
PCIE_TXP0
I/O
PCIe0 differential transmit TX +
50
PCIE_RXP0
I/O
PCIe0 differential transmit RX +
51
PCIE_RXN0
I/O
PCIe0 differential transmit TX -
Indice
