Introduction 2/56
netX 50 to netX 51/52 | Migration Guide
DOC120109MG05EN | Revision 5 | English | 2013-08 | Released | Public 2012-2013
Table of Contents
1Introduction.............................................................................................................................................3
1.1 Migration from netX 50 to netX 51/52............................................................................................3
1.2 List of Revisions.............................................................................................................................5
1.3 Terms, Abbreviations and Definitions............................................................................................5
1.3.1 netX Signal Description.....................................................................................................................6
1.4 Legal Notes..................................................................................................................................10
1.4.1 Copyright......................................................................................................................................... 10
1.4.2 Important Notes............................................................................................................................... 10
1.4.3 Exclusion of Liability........................................................................................................................ 11
1.4.4 Export.............................................................................................................................................. 11
2Comparison netX 50 with netX 51/52 .................................................................................................12
2.1 Overview ......................................................................................................................................12
2.1.1 Block Diagrams............................................................................................................................... 12
2.1.2 Key Features................................................................................................................................... 13
2.1.3 Enhancements of netX 51/52 against netX 50 ................................................................................ 14
3Package, Pinning, Pad Cells ...............................................................................................................15
3.1 netX 52.........................................................................................................................................15
3.1.1 netX 52 Package............................................................................................................................. 15
3.1.2 netX 52 Pinning............................................................................................................................... 16
3.2 Alternative Function at Host Interface..........................................................................................22
3.3 netX 51.........................................................................................................................................24
3.3.1 Differences in Pinning and Pad Cells .............................................................................................. 24
3.4 MMIO Signals...............................................................................................................................32
4General Changing ................................................................................................................................34
4.1 CPUs............................................................................................................................................34
4.1.1 Core CPU........................................................................................................................................ 34
4.1.2 Additional CPU................................................................................................................................ 34
4.2 Memory ........................................................................................................................................35
4.2.1 Layout.............................................................................................................................................. 35
4.3 Peripherals...................................................................................................................................36
4.4 Improved Memory Access Performance......................................................................................38
4.5 Activating 256 KByte as Dual-Port Memory and Detection of netX 51 or netX 52 Mode............39
4.6 Host Interface Modes...................................................................................................................40
4.7 Miscellaneous ..............................................................................................................................41
4.7.1 Operating Conditions....................................................................................................................... 41
4.7.2 Effects to existing Software............................................................................................................. 41
4.7.3 Effects to existing Development Tools ............................................................................................ 41
5Erratas...................................................................................................................................................42
5.1 Fixed Erratas of netX 50 ..............................................................................................................42
5.2 New Errata for netX 51 / 52..........................................................................................................43
5.2.1 SYS LED lights doesn’t light correctly during active Boot Loader.................................................... 43
5.2.2 Simultaneous Operation of SDRAM and parallel Flash Memory at the Memory Interface ..............44
6Design Examples..................................................................................................................................45
6.1 Design Example netX 51..............................................................................................................45
6.2 Design Example netX 52..............................................................................................................50
7Appendix...............................................................................................................................................55
7.1 List of Tables................................................................................................................................55
7.2 List of Figures...............................................................................................................................55
7.3 Contacts.......................................................................................................................................56
