Intel FPGA Manuale utente

Intel FPGA USB Download Cable

User Guide

UG-USB81204

2016.10.31

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Contents

1 Introduction to USB Download Cable............................................................................... 3

1.1 USB Download Cable Revision.................................................................................. 3

1.2 Supported Devices and Host Systems........................................................................3

2 Specifications for USB Download Cable............................................................................ 4

2.1 Block Diagram and Dimension.................................................................................. 4

2.2 Cable-to-Board Connection...................................................................................... 4

2.3 Pin Description....................................................................................................... 5

2.4 Operating Conditions...............................................................................................6

2.5 Power Requirements............................................................................................... 7

2.6 RoHS Compliance................................................................................................... 8

3 Using the USB Download Cable........................................................................................ 9

3.1 Installing the USB Download Cable Driver on Windows................................................ 9

3.2 Installing the USB Download Cable Driver on Linux..................................................... 9

3.2.1 Installing on Red Hat Enterprise 4 or Earlier Versions..................................... 10

3.2.2 Installing on Red Hat Enterprise 5............................................................... 10

3.3 Setting up the USB Download Cable Hardware in the Quartus Prime Software............... 10

3.4 Connecting the USB Download Cable to the Board..................................................... 11

4 Revision History for USB Download Cable User Guide.................................................... 13

Contents

Intel FPGA USB Download Cable User Guide

1 Introduction to USB Download Cable

The USB Download Cable interfaces a USB port on a host computer to an FPGA

mounted on a printed circuit board. The cable sends configuration data from the host

computer to a standard 10-pin header connected to the FPGA. You can use the USB

Download Cable to iteratively download configuration data to a system during

prototyping or to program data into the system during production.

1.1 USB Download Cable Revision

Table 1. USB Download Cable Revision

Revision Indicator Description RoHS Compliant

Rev. A Ribbon cable. No revision

marking on the casing.

10-pin female connector that is connected to the

USB Download Cable through a ribbon cable.

Rev. B "Rev. B" on the casing. 10-pin female connector that is connected to the

USB Download Cable through a flexible PCB cable.

Rev. C "Rev. C" on the casing. 10-pin female connector that is connected to the

USB Download Cable through a flexible PCB cable.

Yes

1.2 Supported Devices and Host Systems

You can use the USB Download Cable with supported Intel® FPGAs, serial

configuration devices, and host systems.

Table 2. Supported Devices and Host Systems

FPGA Serial Configuration Device Host System

Stratix® series

Arria® series

Cyclone® series

MAX® series

EPCS devices

EPCQ devices

EPCQ-L devices

Windows

Linux

1 Introduction to USB Download Cable

Megacore, NIOS, Quartus and Stratix words and logos are trademarks of Intel Corporation in the US and/or

other countries. Other marks and brands may be claimed as the property of others. Intel warrants performance

of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty,

but reserves the right to make changes to any products and services at any time without notice. Intel assumes

no responsibility or liability arising out of the application or use of any information, product, or service

described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the

latest version of device specifications before relying on any published information and before placing orders for

products or services.

ISO

9001:2008

Registered

2 Specifications for USB Download Cable

The USB Download Cable has a universal USB connector that plugs into the PC USB

port, and a female connector that plugs into a male header on the device board. This

section shows the hardware components, their dimensions, and lists the pins,

operating conditions and power requirements.

2.1 Block Diagram and Dimension

Figure 1. Block Diagram of the USB Download Cable

USBInterface

Chip EPM7064AETC44

I/Os

VCC (TRGT)

Pin 1

VCC

I/O

USBVCC

USB

Receptacle

10-Pin

Female Plug

Voltage Translator

Circuitry

Figure 2. Dimension of the USB Download Cable

0.5 (1)

7.5 (1)

2.5

1.0

2.0

(1) Applies to Rev. B and Rev. C.

All Dimensions are in inches.

2.2 Cable-to-Board Connection

TheUSB Download Cable has a 10-pin female connector, which plugs into a 10-pin

male header on the device board. The male header consists of two rows of five pins,

which are connected to the programming or configuration pins of the device.

2 Specifications for USB Download Cable

Megacore, NIOS, Quartus and Stratix words and logos are trademarks of Intel Corporation in the US and/or

other countries. Other marks and brands may be claimed as the property of others. Intel warrants performance

of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty,

but reserves the right to make changes to any products and services at any time without notice. Intel assumes

no responsibility or liability arising out of the application or use of any information, product, or service

described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the

latest version of device specifications before relying on any published information and before placing orders for

products or services.

ISO

9001:2008

Registered

A 10-pin surface mount header can be used for the JTAG, AS, or PS download cable.

However, Intel recommends using a through-hole connector because of the repeated

insertion and removal force needed.

Figure 3. Connectors and Dimensions

0.023 Sq .

0.235

0.100

Side View

0.100

Top View

Dimensions are in inches

10-pin Male Header

0.250 Typ.

0.700 Typ.

0.425 Typ.

0.100 Sq.

0.025 Sq.

Spacing between pin centers is 0.1 inches.

10-pin Female Connector (Device Board)

2.3 Pin Description

The following table lists the pins of the USB Download Cable female plug and describes

their functions in the JTAG, active serial and passive serial modes.

Table 3. Signal Names of the USB Download Cable Female Plug

Pin AS Mode PS Mode JTAG Mode

Signal Name Description Signal Name Description Signal Name Description

1DCLK Clock signal. DCLK Clock signal. TCK Clock signal.

2GND Signal ground. GND Signal ground. GND Signal ground.

3CONF_DONE Configuration

done. CONF_DONE Configuration

done. TDO Data from

device.

4VCC(TRGT) Target power

supplied by the

device board.

VCC(TRGT) Target power

supplied by the

device board.

VCC(TRGT) Target power

supplied by the

device board.

5nCONFIG Configuration

control. nCONFIG Configuration

control. TMS JTAG state

machine control.

6nCE Cyclone chip

enable.

————

7DATAOUT Active serial data

out. nSTATUS Configuration

status.

— —

8nCS Serial

configuration

device chip

select.

————

9ASDI Active serial data

in. DATA0 Data to device. TDI Data to device.

10 GND Signal ground. GND Signal ground. GND Signal ground.

2 Specifications for USB Download Cable

Intel FPGA USB Download Cable User Guide

2.4 Operating Conditions

Use the provided maximum ratings, recommended operating conditions and DC

operating conditions to ensure the correct usage of the USB Download Cable.

Table 4. Absolute Maximum Ratings

Symbol Parameter Conditions Min Max Unit

VCC(TRGT) Target supply voltage With respect to ground –0.3 5.5 V

VCC(USB) USB supply voltage With respect to ground –0.5 6.0 V

IIInput current TDO or dataout –10.0 10.0 mA

Output current for Rev. A

or Rev. B cable TCK, TMS, TDI, nCS, nCE

–20.0 20.0 mA

Output current for Rev. C

cable

–50.0 50.0 mA

Table 5. Recommended Operating Conditions

Symbol Parameter Conditions Min Max Unit

VCC(TRGT) Target supply voltage, 5.0-

V operation

— 4.75 5.25 V

Target supply voltage, 3.3-

V operation

— 3.0 3.6 V

Target supply voltage, 2.5-

V operation

— 2.375 2.625 mA

Target supply voltage, 1.8-

V operation

— 1.71 1.89 mA

Target supply voltage, 1.5-

V operation

— 1.43 1.57 mA

Table 6. DC Operating Conditions for USB Download Cable Rev. A and B

Symbol Parameter Conditions Min Max Unit

VIH High-level input

voltage

— VCC(TRGT) – 0.2 — V

VIL Low-level input

voltage

— — 0.15 V

VOH 5.0-V high-level

output voltage

VCC(TRGT) = 4.5 V, IOH = 1 mA 4.4 — V

3.3-V high-level

output voltage

VCC(TRGT) = 3.0 V, IOH = 1 mA 2.9 — V

2.5-V high-level

output voltage

VCC(TRGT) = 2.375 V, IOH = 1 mA 2.275 — V

1.8-V high-level

output voltage

VCC(TRGT) = 1.71 V, IOH = 1 mA 1.61 — V

1.5-V high-level

output voltage

VCC(TRGT) = 1.43 V, IOH = 1 mA 1.33 — V

VOL 5.0-V low-level

output voltage

VCC(TRGT) = 5.5 V, IOL = 1 mA — 0.125 V

continued...

2 Specifications for USB Download Cable

Intel FPGA USB Download Cable User Guide

Symbol Parameter Conditions Min Max Unit

3.3-V low-level

output voltage

VCC(TRGT) = 3.6 V, IOL = 1 mA — 0.125 V

2.5-V low-level

output voltage

VCC(TRGT) = 2.625 V, IOL = 1 mA — 0.125 V

1.8-V low-level

output voltage

VCC(TRGT) = 1.89 V, IOL = 1 mA — 0.125 V

1.5-V low-level

output voltage

VCC(TRGT) = 1.57 V, IOL = 1 mA — 0.125 V

ICC(TRGT) Operating current

(No Load)

Typical ICC(TRGT) = 16 uA — 100 uA

Table 7. DC Operating Conditions for USB Download Cable Rev. C

Symbol Parameter Conditions Min Max Unit

VIH High-level input

voltage

VCC(TRGT) >= 2.0 V 2.0 — V

VCC(TRGT) < 2.0 V VCC(TRGT) — V

VIL Low-level input

voltage

VCC(TRGT) >= 2.0 V — 0.8 V

VCC(TRGT) < 2.0 V — 0 V

VOH 5.0-V high-level

output voltage

VCC(TRGT) = 4.5 V, IOH = -10 mA 3.8 — V

3.3-V high-level

output voltage

VCC(TRGT) = 3.0 V, IOH = -8 mA 2.3 — V

2.5-V high-level

output voltage

VCC(TRGT) = 2.375 V, IOH = -6 mA 1.8 — V

1.8-V high-level

output voltage

VCC(TRGT) = 1.71 V, IOH = -4 mA 1.2 — V

VOL 5.0-V high-level

output voltage

VCC(TRGT) = 5.5 V, IOL = 10 mA — 0.8

3.3-V high-level

output voltage

VCC(TRGT) = 3.6 V, IOL = 8 mA — 0.7

2.5-V high-level

output voltage

VCC(TRGT) = 2.625 V, IOL = 6 mA — 0.6

1.8-V high-level

output voltage

VCC(TRGT) = 1.89 V, IOL = 4 mA — 0.5

ICC(TRGT) Operating current

(No Load)

Typical ICC(TRGT) = 16 uA — 100 uA

2.5 Power Requirements

The USB Download Cable VCC(TRGT) pin must be connected to a specific voltage for the

device being programmed. Connect pull-up resistors to the same power supply as the

USB Download Cable VCC(TRGT).

2 Specifications for USB Download Cable

Intel FPGA USB Download Cable User Guide

Table 8. VCC(TRGT) Power Requirements

Device Family Voltage Required

FPGAs

Stratix V, Stratix IV, and Stratix III As specified by VCCPGM or VCCPD.

Stratix II, Stratix II GX, and Stratix GX As specified by VCCSEL.

Arria 10 As specified by VCCPGM or VCCIO.

Arria V As specified by VCCPD.

Arria II GX As specified by VCCPD or VCCIO of Bank 8C

Arria GX As specified by VCCSEL.

Cyclone V As specified by VCCPGM or VCCPD.

Cyclone IV As specified by VCCA or VCCIO.

Cyclone III As specified by VCCA or VCCIO.

Max 10 As specified by VCCIO.

Configuration Devices

EPCS 3.3 V

EPCQ 3.3 V

EPCQ-L 1.8 V

2.6 RoHS Compliance

Table 9. Hazardous Substances and Concentration

A value of 0 indicates that the concentration of the hazardous substance in all homogeneous materials in the

parts is below the relevant threshold as specified by the SJ/T11363-2006 standard.

Part Name Lead (Pb) Cadmium

(Cd)

Hexavalent

Chromium

(Cr6+)

Mercury

(Hg)

Polybromina

ted

Biphenyls

(PBB)

Polybromina

ted Diphenyl

Ethers

(PBB)

Electronic components 0 0 0 0 0 0

Populated circuit

board

0 0 0 0 0 0

Manufacturing process 0 0 0 0 0 0

Packing 0 0 0 0 0 0

2 Specifications for USB Download Cable

Intel FPGA USB Download Cable User Guide

3 Using the USB Download Cable

To start using the USB Download Cable, you must install the drivers on your system

and set up the hardware in the Quartus® Prime software. Intel recommends that you

use the latest version of the Quartus Prime software.

To program or configure the device, connect the host system to the device board using

the USB Download Cable and initiate the programming or configuration using the

Quartus Prime Programmer. You can also use the cable with the Quartus Prime

SignalTap® II Logic Analyzer for logic analysis.

3.1 Installing the USB Download Cable Driver on Windows

1. Locate the USB Download Cable driver in \<Quartus Prime system

directory>\drivers\usb-blaster.

If the driver is not in your directory, download the driver from www.altera.com/

support/software/drivers.

2. Connect the USB Download Cable to your PC.

3. Open Device Manager. In the Other devices tab, select and right click USB-

Blaster. Then, click Update Driver Software.

4. Click Browse. Browse to \<Quartus Prime system directory>\drivers

\usb-blaster and click Next.

The Windows security warning is displayed.

5. Click Install to begin installing the driver.

6. Click Finish when the driver is installed.

7. Restart your system.

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