Intersil ISL6423B Manuale utente
1
Application Note 1582
ISL6423B Quick Start Guide
1. Download and install the ISLUSBI2CKIT1Z
evaluation board GUI from
http://www.intersil.com/products/deviceinfo.asp?p
n=ISL6423B.
2. Attach one end of the USB cable to the
ISLUSBI2CKIT1Z board and the other side goes to
the computer.
3. Attach the 4-pin connector, which came with the
evaluation board, between the ISLUSB2I2CEVAL2Z
board and the ISL6423BEVAL2Z evaluation board
(see Figure 1).
4. Apply 12V to VIN and GND post.
5. In Windows Explorer go to
C:\Program Files\Intersil\LNB Controller Interface
and click on the “usb2i2c.exe”. The computer screen
should display the program as shown in Figure 2.
6. Under Device Select, choose ISL6423/6423B and it
should display as shown in Figure 3.
FIGURE 1.
FIGURE 2.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
October 27, 2010
AN1582.0
2October 27, 2010
AN1582.0
7. Jumpers JP1, JP2, and JP3 are inserted, whereas JP4
is open, which provides a logic high signal to the
SELVTOP pin for controlling the output voltage.
Consult the ISL6423, ISL6423B data sheets for
additional information.
8. Click on Open Device and the ‘USB Attach’ and ‘USB
Device Handle’ buttons in the top left should turn
green.
9. To enable the ISL6423, ISL6423B, toggle the EN bit
on System Register 4 to ‘1’, at which point the
evaluation board should read approximately 13.3V
between VLNB and GND post.
10.For additional programming features on the
ISL6423, ISL6423B evaluation board, please
consult the ISL6423, ISL6423B data sheets under
I2C register settings.
11.For accurate noise and tone measurement, please
insert the scope probe in the SP1 connector on the
evaluation board. Figure 4 shows the ISL6423,
ISL6423B tone at 500mA of resistive load current
from 12VIN when the output voltage is programmed
for 13.3V.
FIGURE 3.
Application Note 1582
3
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the
reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
October 27, 2010
AN1582.0
FIGURE 4.
Application Note 1582
4October 27, 2010
AN1582.0
Evaluation Board Schematic
TXT
+5.0/+3.3V
GND
GND
SCL
VLNB
GND
GND
SDA
GND
7
8
P3
R4
BZT52C5V6
Q1
TPC6002
1UF
0.047UF
1
1.5KE24CA
R14
C11
1UF
VIN
C1
56UF
L1
15UH
TP1
CMS06
D1
TP2
3
4
6
1
52
R1
100PF
R2
100
R7
1.62K
1500PF
R26
P9
C7
MMBT2222LT1
10K
1.62K
R25
R9
100K
18.2
VIN
0.01UF
C26
NDS356AP
BZT52C5V6
CMS06
TDIN
CMS06
D3
10K
R11
C27
0.01UF
JP6
P13
Q3
DNP
VLNB
TDOUT
R5
100
SP1
R6
10K10K
VCC5
3
2
D7 D4
1
R3
JP2
D5
C15
4.75K
R24
L3
.1UF
C16
D6
220UH
0.01UF
0.1UF
10UF
C5
TP4
D2
S1A
56UF
C2
10UF
C3
L2
4.7UH
10UF
C4
0.01UF
C13
0
DNP
R27
DNP
1
2
3
Q2A
R23A
Q2B
DNP
3
2
1
0.22UF
C14
15
R23B
NDS356AP
R12
EXTM
FLT
100K
R10
VCC5
C9
JP1
VIN
R15
100K
SELVTOP
TP5
C12
17
16
14
15
19
20
21
24
22
23
6
18
13
12
11
10
9
25
5
4
3
C10
0.1UF
C8
J1
2
SELVTOP
0.10
TP3
C6
475
U1
ISL6423BERZ
JP3
R8
100K
JP4
ADDR1
ADDR0
SELVTOP
P10
P11
P7
P8
P6
P5
P14
P4
P2
P1
P12
47.5K
4.75K
SGND
TCAP SDA
SCL
TDOUT
ADDR0
CS
VSW FLT
VCC
AGND
TXT
SELVTOP
CPVOUT
CPSWIN
CPSWOUT
SGND
EXTM
TDIN
VO
ADDR1
BYPASS
GATE
EP
PGND
E
E
E
E
E
EE
E
EE
E
E
E
E
E
EE
EE EE
E
E
1X4
1
2
3
4
E
E
E
IN
OUT
IN
OUT
OUT
IN
Application Note 1582
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