Network Flashlink LIS-SDI Manuale utente

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SDI Line Synchroniser

Rev. 2

Flashlink User Manual

LIS-SDI

LIS-SDI Rev. 2

network-electronics.com | 2

Revision history

The latest version is always available in pdf-format on our website:

http://www.network-electronics.com/

Current revision of this document is the uppermost in the table below.

Revision Replaces Date Change Description

2 1 2007-10-26 New front page.

1 0 2007-09-11

Added Materials Declaration and EFUP; updated EC

Declaration of Conformity.

0 A 07.04.05 First official release; no changes to content.

A 09.04.03 Initial version. PIC sw. rev. 1.0.1. Firmware rev. 1.2

LIS-SDI Rev. 2

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Quick Start Guides for LIS-SDI

Used as a line synchroniser with deglitcher.

1. Attach SDI input and SDI output(s) to the backplane module (see Figure 2 on page 8) and

attach the Black&Burst signal to the backplane. Terminate the Black&Burst signal with

75ohm to ground.

2. Set DIP-switch 1 on (towards backplane). Set DIP-switch 3 on. Leave the rest of the

switches untouched.

3. Insert LIS-SDI into a slot in the sub-rack.

4. Power on. After one second the LIS-SDI should be running, all LEDs should be green, see

section 5.2. Note that up to 12 seconds may be needed to synchronise SDI and Black&Burst

at initial power up.

5. The BCD switches and the pushbuttons must be used to adjust which line and sample the

output will lock to. The output phase must be set with respect to the Black&Burst signal in

such a way that the delay through the card is between 41 samples and 1 line and 41 samples.

(See section 4.3)

Used as a video deglitcher.

1. Attach SDI input and SDI output(s) to the backplane module (see Figure 2 on page 8) and

attach the Black&Burst signal to the backplane. Terminate the Black&Burst signal with

75ohm to ground.

3. Insert LIS-SDI into a slot in the sub-rack.

4. Power on. After one second the LIS-SDI should be running, all LEDs should be green, see

section 5. Note that up to 12 seconds may be needed to synchronise SDI output to the

Black&Burst input at initial power up.

5. The output from LIS-SDI is now delayed ca ½ line with respect to the SDI input. When a

upstream switch is performed and a SDI input with another phase is placed on the input. The

delay through the linesync is changed, but the output phase is the same. When in deglithing

mode, the different SDI inputs must not have phases that differ more than ± ¼ line.

Note that if a GYDA controller is used, switch 1 should be in the off position.

LIS-SDI Rev. 2

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Index

Revision history........................................................................................................................2

Quick Start Guides for LIS-SDI.............................................................................................3

Used as a line synchroniser with deglitcher..........................................................................3

Used as a video deglitcher.....................................................................................................3

1. General..................................................................................................................................6

2. Specifications ........................................................................................................................7

3. Connector module................................................................................................................8

3.1 Mounting the connector module.......................................................................................8

3.2 Correspondence of connectors and signals .....................................................................8

4. A more detailed description ..............................................................................................10

4.1 Data path........................................................................................................................10

4.2 EEPROM........................................................................................................................10

4.3 Two modes of operation.................................................................................................10

4.4 Power-up sequence ........................................................................................................11

4.5 When an input signal is lost ...........................................................................................11

4.6 Warm up time.................................................................................................................11

5. Module status......................................................................................................................11

5.1 GPI - General Purpose Interface...................................................................................11

5.2 Light Emitting Diodes ....................................................................................................12

5.2.1 Card State....................................................................................................................12

5.2.2 Signal state..................................................................................................................12

5.2.3 Frame Lock .................................................................................................................12

5.2.4 EDH.............................................................................................................................13

6. SWITCHES.........................................................................................................................13

7. Pushbuttons.........................................................................................................................15

7.1 Reset...............................................................................................................................15

7.2 INC and DEC .................................................................................................................15

8. BCD switches......................................................................................................................15

8.1.........................................................................................................................................15

8.2 Lines delay......................................................................................................................16

8.3 Delay range....................................................................................................................16

9. Interface with GYDA or other controllers.......................................................................16

9.1 The '?' command.............................................................................................................16

9.2 The “info” command......................................................................................................17

LIS-SDI Rev. 2

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9.3 Delay command..............................................................................................................17

9.4 EDH-, Lsync- and TRSReplace-commands....................................................................17

9.5 Get and Set.....................................................................................................................18

General environmental requirements for Network flashlink®equipment.......................20

Product Warranty..................................................................................................................21

Materials declaration and recycling information................................................................22

Materials declaration.............................................................................................................22

Environmentally-friendly use period ...................................................................................22

Recycling information............................................................................................................23

EC Declaration of Conformity..............................................................................................24

List of figures

Figure 1: Simplified block diagram of the LIS-SDI card..............................................................................6

Figure 2: FRS-SDI-C1 connector module.....................................................................................................8

Figure 3: LIS-SDI simplified silkscreen (figure not to scale).......................................................................9

List of Tables

Table 1: Summary of the DIP switches.......................................................................................................13

Table 2: Method to restore the LIS-SDI card to factory settings................................................................14

Table 3: All commands available to the user..............................................................................................16

Table 4: The info command broken up in components...............................................................................19

LIS-SDI Rev. 2

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Figure 1: Simplified block diagram of the LIS-SDI card

1. General

The flashlink®LIS-SDI line synchroniser synchronizes the output SDI to the Black&Burst

signal with an adjustable phase relative to Black&Burst signal. The LIS-SDI deglitches the

digital signal when upstream switching is performed. It is possible to correct false F (Field), V

(Vertical blanking) and H (Horisontal blanking) bits in TRS sync words. The LIS-SDI has an

option to shift the whole video picture up and down with respect to the Vertical sync.

LIS-SDI user parameters can be changed via switches on the unit, or via the GYDA control

interface.

LIS-SDI Rev. 2

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2. Specifications

Digital Serial Input

Input format: 270 Mb/s scrambled NRZI (4:2:2

SMPTE 259M-C)

Output level: 800mV nominal, 75ohm terminated

Equalization Automatic up to 35 dB (300 m Belden

8281)

Return loss: > 15 dB

Black&Burst input

Input signal SMPTE 170M/PAL ITU 624-4

Return loss > 35 dB up to 5.75 MHz

Digital Serial Output

Output format: 270 Mb/s scrambled NRZI

Output level: 800 mV nominal

Return loss: > 15 dB

Other

Input voltage DC 5 V

DC –15 V

Power consumption < 3.2 W

Minimum delay 41 video samples

Maximum delay 1 line and 41 video samples

LIS-SDI Rev. 2

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3. Connector module

The LIS-SDI has its own connector module: FRS-SDI-C1, mounted at the rear of the sub-

rack. See Figure 2.

Figure 2: FRS-SDI-C1 connector module.

3.1 Mounting the connector module.

If the connector module is purchased separately, it should be mounted as described in the user

manual for the sub-rack frame FR-2RU-10-2. This manual is also available from our web site:

http://www.network-electronics.com/

3.2 Correspondence of connectors and signals

The FRS-SDI-C1 connector module has 7 BNC's:

SDO1 Line synchronized SDI output.

SDO2 Line synchronized SDI output.

SDO3 Line synchronized SDI output.

SDI-IN SDI input.

BB Black&Burst input

BB-DUP Black&Burst passive loop through.

SDI-OUT SDI-IN reclocked and buffered.

SDO1, SDO2 and SDO3 are equivalent 270 Mb/s SDI outputs.

LIS-SDI Rev. 2

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Figure 3: LIS-SDI simplified silkscreen (figure not to scale).

LIS-SDI Rev. 2

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4. A more detailed description

4.1 Data path

SDI-IN is equalized and reclocked, then transferred bit serially to the FPGA. The FPGA

descrambles and deserializes the input to 10-bit parallel, detects whether it is 625/50Hz or

525/60Hz, and writes the data to the line-buffer.

Data is fetched from the line-buffer, EDH is checked, the data is transferred to a chip that

serializes and scrambles the signal, and drives the resulting 270 Mb/s SDI-signal onto the

output connectors.

4.2 EEPROM

The LIS-SDI card actually has two EEPROM's. A small EEPROM is included in the

microcontroller, while a larger external EEPROM holds the configuration memory of the

FPGA and the input video chip.

Internal EEPROM

State variables are written to EEPROM in the microcontroller each time a configuration

change is made. Basically, the card remember it's setting between power-downs.

External EEPROM

The configuration memory of the FPGA and the input video chip is upgradeable. This is,

however, a task for qualified maintenance personnel.

4.3 Two modes of operation

The LIS-SDI can operate in two modes, with or without linesync (switch 3 or lsync on/off

command). When the linesync mode is off the card is used as a deglitcher. Then the output

phase is not adjustable.

It is recommended that the Black&Burst is connected also when the card is just used as a

deglitcher. The Black&Burst will insure that the output frequency is correct even if the input

signal is lost. When the linesync mode is off, the SDI output is delayed by half a line with

respect to the first SDI input detected. Any SDI used as input to the deglitcher must not be off

phase by more than half a line with respect to any other input presented to the deglitcher.

When the linesync mode is turned on the LIS-SDI is used as a line synchroniser and a

deglitcher. The output is synchronized to the Black&Burst. The output phase is adjustable

over a full frame with respect to the Black&Burst. The internal video buffer is only one line

long. Therfore the phase of the output SDI must be from 41 samples to 1 line and 41 samples

after the input SDI. The internal processing delay is 41 samples. It is important to know the

phase of the input SDI signals.

An example:

If the SDI inputs have a phase with respect to Black&Burst that is 0 lines and 0 samples, then

the user could for instance set the output phase to 0 lines and 700 samples.

Indice

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