Renesas RL78 Series Istruzioni per l'installazione e il funzionamento

APPLICATION NOTE

R01AN0749EG0201 Rev.2.01 Page 1 of 50

Mar 04, 2014

RL78 Family

VDE Certified IEC60730/60335 Self Test Library

Introduction

Today, as automatic electronic controls systems continue to expand into many diverse applications, the requirement of

reliability and safety are becoming an ever increasing factor in system design.

For example, the introduction of the IEC60730 safety standard for household appliances requires manufactures to

design automatic electronic controls that ensure safe and reliable operation of their products.

The IEC60730 standard covers all aspects of product design but Annex H is of key importance for design of

Microcontroller based control systems. This provides three software classifications for automatic electronic controls:

1. Class A: Control functions, which are not intended to be relied upon for the safety of the equipment.

Examples: Room thermostats, humidity controls, lighting controls, timers, and switches.

2. Class B: Control functions, which are intended to prevent unsafe operation of the controlled equipment.

Examples: Thermal cut-offs and door locks for laundry equipment.

3. Class C: Control functions, which are intended to prevent special hazards

Examples: Automatic burner controls and thermal cut-outs for closed.

Appliances such as washing machines, dishwashers, dryers, refrigerators, freezers, and Cookers / Stoves will tend to fall

under the classification of Class B.

This Application Note provides guidelines of how to use flexible sample software routines to assist with compliance

with IEC60730/60335 class B safety standards. These routines have been certified by VDE Test and Certification

Institute GmbH. A copy of the Test Certificate is available in the download package for this Application Note together

with the certified self test library source code and the test harness IAR project

Although these routines were developed using IEC60730/60335 compliance as a basis, they can be implemented in any

system for self testing of Renesas Microcontroller families.

These software routines provided are designed to be used after the system power on, or reset condition and also during

the application program execution. The end user has the flexibility of what routines are included and how to integrate

these routines into their overall application system design. This document and the accompanying test harness code

provide examples of how to do this.

Note. This document is based on the European Norm EN60335-1:2002/A1:2004 Annex R, in which the Norm IEC

60730-1 (EN60730-1:2000) is used in some points. The Annex R of the mentioned Norm contains just a single sheet

that jumps to the IEC 60730-1 for definitions, information and applicable paragraphs.

R01AN0749EG0201

Rev.2.01

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Mar 04, 2014

Target Devices

RL78 Family

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Contents

1.Self Test Libraries Introduction .........................................................................................................4

•CPU Registers...................................................................................................................................4

•Invariable Memory.............................................................................................................................4

•Variable Memory...............................................................................................................................4

•System Clock ....................................................................................................................................4

2.Self Test Library Functions ...............................................................................................................5

2.1CPU Register Tests...........................................................................................................................5

2.2Invariable Memory Test – Flash ROM ............................................................................................12

2.3Variable memory - SRAM ...............................................................................................................16

2.4System Clock Test ..........................................................................................................................22

3Example Usage...............................................................................................................................27

3.1CPU Verification..............................................................................................................................27

3.2Flash ROM Verification ...................................................................................................................28

3.3RAM Verification..............................................................................................................................29

3.4System Clock Verification ...............................................................................................................30

4Benchmarking .................................................................................................................................31

4.1Development Environment..............................................................................................................31

4.2IAR Embedded Workbench Settings...............................................................................................31

5Resources.......................................................................................................................................38

6Additional Hardware Resources......................................................................................................43

7VDE Certification Status..................................................................................................................49

Website and Support...............................................................................................................................50

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1. Self Test Libraries Introduction

The self test library (STL) provides self test functions covering the CPU registers, internal memory and system clock.

The library test harness provides an Application Programmers Interface (API) for each of the self test modules, which

are described in this applications note. These can be used in customer’s application wherever required.

For the purposes of VDE certification, the self test library functions are built as separate modules. The IAR Embedded

Workbench test harness allows each of the tests functions to be selected in turn and run as a stand alone function. In

order to minimise the affects of the optimisation in the C compiler and minimise resources used, all of the self test

library files have been written in assembler. The default build of the test harness C files has been built with the

optimisation set to “None” in the IAR Embedded workbench.

All of the STL modules and test harness files are MISRA-C compliant

The system hardware requirements include that at least two independent clock sources are available, e.g. Crystal /

ceramic oscillator and an independent oscillator or external input source. The requirement is needed to provide an

independent clock reference for monitoring the system clock. The RL78 is able to provide these using the High speed

and Low speed internal oscillators which are independent of each other.

Equally the application can provide a more accurate external reference clock or external crystal/resonators for the main

system clock can equally be used.

Figure 1 Self Test Library (STL) Configuration

The following CPU self test functions are included in the RL78 self test library.

•CPU Registers

The following CPU registers tests are included in this library

All CPU working Registers in all four register banks, Stack Pointer (SP), Processor Status

word (PSW), Extension registers ES and CS.

Internal data path are verified as part of the correct operation of these register tests

IEC Reference - IEC 60730: 1999+A1:2003 Annex H - Table H.11.12.7

•Invariable Memory

This tests the MCU internal Flash memory

IEC Reference - IEC 60730: 1999+A1:2003 Annex H - Table H.11.12.7

•Variable Memory

This tests the Internal SRAM memory

IEC Reference - IEC 60730: 1999+A1:2003 Annex H - Table H.11.12.7

•System Clock

Verifies the system clock operation and correct frequency against a reference clock source

IEC Reference - IEC 60730: 1999+A1:2003 Annex H - Table H.11.12.7

fin

Sub

Clock

Oscillator LS

Oscillator

Application

Software STL

Call

Return

fin

Sub

Clock

Oscillator LS

Oscillator

Application

Software STL

Call

Return

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2. Self Test Library Functions

2.1 CPU Register Tests

This section describes CPU register tests routines. The test harness control file ‘main.c’ provides examples of the API

for each of the CPU register tests using “C” language.

These modules test the fundamental aspects of the CPU operation. Each of the API functions has a return value in order

to indicate the result of a test.

Each of the test modules saves the original contents of the register(s) under test and restores the contents on completion.

The following CPU registers are tested:

•Working registers and Accumulator: AX, HL, DE, BC in Register Banks 0 – 3

Figure 2 Working Register Configuration

•Stack Pointer (SP)

Figure 3 Stack Pointer Configuration

•Processor Status Word (PSW)

Figure 4 PSW Register Configuration

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•Code Address Extension Register (CS)

Figure 5 Working Register Configuration

•Data Address Extension Register (ES)

Figure 6 Working Register Configuration

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2.1.1 CPU Register Tests - Software API

Table 1: Source files: CPU Working Registers Tests

STL File name Header Files

stl_RL78_registertest.asm None

Test Harness File Names Header Files

main.c

stl_global_data_example.c

stl_main_example_support function.c

stl_peripheralinit.c

stl.h

main.h

stl_gobal_data_example.h

Syntax

bool stl_RL78_registertest(void)

Description

This module tests the RL78 working registers and accumulators.

Registers AX, HL, DE, BC in all three register banks (Banks 0, 1, 2, 3)

These registers are tested as16bit registers.

The following tests are performed for each register:

1. Write h'5555 to the register being tested.

2. Read back and check they are equal.

3. Write h'AAAA to the register being tested.

4. Read back and check they are equal.

It is the calling function’s responsibility to ensure no interrupts occur during this test.

The original register contents are restored on completion of the test

The function “indicate_test_result.c” will be called by the test harness control files (main.c) to process the test result

Note Function “indicate_test_result.c “is located in the module stl_main_example_support function.c

Input Parameters

NONE N/A

Output Parameters

NONE N/A

Return Values

bool Test Result Status returned in CPU Register A

0 = Test passed. 1 = Test or parameter check failed

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Table 2: Source files: CPU Registers Tests – PSW

STL File name Header Files

stl_RL78_registertest_psw.asm stl.h

Test Harness File Names Header Files

main.c

stl_global_data_example.c

stl_main_example_support function.c

stl_peripheralinit.c

main.h

stl_gobal_data_example.h

Syntax

bool stl_RL78_registertest_psw(void)

Description

Test the 8bit Processor Status Word (PSW) register

The following tests are performed:

1. Write h'55 to the register being tested.

2. Read back and check it is equal.

3. Write h'AA to the register being tested.

4. Read back and check that it is equal.

It is the calling function’s responsibility to ensure no interrupts occur during this test.

The original register content is restored on completion of the test

The function “indicate_test_result.c” will be called by the test harness control files (main.c) to process the test result

Note Function “indicate_test_result.c “is located in the module stl_main_example_support function.c

Input Parameters

NONE N/A

Output Parameters

NONE N/A

Return Values

bool Test Result Status returned in CPU Register A

0 = Test passed. 1 = Test or parameter check failed

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Table 3: Source files: CPU Registers Tests - SP

STL File name Header Files

stl_RL78_registertest_stack.asm stl.h

Test Harness File Names Header Files

main.c

stl_global_data_example.c

stl_main_example_support function.c

stl_peripheralinit.c

main.h

stl_gobal_data_example.h

Syntax

bool stl_RL78_registertest_stack(void)

Description

Test the 16bit Stack Pointer (SP) register

The following tests are performed:

1. Write h'5555 to the register being tested.

2. Read back and check it is equal.

3. Write h'AAAA to the register being tested.

4. Read back and check that it is equal.

It is the calling function’s responsibility to ensure no interrupts occur during this test.

The original register content is restored on completion of the test

The function “indicate_test_result.c” will be called by the test harness control files (main.c) to process the test result

Note Function “indicate_test_result.c “is located in the module stl_main_example_support function.c

Input Parameters

NONE N/A

Output Parameters

NONE N/A

Return Values

bool Test Result Status returned in CPU Register A

0 = Test passed. 1 = Test or parameter check failed

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Table 4: Source files: CPU Registers Tests - CS

STL File name Header Files

stl_RL78_registertest_cs.asm stl.h

Test Harness File Names Header Files

main.c

stl_global_data_example.c

stl_main_example_support function.c

stl_peripheralinit.c

main.h

stl_gobal_data_example.h

Syntax

bool stl_RL78_registertest_cs(void)

Description

Test the 8bit code extension (CS) register

The following tests are performed:

1. Write h'05 to the register being tested.

2. Read back and check it is equal.

3. Write h'0A to the register being tested.

4. Read back and check that it is equal.

Please note that the top 4 bit are fixed to “0”

It is the calling function’s responsibility to ensure no interrupts occur during this test.

The original register content is restored on completion of the test

The function “indicate_test_result.c” will be called by the test harness control files (main.c) to process the test result

Note Function “indicate_test_result.c “is located in the module stl_main_example_support function.c

Input Parameters

NONE N/A

Output Parameters

NONE N/A

Return Values

bool Test Result Status returned in CPU Register A

0 = Test passed. 1 = Test or parameter check failed

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