Texas Instruments LM5020 Manuale utente

OUT

COMP

UVLO

VIN VCC

COMPENSATION

GND

VOUT

LM5020

VIN

RT SYNC

LM5020

www.ti.com

SNVS275F –MAY 2004–REVISED APRIL 2006

LM5020 100V Current Mode PWM Controller

Check for Samples: LM5020

1FEATURES PACKAGES

2• Internal Start-up Bias Regulator • VSSOP-10

• Error Amplifier • WSON-10 (4 mm x 4 mm)

• Precision Voltage Reference DESCRIPTION

• Programmable Softstart The LM5020 high voltage pulse-width-modulation

• 1A Peak Gate Driver (PWM) controller contains all of the features needed

• Maximum Duty Cycle Limiting (80% for to implement single ended primary power converter

LM5020-1 or 50% for LM5020-2) topologies. Output voltage regulation is based on

current-mode control, which eases the design of loop

• Programmable Line Under Voltage Lockout compensation while providing inherent line feed-

(UVLO) with Adjustable Hysteresis forward. The LM5020 includes a high-voltage start-up

• Cycle-by-Cycle Over-Current Protection regulator that operates over a wide input range up to

• Slope Compensation (LM5020-1) 100V. The PWM controller is designed for high speed

capability including an oscillator frequency range to

• Programmable Oscillator Frequency with 1MHz and total propagation delays less than 100ns.

Synchronization Capability Additional features include an error amplifier,

• Current Sense Leading Edge Blanking precision reference, line under-voltage lockout, cycle-

• Thermal Shutdown Protection by-cycle current limit, slope compensation, softstart,

oscillator synchronization capability and thermal

shutdown. The controller is available in both VSSOP-

APPLICATIONS 10 and WSON-10 packages.

• Telecommunication Power Converters

• Industrial Power Converters

• +42V Automotive Systems

Typical Application Circuit

Figure 1. Non-Isolated Flyback Converter

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

VCC

OUT

VIN

COMP

UVLO

GND

RT/SYNC

LM5020

SNVS275F –MAY 2004–REVISED APRIL 2006

www.ti.com

Connection Diagram

Top View

Figure 2. 10-Lead VSSOP, WSON

PIN DESCRIPTIONS

Pin Name Description Application Information

1 VIN Source Input Voltage Input to the start-up regulator. Input range is 13V to 100V.

2 FB Feedback Signal Inverting input of the internal error amplifier. The non-

inverting input is internally connected to a 1.25V reference.

3 COMP The output of the error amplifier and input to the COMP pull-up is provided by an internal 5K resistor which

Pulse Width Modulator may be used to bias an opto-coupler transistor.

4 VCC Output of the internal high voltage series pass If an auxiliary winding raises the voltage on this pin above

regulator. Regulated output voltage is 7.7V the regulation set point, the internal series pass regulator

will shut down, reducing the internal power dissipation.

5 OUT Output of the PWM controller Gate driver output with a 1A peak current capability.

6 GND Ground return

7 UVLO Line Under-Voltage Shutdown An external resistor divider from the power converter

source voltage sets the shutdown levels. The threshold at

this pin is 1.25V. Hysteresis is set by a switched internal

20µA current source.

8 CS Current Sense input Current sense input for current mode control and over-

current protection. Current limiting is accomplished using a

dedicated current sense comparator. If the CS pin voltage

exceeds 0.5V the OUT pin switches low for cycle-by-cycle

current limiting. CS is held low for 50ns after OUT switches

high to blank leading edge current spikes.

9 RT / SYNC Oscillator timing resistor pin and synchronization An external resistor connected from RT to GND sets the

input oscillator frequency. This pin also accepts synchronization

pulses from an external clock.

10 SS Softstart Input An external capacitor and an internal 10µA current source

set the soft-start ramp rate.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Product Folder Links: LM5020

LM5020

www.ti.com

SNVS275F –MAY 2004–REVISED APRIL 2006

Absolute Maximum Ratings(1)(2)

VIN to GND -0.3V to 100V

VCC to GND -0.3V to 16V

RT to GND -0.3V to 5.5V

All other pins to GND -0.3V to 7V

Power Dissipation Internally Limited

ESD Rating(3) Human Body Model 2kV

Storage Temperature -65°C to +150°C

Junction Temperature 150°C

(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which

operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical Characteristics.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3) The human body model is a 100 pF capacitor discharged through a 1.5kΩresistor.

Operating Ratings

VIN Voltage 13V to 90V

External Voltage applied to VCC 8V to 15V

Operating Junction Temperature -40°C to +125°C

Electrical Characteristics

Specifications in standard type face are for TJ= +25°C and those in boldface type apply over the full operating junction

temperature range. Unless otherwise specified: VIN = 48V, VCC = 10V, and RT = 31.6kΩ.(1)

Symbol Parameter Conditions Min Typ Max Units

Startup Regulator

VCCReg VCC Regulation VCC = Open 7.4 7.7 8.0 V

VCC Current Limit See(2) 15 22 mA

I-VIN Startup Regulator Leakage VIN = 100V 150 500 µA

IIN Shutdown Current VUVLO = 0V, VCC = open 250 350 µA

VCC Supply

VCC UVLO (Rising) VccReg VccReg - V

- 300mV 100mV

VCC UVLO (Falling) 5.3 6.0 6.7 V

ICC Supply Current Cload = 0 2 3mA

Error Amplifier

GBW Gain Bandwidth 4 MHz

DC Gain 75 dB

Reference Voltage FB = COMP 1.225 1.25 1.275 V

COMP Sink Capability FB = 1.5V COMP= 1V 517 mA

UVLO Pin

Shutdown Threshold 1.225 1.25 1.275 V

Undervoltage Shutdown Hysteresis 16 20 24 µA

Current Source

Current Limit

ILIM Delay to Output CS step from 0 to 0.6V 30 ns

Time to onset of OUT

Transition (90%)

Cycle by Cycle CS Threshold 0.45 0.5 0.55 V

Voltage

Leading Edge Blanking Time 50 ns

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control (SQC) methods. The limits are used to calculate National's Average Outgoing Quality Level (AOQL).

(2) Device thermal limitations may limit usable range.

Product Folder Links: LM5020

LM5020

SNVS275F –MAY 2004–REVISED APRIL 2006

www.ti.com

Electrical Characteristics (continued)

Specifications in standard type face are for TJ= +25°C and those in boldface type apply over the full operating junction

temperature range. Unless otherwise specified: VIN = 48V, VCC = 10V, and RT = 31.6kΩ.(1)

Symbol Parameter Conditions Min Typ Max Units

CS Sink Impedance (clocked) 35 55 Ω

Soft Start

Softstart Current Source 710 13 µA

Softstart to COMP Offset 0.35 0.55 0.75 V

Oscillator

Frequency1 (RT = 31.6k) See(3) 175 200 225 kHz

Frequency2 (RT = 9.76k) See(3) 560 630 700 kHz

Sync threshold 2.4 3.2 3.8 V

PWM Comparator

Delay to Output COMP set to 2V, 25 ns

CS stepped 0 to 0.4V,

Time to onset of OUT

transition low

Min Duty Cycle COMP=0V 0 %

Max Duty Cycle (-1 Device) 75 80 85 %

Max Duty Cycle (-2 Device) 50 %

COMP to PWM Comparator Gain 0.33

COMP Open Circuit Voltage 4.3 5.2 6.1 V

COMP Short Circuit Current COMP=0V 0.6 1.1 1.5 mA

Slope Compensation

Slope Comp Amplitude Delta increase at PWM 80 105 130 mV

(LM5020-1 Device Only) Comparator to CS

Output Section

Output High Saturation Iout = 50mA, VCC - VOUT 0.25 0.75 V

Output Low Saturation IOUT = 100mA, VOUT 0.25 0.75 V

Rise Time Cload = 1nF 18 ns

Fall Time Cload = 1nF 15 ns

Thermal Shutdown

Tsd Thermal Shutdown Temp. 165 °C

Thermal Shutdown Hysteresis 25 °C

(3) Specification applies to the oscillator frequency. The operational frequency of the LM5020-2 devices is divided by two.

Product Folder Links: LM5020

10k

-225

-180

-135

-90

-45

135

180

225

GAIN (dB)

FREQUENCY (Hz)

PHASE (o)

-50

-40

-30

-20

-10

100k 1M 10M

CURRENT (PA)

7.0

8.2

9.4

10.6

11.8

13.0

TEMPERATURE (oC)

-40 10 60 110

TEMPERATURE (oC)

FREQUENCY (kHz)

190

195

200

205

210

-40 10 60 110

RT (k:)

FREQUENCY (Hz)

1 10 100

1.00E+04

1.00E+05

1.00E+06

0 5 10 15 20 25

VCC (V)

ICC (mA)

010 20

VIN(V)

VCC(V)

LM5020

www.ti.com

SNVS275F –MAY 2004–REVISED APRIL 2006

Typical Performance Characteristics

Unless otherwise specified: TJ= 25°C.

VCC and VIN VCC

vs vs

VIN ICC (VIN = 48V)

Figure 3. Figure 4.

Oscillator Frequency

Oscillator Frequency vs

vs Temperature

RT RT = 31.6kΩ

Figure 5. Figure 6.

Soft Start Current

Temperature Error Amp. Gain/Phase Plot

Figure 7. Figure 8.

Product Folder Links: LM5020

LOGIC

OSC

VIN VCC

LOGIC

OUT

7.7V SERIES

REGULATOR

REFERENCE

SLOPECOMP

RAMP

GENERATOR

(LM5020-1 Only)

DRIVER

RT/SYNC

CLK

VCC

ENABLE

1.25V

UVLO

HYSTERESIS

(20 PA)

UVLO +

1.25V

GND

Max Duty Limit

LM5020-1 (80%)

LM5020-2 (50%)

10 PA

CS 0.5V

PWM

50 PA

1.4V

COMP

1.25V

CLK + LEB

LM5020

SNVS275F –MAY 2004–REVISED APRIL 2006

www.ti.com

Block Diagram

Product Folder Links: LM5020

LM5020

www.ti.com

SNVS275F –MAY 2004–REVISED APRIL 2006

DETAILED OPERATING DESCRIPTION

The LM5020 High Voltage PWM controller contains all of the features needed to implement single ended primary

power converter topologies. The LM5020 includes a high-voltage startup regulator that operates over a wide

input range to 100V. The PWM controller is designed for high speed capability including an oscillator frequency

range to 1MHz and total propagation delays less than 100ns. Additional features include an error amplifier,

precision reference, line under-voltage lockout, cycle-by-cycle current limit, slope compensation, softstart,

oscillator sync capability and thermal shutdown. The functional block diagram of the LM5020 is shown in Figure

1. The LM5020 is designed for current-mode control power converters, which require a single drive output, such

as Flyback and Forward topologies. The LM5020 provides all of the advantages of current-mode control

including line feed-forward, cycle-by-cycle current limiting and simplified loop compensation .

High Voltage Start-Up Regulator

The LM5020 contains an internal high voltage startup regulator, that allows the input pin (Vin) to be connected

directly to line voltages as high as 100V. The regulator output is internally current limited to 15mA. When power

is applied, the regulator is enabled and sources current into an external capacitor connected to the VCC pin. The

recommended capacitance range for the Vcc regulator is 0.1µF to 100µF. When the voltage on the VCC pin

reaches the regulation level of 7.7V, the controller output is enabled. The controller will remain enabled until VCC

falls below 6V.

In typical applications, a transformer auxiliary winding is connected through a diode to the VCC pin. This winding

should raise the VCC voltage above 8V to shut off the internal startup regulator. Powering VCC from an auxiliary

winding improves conversion efficiency while reducing the power dissipated in the controller. The external VCC

capacitor must be selected such that the capacitor maintains the Vcc voltage greater than the VCC UVLO falling

threshold (6V) during the initial start-up. During a fault condition when the converter auxiliary winding is inactive,

external current draw on the VCC line should be limited such that the power dissipated in the start-up regulator

does not exceed the maximum power dissipation capability of the controller.

An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the VCC

and the Vin pins together and feeding the external bias voltage (8-15V) to the two pins.

Line Under Voltage Detector

The LM5020 contains a line Under Voltage Lock Out (UVLO) circuit. An external set-point voltage divider from

Vin to GND sets the operational range of the converter. The resistor divider must be designed such that the

voltage at the UVLO pin is greater than 1.25V when Vin is in the desired operating range. If the under voltage

threshold is not met, all functions of the controller are disabled and the controller remains in a low power standby

state.

UVLO hysteresis is accomplished with an internal 20µA current source that is switched on or off into the

impedance of the set-point divider. When the UVLO threshold is exceeded, the current source is activated to

instantly raise the voltage at the UVLO pin. When the UVLO pin voltage falls below the 1.25V threshold the

current source is turned off, causing the voltage at the UVLO pin to fall. The UVLO pin can also be used to

implement a remote enable / disable function. If an external transistor pulls the UVLO pin below the 1.25V

threshold, the converter is disabled.

Error Amplifier

An internal high gain error amplifier is provided within the LM5020. The amplifier's non-inverting input is internally

set to a fixed reference voltage of 1.25V. The inverting input is connected to the FB pin. In non-isolated

applications, the power converter output is connected to the FB pin via voltage scaling resistors. Loop

compensation components are connected between the COMP and FB pins. For most isolated applications the

error amplifier function is implemented on the secondary side of the converter and the internal error amplifier is

not used. The internal error amplifier is configured as an open drain output and can be disabled by connecting

the FB pin to ground. An internal 5K pull-up resistor between a 5V reference and COMP can be used as the pull-

up for an optocoupler in isolated applications.

Product Folder Links: LM5020

RT = 1

F x 316 x 10-12

RT = 1

F x 158 x 10-12

LM5020

SNVS275F –MAY 2004–REVISED APRIL 2006

www.ti.com

Current Limit/Current Sense

The LM5020 provides a cycle-by-cycle over current protection function. Current limit is accomplished by an

internal current sense comparator. If the voltage at the current sense comparator input exceeds 0.5V, the output

is immediately terminated. A small RC filter, located near the controller, is recommended to filter noise from the

current sense signal. The CS input has an internal MOSFET which discharges the CS pin capacitance at the

conclusion of every cycle. The discharge device remains on an additional 50ns after the beginning of the new

cycle to attenuate the leading edge spike on the current sense signal.

The LM5020 current sense and PWM comparators are very fast, and may respond to short duration noise

pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated

with the CS filter must be located very close to the LM5020 and connected directly to the pins of the controller

(CS and GND). If a current sense transformer is used, both leads of the transformer secondary should be routed

to the sense resistor and the current sense filter network. A sense resistor located in the source of the primary

power MOSFET may be used for current sensing, but a low inductance resistor is required. When designing with

a current sense resistor all of the noise sensitive low power ground connections should be connected together

local to the controller and a single connection should be made to the high current power ground (sense resistor

ground point).

Oscillator and Sync Capability

A single external resistor connected between the RT and GND pins sets the LM5020 oscillator frequency.

Internal to the LM5020-2 device (50% duty cycle limited option) is an oscillator divide by two circuit. This divide

by two circuit creates an exact 50% duty cycle pulse which is used internally to create a precise 50% duty cycle

limit function. Because of this, the internal oscillator actually operates at twice the frequency of the output (OUT).

For the LM5020-1 device the oscillator frequency and the operational output frequency are the same. To set a

desired output operational frequency (F), the RT resistor can be calculated from:

LM5020-1:

(1)

LM5020-2:

(2)

The LM5020 can also be synchronized to an external clock. The external clock must have a higher frequency

than the free running oscillator frequency set by the RT resistor. The clock signal should be capacitively coupled

into the RT pin through a 100pF capacitor. A peak voltage level greater than 3.7 Volts at the RT pin is required

for detection of the sync pulse. The sync pulse width should be set between 15 to 150ns by the external

components. The RT resistor is always required, whether the oscillator is free running or externally synchronized.

The voltage at the RT pin is internally regulated at 2 Volts. The RT resistor should be located very close to the

device and connected directly to the pins of the controller (RT and GND).

PWM Comparator / Slope Compensation

The PWM comparator compares the current ramp signal with the loop error voltage derived from the error

amplifier output. The error amplifier output voltage at the COMP pin is offset by 1.4V and then further attenuated

by a 3:1 resistor divider. The PWM comparator polarity is such that 0 Volts on the COMP pin will result in a zero

duty cycle at the controller output. For duty cycles greater than 50 percent, current mode control circuits are

subject to sub-harmonic oscillation. By adding an additional fixed slope voltage ramp signal (slope compensation)

to the current sense signal, this oscillation can be avoided. The LM5020-1 integrates this slope compensation by

summing a current ramp generated by the oscillator with the current sense signal. Additional slope compensation

may be added by increasing the source impedance of the current sense signal. Since the LM5020-2 is not

capable of duty cycles greater than 50%, there is no slope compensation feature in this device.

Product Folder Links: LM5020

LM5020

0.01 PF

12.4k

GND GND

100 pF

RT/

SYNC

GND 6

FB 2

CS 8

100

C11

1000 pF

0.47 R9

0.47

GND GND GND

OUT 5

UVLO

7VIN

1VCC 4

C10

4.7 PF

0.1 PF

GNDGND

1.00k

61.9k

2.2 PF

GND

2.2 PF

GND

Shutdown

0.01 PF

GND

2.87k

GND

V+

30-75V IN

Si7898DP

GND

CMPD2838E

1SMB5936B

GND

MBRD835L

CMPD2838E

R13

GND

C12

470 pF

10, 1W

R10

GND

R12

1.47k

R11

2.43k

0.1 PF

GND

OUT RTN

GND

+3.3V

C13

100 PF

GND

C14

100 PF

GND

C15

270 PF

GND

COMP

SYNC

Input

15.0k

3300 pF

220 pF

LM5020

www.ti.com

SNVS275F –MAY 2004–REVISED APRIL 2006

Soft Start

The softstart feature allows the power converter to gradually reach the initial steady state operating point, thereby

reducing start-up stresses and current surges. At power on, after the VCC and the line undervoltage lockout

thresholds are satisfied, an internal 10µA current source charges an external capacitor connected to the SS pin.

The capacitor voltage will ramp up slowly and will limit the COMP pin voltage and the duty cycle of the output

pulses.

Gate Driver and Maximum Duty Cycle Limit

The LM5020 provides an internal gate driver (OUT), which can source and sink a peak current of 1 Amp. The

LM5020 is available in two duty cycle limit options. The maximum output duty cycle is typically 80% for the

LM5020-1 option and precisely equal to 50% for the LM5020-2 option. The maximum duty cycle function for the

LM5020-2 is accomplished with an internal toggle flip-flop which ensures an accurate duty cycle limit. The

internal oscillator frequency of the LM5020-2 is therefore twice the operating frequency of the PWM controller

(OUT pin).

The 80% maximum duty cycle limit of the LM5020-1 is determined by the internal oscillator and varies more than

the 50% limit of the LM5020-2. For the LM5020-1 the internal oscillator frequency and the operational frequency

of the PWM controller are equal.

Thermal Protection

Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction

temperature is exceeded. This feature prevents catastrophic failures from accidental device overheating. When

activated, typically at 165 degrees Celsius, the controller is forced into a low power standby state, disabling the

output driver and the bias regulator. After the temperature is reduced (typical hysteresis = 25°C) the VCC

regulator is enabled and a softstart sequence initiated.

Typical Application Circuit: 36V - 75 VIN and 3.3V, 4.5A OUT

Product Folder Links: LM5020

LM5020

SNVS275F –MAY 2004–REVISED APRIL 2006

www.ti.com

Table 1. Bill Of Materials

ITEM PART NUMBER DESCRIPTION VALUE

C 1 C4532X7R2A225M CAPACITOR, CER, TDK 2.2µF, 100V

C 2 C4532X7R2A225M CAPACITOR, CER, TDK 2.2µF, 100V

C 3 C2012X7R1H103K CAPACITOR, CER, TDK 0.01µF, 50V

C 4 C3216X7R2A104K CAPACITOR, CER, TDK 0.1µF, 100V

C 5 C2012X7R1H103K CAPACITOR, CER, TDK 0.01µF, 50V

C 6 C2012C0G1H221J CAPACITOR, CER, KEMET 220pF, 50V

C 7 C2012C0G1H332J CAPACITOR, CER, TDK 3300pF, 50V

C 8 C2012C0G1H101J CAPACITOR, CER, TDK 100pF, 50V

C 9 C2012X7R1H104K CAPACITOR, CER, TDK 0.1µF, 50V

C 10 C3216X7R1C475K CAPACITOR, CER, TDK 4.7µF, 16V

C 11 C2012C0G1H102J CAPACITOR, CER, TDK 1000pF, 50V

C 12 C2012C0G1H471J CAPACITOR, CER, TDK 470p, 50V

C 13 C4532X7S0G107M CAPACITOR, CER, TDK 100µF, 4V

C 14 C4532X7S0G107M CAPACITOR, CER, TDK 100µF, 4V

C 15 A700X277M0004AT CAPACITOR, ALUM ORGANIC, KEMET 270µF, 4V

D 1 CMPD2838E-NSA DIODE, SIGNAL, CENTRAL

D 2 CMPD2838E-NSA DIODE, SIGNAL, CENTRAL

D 3 MBRD835L DIODE, RECTIFIER, ON

SEMICONDUCTOR

J 1 MKDS 1/2-3.81 TERM BLK, MINI, 2 POS, PHOENIX

CONTACT

J 2 MKDS 1/2-3.81 TERM BLK, MINI, 2 POS, PHOENIX

CONTACT

Q 1 SI7898DP FET, SILICONIX 150V, 85mΩ

R 1 CRCW120610R0F RESISTOR 10

R 2 CRCW12066192F RESISTOR 61.9kΩ

R 3 CRCW08052871F RESISTOR 2.87kΩ

R 4 CRCW08051001F RESISTOR 1.00kΩ

R 5 CRCW08051502F RESISTOR 15.0kΩ

R 6 CRCW08051242F RESISTOR 12.4kΩ

R 7 CRCW08051000F RESISTOR 100

R 8 CRCW12060R47F RESISTOR 0.47

R 9 CRCW12060R47F RESISTOR 0.47

R 10 CRCW251210R0F RESISTOR 10, 1W

R 11 CRCW08052431F RESISTOR 2.43K

R 12 CRCW08051471F RESISTOR 1.47K

R 13 CRCW080520R0F RESISTOR 20

T 1 B0695-A COILCRAFT TRANSFORMER, FLYBACK, EFD20 CORE

T 1 PA0751 PULSE TRANSFORMER, FLYBACK, EFD20 CORE ALTERNATE

U 1 LM5020-2MM CONTROLLER, SINGLE OUT, PWM,

NATIONAL

Z 1 1SMB5936B DIODE, ZENER, SMB, 30V

Product Folder Links: LM5020

Indice

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