Transmeta Crusoe TM5400 Guida

System Design Guide

Transmeta Crusoe™ Processor

Model TM5400/TM5600

Preliminary Information

Confidential Information—NDA Required

October 13, 2000 System Design Guide

Confidential Information—NDA Required

Crusoe™ Processor Model TM5400/TM5600

System Design Guide

TMDFS-19, Revision 1.9, October 13, 2000

Confidential Information—NDA Required

Property of:

Transmeta Corporation

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http://www.transmeta.com

The information contained in this document is provided solely for use in connection with Transmeta products, and

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Transmeta products have not been designed, tested, or manufactured for use in any application where failure, malfunction,

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TM5400/TM5600 System Design Guide Preliminary Information October 13, 2000

Confidential Information—NDA Required 3

Table of Contents

Overview ....................................................................................................................................11

Chapter 1 System Block Diagram ........................................................................................................13

1.1 Power Supply Requirements........................................................................ 14

1.2 Description of Elements in System Block Diagram ..................................... 16

1.2.1 Processor......................................................................................................................16

1.2.2 CD DDR SDRAM .....................................................................................................16

1.2.3 DI SDR SDRAM ........................................................................................................17

1.2.4 Clocking......................................................................................................................23

1.2.5 Using BIOS ROM for CMS storage ............................................................................23

1.2.6 System Reset................................................................................................................24

Chapter 2 Design Considerations ........................................................................................................25

2.1 Important Processor Considerations............................................................ 25

2.2 Important Power Management Issues .......................................................... 26

2.3 DI PCB Layout Guidelines ......................................................................... 27

2.4 TM5400/TM5600 LongRun™ Design Considerations ............................ 28

2.4.1 About LongRun™ Technology ...................................................................................28

2.4.2 LongRun Power Supply ...............................................................................................29

2.4.3 VDDCORE Supply Transition Rates and LongRun ....................................................30

2.4.4 CVDD Rise and Fall Times .........................................................................................30

2.5 Thermal Design Considerations.................................................................. 31

2.6 South Bridge Recommendation................................................................... 31

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2.7 Power Planes and Power Supply Decoupling ............................................... 31

2.8 Serial Flash Write Protection Circuit ........................................................... 31

2.8.1 Overview .....................................................................................................................32

2.8.2 Serial Flash Write Protection Circuitry.........................................................................32

2.8.3 Schematic Diagram of the PLD in a System ................................................................34

2.8.4 Pinout .........................................................................................................................34

2.8.5 JEDEC Fuse Map ........................................................................................................35

2.8.6 CUPL Source Code .....................................................................................................36

2.8.7 Software Support .........................................................................................................38

2.9 Mode Bit ROM Settings ............................................................................. 40

2.9.1 Programming the Mode Bit ROM with WinTMM .....................................................40

2.9.2 Programming the Mode-Bit ROM with a Device Programmer ....................................42

Chapter 3 PWB Layout ..............................................................................................................................43

3.1 Very Important Layout Requirements ......................................................... 43

3.2 Layout Guidelines ....................................................................................... 44

3.2.1 Recommended Eight Layer PWB Stackup ...................................................................44

3.2.2 Recommended Ten Layer PWB Stackup......................................................................44

3.3 Power Supply Decoupling Layout ............................................................... 45

3.4 Processor Footprint ..................................................................................... 47

3.5 BGA Pin Escape Diagram ........................................................................... 48

3.6 Recommended Standard Spacing/Line/Via Constraints............................... 49

3.6.1 Allegro Extended Spacing Constraints..........................................................................49

3.7 Recommended PWB Fabrication Notes ...................................................... 52

TM5400/TM5600 System Design Guide Preliminary Information October 13, 2000

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3.8 DDR SDRAM............................................................................................ 53

3.8.1 DDR Trace Route Examples........................................................................................54

3.8.2 Secondary Side (Bottom) .............................................................................................56

Chapter 4 Thermal Design Considerations .....................................................................................59

4.1 Overview..................................................................................................... 59

4.2 Thermal Design Guidelines......................................................................... 59

4.3 Thermal Transfer Device (TTD) Example Design....................................... 60

4.4 Thermal Measurements............................................................................... 61

4.4.1 400Mhz TM120 at 1.7V .............................................................................................61

4.5 Power Measurements................................................................................... 62

4.6 TTD Mechanical Specifications .................................................................. 63

4.7 Thermal Transfer Device Pictures................................................................ 65

Chapter 5 Crusoe Processor Reference Schematics Description .......................................67

5.1 Core Schematics.......................................................................................... 67

5.2 System Level Reference Schematics ............................................................. 71

October 13, 2000 PreliminaryInformation TM5400/TM5600 System Design Guide

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TM5400/TM5600 System Design Guide Preliminary Information October 13, 2000

Confidential Information—NDA Required 7

List of Tables

TABLE 1 Power Supply Requirements.........................................................................................15

TABLE 2 TM3200 to TM5400/TM5600 VRDA Pins ...............................................................28

TABLE 3 Power Consumption of TM3200 at Thermal Measurement Operating conditions ......62

October 13, 2000 PreliminaryInformation TM5400/TM5600 System Design Guide

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TM5400/TM5600 System Design Guide Preliminary Information October 13, 2000

Confidential Information—NDA Required 9

List of Figures

FIGURE 1 Core System Block Diagram............................................................................................13

FIGURE 2 Transmeta Debug Connector A .......................................................................................21

FIGURE 3 Transmeta Debug Connector B .......................................................................................22

FIGURE 4 System Reset....................................................................................................................24

FIGURE 5 TM5400/TM5600 VRDA Connection and Timing Diagram for LongRun™ ...............29

FIGURE 6 TM5400/TM5600 VDDCORE Underside BGA Decoupling Example..........................46

FIGURE 7 TM5400/TM5600 Mechanical Footprint .......................................................................47

FIGURE 8 BGA Pin Escape Example................................................................................................48

FIGURE 9 Recommended DDR Layout...........................................................................................54

FIGURE 10 4-Chip DDR Memory Layout, Top Layer.......................................................................55

FIGURE 11 4-Chip DDR Memory Layout, Internal Layer.................................................................56

FIGURE 12 4-Chip DDR Memory Layout, Bottom Layer .................................................................57

FIGURE 13 Thermal Measurement Probe Placement in Laptop System .............................................60

FIGURE 14 Thermal Measurements of TTD in Laptop System–Running Windows (Idle) ................61

FIGURE 15 Thermal Measurements of TTD in Laptop System–Running DOS in Windows (Busy) .62

FIGURE 16 Thermal Transfer Device Mechanical Cross Section.........................................................63

FIGURE 17 TTD Mechanical Top View ............................................................................................63

FIGURE 18 TTD Mechanical Bottom View.......................................................................................64

FIGURE 19 TTD Mechanical Bottom View.......................................................................................64

FIGURE 20 Crusoe Processor and TTD Mounting Holes ..................................................................65

FIGURE 21 TTD Over the Crusoe Processor .....................................................................................65

FIGURE 22 TTD In Place Over the Crusoe Processor........................................................................66

FIGURE 23 Bottom of PC Board, Screws for TTD ............................................................................66

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