HP E2465A PowerPC 604 PGA Manuale utente
HP E2465A PowerPC 604 PGA
Preprocessor
Interface
User's Guide
User's Guide
Publication Number E2465-97001
First Edition, October 1996
For
SafetyInformation, Warranties,
and
Regulatory Information,
see
the
pages
at
the
end
ofthis manual.
© Copyright Hewlett-Packard
Company
1996
All
Rights Reserved.
HP E2465A PowerPC 604 PGA
PreprocessorInterface
The HP E2465A Preprocessor Interface -
At a Glance
The HP E2465A Preprocessor Interface provides a complete interface
for state or timing analysis
between
any
PowerPC 604 PGA target
system and
the
following HP logic analyzers:
• HP l 660A/ASIC/CS
• HP 1670A/D
• HP 16550A (two
cards)
• HP 16554A (two
or
three
cards)
• HP 16555A/D (two
or
three
cards)
• HP 16556A/D (two
or
three
cards)
The preprocessorinterface provides
the
physical connection between
the
target microprocessor and
the
logic analyzer. The configuration
software
on
the
flexible disk sets
up
the
logic analyzer for
compatibilitywith
the
preprocessor interface. The inverse assembler
allows you to obtain displays
of
the
microprocessor operations
in
PowerPC 604 mnemonics.
For
additional information on
the
supported
logic analyzers
or
microprocessors, refer
to
the
appropriate
reference
manuals for those
products.
ii
E2465A PowerPC
604
PGA
Preprocessor
Introduction
HP
E2465A
Preprocessor Interface
E2465A PowerPC 604 PGA
Preprocessor
Ill
In This Book
This book is
the
user's guide for the HP E2465A Preprocessor Interface. It
assumes that you have a working knowledge of
the
logic analyzer used
and
the
microprocessor being analyzed.
This user's guide is organized into three chapters:
Chapter 1explains howto attach
the
preprocessor
to
the
target
system
and
logic analyzer, and how
to
load
the
preprocessorinterface
software into thelogic analyzer.
Chapter 2 provides reference information on
the
format specification
and
symbols configured by
the
preprocessorinterface software, and
information about
the
inverse assemblers
and
status
encoding.
Chapter 3 contains referenceinformation on
the
preprocessor
interface hardware, including the characteristics
and
signal mapping
for
the
preprocessorinterface.
Appendix A contains information on troubleshooting problems or
difficulties which may occurwith the preprocessor interface.
Formore information on
the
logic analyzers or microprocessor, referto
the
appropriate referencemanualfor those products.
iv
E2465A PowerPC 604 PGA Preprocessor
Contents
The
HP E2465A
Preprocessor
Interface -
At
a
Glance
ii
1
Setting
Up
the
Preprocessor
Interface
Before You Begin
1-3
Connecting
to
the
Target
System
1-5
To power up or power down
1-5
To connect the preprocessor to the target system
1-6
Connecting
to
the
Logic Analyzer
1-8
To connect to the
HP
l
660N
ASIC/CS
logic analyzers
1-8
To connect to the
HP
1670A/D
logic analyzer 1-9
To
connect to the
HP
16550A two-card analyzer 1-10
To
connect to the
HP
16554/55/56 (two-card) 1-11
To
connect to the
HP
16554/55/56 (three-card) 1-12
Configuring
the
Logic Analyzer
1-13
To load the configuration and inverse assembler 1-13
Connecting
to
the
JTAG signals
1-16
E2465A Power
PC
604
PGA
Preprocessor v
Contents
2 Analyzing
the
PowerPC
604
Modes of Operation
2-3
State-per-ack
mode
2-3
State-per-clock mode 2-3
Timing mode
2-3
Format Menu
2-4
Trigger Menu
2-10
To
capture
an
address
2-11
To
change
the
trigger conditions 2-12
Excluding
tenure
from other bus masters 2-12
Capturing Isolated Addresses 2-13
Configuring for State-per-clockmode
2-13
Using
the
Inverse Assembler 2-14
To
select a different inverse assembler
2-14
To
display
captured
state data 2-15
Interpreting Data 2-16
Branch Instructions 2-16
Overfetch Marking 2-17
Little-Endian Mode 2-17
To
use
the
Invasmkey
2-18
To
use
the
Invasm Options key 2-18
Show/Suppress 2-19
Code Synchronization 2-20
Done Field
2-23
Disabling
the
Instruction Cache on
the
PowerPC
2-24
vi E2465A Power
PC
604 PGA Preprocessor
3
Preprocessor
Interface
Hardware
Reference
Operating characteristics
3-3
Signal line loading
3-4
Theory of operation
3-5
Target Mastership Of Data/Address Bus
3-5
Normal Mode
Vs.
Fast-12 Mode Of Operation
3-5
Direct Store Mode
3-5
Signal-to-Connector Mapping
3-6
Circuit boarddimensions 3-13
Repair Strategy 3-14
E2465A Power PC 604 PGA Preprocessor
Contents
vii
Contents
A
If
You Have a Problem
Analyzer
Problems
A-3
Intermittent data errors A-3
Unwanted triggers A-3
No
activity on activity indicators
A-4
No
trace
list display A-4
Preprocessor
Problems
A-5
Target systemwill
not
boot up
A-5
Erratic trace measurements A-6
Capacitive loading A-6
Inverse
Assembler
Problems
A-8
No
inverse assembly orincorrectinverse assembly
A-8
Inverse assembler
will
not load or
run
A-9
Intermodule
Measurement
Problems
A-10
An
event wasn't captured by one
of
the
modules A-10
Messages
A-11
"
...
Inverse Assembler Not Found" A-11
"Measurement Initialization Error" A-12
"No Configuration File Loaded" A-13
"Selected File
is
Incompatible" A-13
"Slow or Missing Clock" A-13
"Time from Arm Greater Than 41.93 ms" A-14
"Waiting for Trigger" A-14
viii E2465A Power PC 604 PGA Preprocessor
1
Setting Up
the
Preprocessor
Interlace
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