RCA 70/46 Manuale utente

5iPEL:IRA~'u

70/46

Processor

Reference Manual

OOm3LlD

Information

Systems

70-46-601

March 1968

The

information

contained

herein

subject

change

without

notice. Revisions

may

issued to advise

such

changes

and/or

additions.

First

Printing:

April

1967

Reissued:

March

1968

INTRODUCTION

SYSTEM

STRUCTURE

INSTRUCTION

FORMATS

ADDRESSING

PROGRAM

INTERRUPT

INPUT/OUTPUT

OPERATION

CONTENTS

RCA

Model

70/46

Processor

.................................

Organization

Data

.......................................

Data

Formats

..............................................

Page

Numbering

System.

. .

. . . .

.. ..

. .

. . . .

. . . . . . . . . . . . . . . . . 3

Main

Memory

..............................................

Non-Addressable

Main

Memory

...............................

Scratch-Pad

Memory

........................................

Translation

Memory

........................................

Read-Only Memory

.........................................

Program

Control

and

Arithmetic

Unit

.........................

Input/Output

Control

.......................................

Interval

Timer

.............................................

Format

Memory

Address

Translation

.................................

Introduction

...............................................

Processor

States.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Processing

State

......................................

Interrupt

Response

State

••••••••••••••••••••••••••••••

Interrupt

Control

State

•••••••••••••••••••••••••••••••

Machine Condition

State

•••

• • • • • • • • • • • • • • • • • • • • • • • • • • • • 16

Processor

State

Registers

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Program

Counter

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

General

Registers

.......................................

Floating-Point

Registers

.................................

Interrupt

Status

Registers

...............................

Interrupt

Mask

Registers

................................

Program

Mask

Registers

.................................

Addressing

.....................................

Interrupt

Flag

..................................

Interrupt

Conditions

.........................................

Interrupt

Mechanization.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Automatic

Interrupt

.....................................

Program

Controlled

Interrupt

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Introduction

...............................................

Input/Output

Channels

......................................

Selector

Channels

............................

..........

MUltiplexor

Channel.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

iii

INPUT

/OUTPUT

OPERATION

(Cont'd)

MULTI-PROCESSOR

INSTALLA

TlON

PRIVILEGED

INSTRUCTIONS

CONTENTS

(Cont'd)

Page

Input/Output

Operational Control

.............................

Programming

Considerations

Prior

Input/Output

Initiation.

. 38

Input/Output

Initiation

..................................

Channel Servicing

.......................................

Channel Address Word (CAW)

..........................

Channel Block Address (CBA)

...........................

Channel Command Word (CCW)

.........................

Input/Output

Channel

Registers.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Channel Address Register (CAR)

........................

Channel Command Register-II (CCR-II)

..................

Channel Command Register-I (CCR-I)

....................

Assembly/Status

.....

0 0 • 0 0 • 0 0 • 0 • 0 • 0

•••

•••••

0 • • • 47

CBA Register

..............................

••

0 • • • • • • • • • 47

Input/Output

Instructions

..............

0 • • • • • • • • • • • • • • • • • • • • • 47

Start

Device

Instruction

. 0

•••••••••

0 0 • 0

••

0 • • • • • • • • • • • • • • • • 47

Halt

Device

Instruction

..........

••

0 • • • • • • • • • • • • • • • • • • • • 52

Test Device

Instruction

.................

0 • 0 0 • • • • • • • • • • • • • • 56

Check Channel

Instruction

.....

•••••••

•••

0 • • • • • • • • • • • • • •

Input/Output

Status

Indicators

...

0 0 • 0

••

0 0

••••

0 • • • • • • • • • • • • • • • •

Condition Code

...

•••••••••

0 0 0

••

0 0 0 0 • 0 0 0 • 0 • • • • • • • • • • • • • •

Channel

Status

Byte 0

•••••••

0.0

••

• 0 0 0 • 0

0.00

•••••••••••

0 63

Standard

Device Byte

•••

••

•••

••

••••••••

0.........

Sense Bytes

.....

0.0

•••••

0 • 0

•••

'0'

• 0 0 • 0

.000

• • • • • • • • • • • •

Channel Servicing

........

••••••

••••••••••••

0 • 0 • • • • • • • • • • • • 66

Servicing a

Data

Transfer

......

0 • • • • • • • • • • • • • • • • • • • • • • • • •

End

and Chaining Servicing

...........

0 • • • • • • • • • • • • • • • • • • 72

Interrupt

Servicing

..............

••••

••

0 • • • • • • • • • • • • 77

Introduction

.......................

0 0

••••

0 • • • • • • • • • • • • • • • • • •

Operational

Characteristics

..............

0 • 0

••••

0 • • • • • • • • • • • • •

Direct Control

Interface

..........

•••

0 o

••

0 0

••

0 0 • • • • • • • • • • • • • • 82

Static

Out Lines

.......

0 0 • 0

••

0 • 0

•••

0 0 • 0 • • • • • • • • • • • • • • • • • • 82

Static

Lines

.........

•••

0 0 0

••••

0 0 • 0 0 • • • • • • • • • • • • • • • • • 82

Signal Out Line

......

•••

0.00.

••

•••••

0 • • • • • • • 82

External

Signal

Line

•••••••••••••••

0 • 0 • • • • • • • • • • • • • 82

Power

Failure

Line

(PFND)

0 • • • • • • • • • • • • • • • • • • • • • • • • • • 82

Power

Failure

Inhibit

Line

(PFIR)

...................

Dual Processor Complex

...

•••••••

0 • • • • • • • • • • • • • • • • • • 83

Master/Satellite

Complex

..........

••

0 • • • • • • • • • • • • • • • • • • • • 84

Maximum Multi-Processor Complex

...

0 • • • • • • • • • • • • • • • • • • • • • • • • 85

Operational

Procedures.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Transmission

Procedure

•••

•••••

••••••••••••

0 • • • • • • • • 86

Response Procedure

...

••••••••

••

•••••••••

••••••

••

Introduction

................

0 • 0

•••••••

••••••••

0 • • • • • • • • • • • • 88

Instruction

Formats

...........

0 0

•••••

0 0

•••••••••••••

0 • • • • • • • 88

Interrupt

Action

.....

••

••••••

••••

•••••••••••

0 88

Function

Call

(FC)

.....................

0 • 0

••

•••••••••••••

0 90

Special

Function

# 1 Load

Translation

Memory

(LTM)

........

Special

Function

Scan

Translation

Memory

and

Store

(STMS)

Special

Function

# 3

Store

Translation

Memory

(STM)

•••

0 96

Special Function # 4 Load

Interval

Timer

(LIT)

. 0

•••

0 0 • 0

••

0 • • 97

PRIVILEGED

INSTRUCTIONS

(Cont'd)

PROCESSOR

STATE

CONTROL

INSTRUCTIONS

FIXED-POINT

INSTRUCTIONS

CONTENTS

(Cont'd)

Page

Special

Function

# 5

Store

Interval

Timer

(SIT)

00 00

0 98

Special

Function

# 6

Paging

Queue

and

Paging

Error

Interrupt

Service

0000000000000000000000000000000000000000000000000

Load

Scratch-Pad

(LSP)

0000000000000000000000000000000000000

102

Store

Scratch-Pad

(SSP)

0000000000000000000000000000000000000

103

Program

Control

(PC)

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 104

Idle

(IDL)

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 106

Diagnose

(DIG)

0000000

0 0 0 0 0 0 0

0000000000

0000

000 000

00 00

0000

0 107

Start

Device

(SDV)

000000

00000

0000

0 0

000

0 0

0 0 0 108

Halt

Device

(HDV)

0 0 0

00 00 00

000000

000

00000

0000

0 0

00 00

0 111

Test

Device

(TDV)

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 113

Check Channel (CKC)

0000000000000000000000000000000000000000

115

Insert

Storage

Key

(ISK)

0000

0000000000

0000000

00 00

0 116

Set

Storage

Key

(SSK)

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 117

Write

Direct

(WRD)

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 118

Read

Direct

(RDD)

0000000000.000000000000000000000000000000

119

Introduction

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 120

Instruction

Format

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 120

Condition Code

Utilization

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 120

Interrupt

Action 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 120

Supervisor

Call (SVC) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 121

Set

Program

Mask

(SPM)

000000000000000000000000000000000000

122

Introduction

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 123

Data

Format

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 123

Representation

Numbers

0000

0 0 0 0 0 0

00 00

0 0 0

0 0

0 123

Instruction

Formats

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 124

Condition Code

Utilization

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 125

Interrupt

Action 0

0 0

00 00

0000

0 0 0 0

000.00

0000000

0 0

0 0 0 126

Load

Word

(LR)

(L)

00000000000000000000

•••••••

000000000000

127

Load

Halfword

(LH)

0 0 0 0 0 0 0 0 • 0 0 0 0 0 • 0 • 0

•••••

0 0 0

••

0 0 0 0 0 0 0 0 0 0 0 0 128

Load

and

Test

(LTR)

0 0 0

••

0 0

•••

0 0 • 0 • 0 0

••

•••

0 0 0 0 0 0 0 0 0 0 0 0 129

Load Complement

(LCR)

0 0 0 0 0 0 0

••

0 • 0 • 0 0 0 0

••••

0 0 0 0 0 0 0 0 0 0 0 0 0 130

Load

Positive

(LPR)

0 0 0 0 0

••••

0 • 0 • 0

••

0 • 0 0

••

0 • 0 0 0 0 0 0 0 0 0 0 0 0 131

Load

Negative

(LNR)

0000.

000.

00.

000.00

•••

••••

0 0 0

00'

•

000

132

Load Multiple

(LM)

0 0 0 0 0 0 0 0 0 0 0 • 0 0 0 0 0 0 0

•••••••

0 0 • 0 0 0 0 0 0 0 0 0 0 0 0 133

Add

Word

(AR)

(A)

0000000000000000.0.

•••

00.00.00.0000000

134

Add

Halfword

(AH)

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 • 0 0 0 • 0 0 0 • 0 0 0 0 0 0 0 0 0 0 0 0 0 0 135

Add

Logical

(ALR)

(AL)

0 0 0 0

••

0 0 • 0 0 0 • 0

•••••••••

0 0 0 0 0 0 0 0 0 0 0 0 136

Subtract

Word

(SR)

(S)

000

••

••••••

0 0

••••

0000

00 00

0 137

Subtract

Halfword

(SH)

0 0 • 0 0 0 • 0 0 0 • 0 0 • 0 0

•••••••

0 0 0 0 0 0 0 0 0 0

138

Subtract

Logical

(SLR)

(SL)

0 0 0 • 0 0 0 0 0 0 0

••

0 0

•••

0 0 0 0 0 0 0 0 0 0 0 0 0 0 139

Compare

Word

(CR)

(C)

0.0

••

000

••

00.

••

0 0

••

0000.

000.

000

140

Compare

Halfword

(CH)

0 0 0 0 0 0 0 0 0 0 • 0 0

••

0 0 • 0 • 0

••

0 0 0 0 0 • 0 0 0 • 0 0 0 141

Multiply \Vord

(MR)

(M)

00.000.

0000000.

••

0 0 • 0 0

00000000000.

142

Multiply

Halfword

(MH)

0 0 0 0 0 0 0 0 0 0 0

•••

0 0 o

••

0 0 • 0 0 0 0 0 0 0 0 0 0 0 0

143

Divide

(DR)

(D)

0 0 0 • 0 0 0 • 0 • 0 • 0 0 0 0 0 • 0 0

••••

•••

0 0 0 0 0 0 0 0 0 0 0 0 144

Convert

Binary

(CVB)

00000000.

0 0 0

•••

•••••

0 • 0 0 0

000000000

145

Convert

Decimal

(CVD)

..........................

0 • • • • •

••

146

Store

Word

(ST)

000

••

0000

••

•••••••••••••••••••

••••

0...

147

FIXED-POINT

INSTRUCTIONS

(Cont'd)

DECIMAL

ARITHMETIC

INSTRUCTIONS

CONTENTS

(Cont'd)

Page

Store Halfword

(STH)

......................................

148

Store

Multiple (STM)

.......................................

149

Shift

Left

Single (SLA)

.....................................

150

Shift

Right

Single (SRA)

...................................

151

Shift

Left

Double (SLDA)

..................................

152

Shift

Right

Double (SRDA)

.................................

153

Introduction

................................................

154

Data

Formats

....................................

. . . . . . . . .

154

Representation

Numbers

..................................

155

Instruction

Format

..........................................

155

Condiiion Code Utilization

...............................

. . .

156

Interrupt

Action.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

156

Add Decimal

(AP)

..........................................

158

Subtract

Decimal

(SP)

.......................................

159

Zero

and

Add

(ZAP)

........................................

160

Compare Decimal (CP)

......................................

161

Multiply Decimal

(MP)

......................................

162

Divide Decimal

(DP)

........................................

163

Pack

(PACK)

...............................................

164

Unpack

(UNPK)

............................................

165

Move

with

Offset (MVO)

.....................................

166

LOGICAL

Introduction

...............................................

, 167

INSTRUCTIONS

Data

Format

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

167

Instruction

Formats

.........................................

168

Condition Code Utilization

...................................

169

Interrupt

Action . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

169

Move (MVI) (MVC)

........................................

170

Move Numerics (MVN)

.....................................

171

Move Zones (MVZ)

.........................................

172

Test and

Set

(TS)

.........................................

173

Compare Logical (CLR) (CL) (CLI) (CLC)

..................

174

AND

(NR)

(N)

(NI)

(NC)

.................................

175

OR (OR)

(0)

(01)

(OC)

...................................

176

Exclusive

(XR) (X)

(XI)

(XC)

..........................

177

Test

Under

Mask (TM)

......................................

178

Insert

Character

(IC)

.......................................

179

Store

Character

(STC)

.......................................

180

Load Address (LA)

..........................................

181

Translate

(TR)

.............................................

182

Translate

and

Test

(TRT)

....................................

183

Edit

(ED)

..................................................

184

Edit

and

Mark

(EDMK)

.....................................

187

Shift

Left

Single Logical (SLL)

..............................

189

Shift

Right

Single Logical (SRL)

............................

190

Shift

Left

Double Logical (SLDL)

...........................

191

Shift

Right Double Logical (SRDL)

..........................

192

BRANCHING

INSTRUCTIONS

FLOA

TING-POINT

INSTRUCTIONS

OPTIONAL

FEATURES

APPENDICES

CONTENTS

(Cont/d)

Page

Introduction

................................................

193

Sequential

Execution

.......................................

" 193

Instruction

Formats

.........................................

193

Interrupt

Action.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

194

Branch

Condition

(BCR)

(Be)

...........................

195

Branch

and

Link

(BALR)

(BAL)

............................

196

Branch

Count

(BCTR)

(BCT)

............................

197

Branch

Index

High

(BXH)

...............................

198

Branch

Index

Low

Equal

(BXLE)

.....................

199

Execute

(EX)

..............................................

200

Introduction

................................................

201

Data

Formats

.............................................

201

Representation

Numbers

.................................

" 202

Normalization

...............................................

202

Instruction

Formats

.........................................

202

Condition Code

Utilization

..................................

" 203

Interrupt

Action

............................................

204

Load

(LER)

(LE)

(LDR)

(LD)

..............................

205

Load

and

Test

(LTER)

(LTDR)

.............................

206

Load

Complement

(LCER)

(LCDR)

..........................

207

Load

Positive

(LPER)

(LPDR)

..............................

208

Load

Negative

(LNER)

(LNDR)

............................

209

Add

Normalized

(AER)

(AE)

(ADR)

(AD)

.................

210

Add

Unnormalized

(AUR)

(AU)

(AWR)

(AW)

..............

212

Subtract

Normalized

(SER)

(SE)

(SDR)

(SD)

...............

213

Subtract

Unnormalized

(SUR)

(SU)

(SWR)

(SW)

............

214

Compare

(CER)

(CE)

(CDR)

(CD)

..........................

215

Halve

(HER)

(HDR)

........................................

216

Store

(STE)

(STD)

.........................................

217

Multiply

(MER)

(ME)

(MDR)

(MD)

.........................

218

Divide

(DER)

(DE)

(DDR)

(DD)

............................

219

Feature

5001-46 -

Memory

Protect

...........................

220

Feature

5002-46 -

Elapsed

Time

Clock.

. . . . . . . . . .

. . . . . . . . .

220

Feature

5019-46 -

Elapsed

Time

Clock.

. . . . . . . . . . . . . . . . . . . . .

221

Feature

5003-46 -

Direct

Control

.............................

221

Feature

5040 -Selector

Channel

.............................

221

Feature

5041-

Selector

Channel

.............................

221

Feature

5042 -Selector

Channel

.............................

221

A -

Summary

Instructions

................................

224

B -

Program

Interrupts

...................................

" 237

C -

Input/Output

Service

Request

............................

239

D -

Extended

Binary-Coded-Decimal

Interchange

Code

..........

240

E -

USA

Standard

Code

for

Information

Interchange..

. . . . . . .

241

F -

Character

Codes

........................................

242

G -

Powers

Two Table

...

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

247

H-

Hexadecimal-Decimal

Number

Conversion. .. .. . . . . . .

.. .

248

I -

Scratch-Pad

Memory

Layout

and

Assignments

253

vii

LIST

TABLES

LIST

ILLUSTRA

liONS

CONTENTS

(Cont'd)

Page

Table

Basic Hexadecimal

Marking

System

..................

Table

Use

General

Registers.

. . . . . . . . . . . . . . . . . . . . . . . . . . .

Table

2A.

Analysis of Model 70/46 Move

Instruction

Results

...

Table 2B. Analysis

Overlapped

and

Non-Overlapped

Fields

Model 70/46 Move

Instruction.

. . . . . . . . . . . . . . . . . . . . . 15

Table 3. Processor

State

Registers

...........................

Table

Instruction

Length

Codes

...........................

Table

Interrupt

State

Identifier Codes . . . . . . . . . . . . . . . . . . . . . . 18

Table

Program

Indicator

Codes

...........................

Table

Addressing

Processor

States

. . . . . . . . . . . . . . .

Table

Interrupt

Conditions

and

Priority

...................

Table

Interrupt

Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 10. Command Code Operations

.........................

Table 11.

Input/Output

Channel Registers

.....................

Figure

Data

Formats

...................................

Figure

70/46

Translation

Flow

...........................

Figure

3. Functional Logic

Automatic

Interrupt

...........

Figure

Functional Logic

Program

Control

Instruction

...

Figure

Functional Logic

Start

Device

Instruction

........

Figure

Functional Logic

Halt

Device

Instruction

........

Figure

Functional Logic of

Test

Device

Instruction

........

Figure

Functional Logic

Check Channel

Instruction

......

Figure

Functional Logic

Servicing a

Data

Transfer

......

Figure

10. Functional Logic

End

and

Chaining

Servicing

....

Figure

11. Functional Logic

Interrupt

Servicing

...........

Figure

12. Dual-Processor Complex

...........................

Figure

13.

Master/Satellite

Complex

..........................

Figure

14. Maximum Multi-Processor Complex

................

viii

INSTRUCTION INDEX

The

index

marks

the

right

edge

this

page

line

with

similar

index

marks

the

text.

merely

examining

the

page edges,

the

reader

can

quickly locate a

Manuali Hardware per computer popolari di altre marche

EMC2

EMC2 VNX Series Manuale del proprietario

Panasonic

Panasonic DV0PM20105 Manuale utente

Mitsubishi Electric

Mitsubishi Electric Q81BD-J61BT11 Manuale utente

Gigabyte

Gigabyte B660M DS3H AX DDR4 Manuale utente

Raidon

Raidon iT2300 Manuale utente

National Instruments

National Instruments PXI-8186 Manuale utente

Hauppauge

Hauppauge WinTV-HVR-2250 Manuale utente

Kontron

Kontron CP6002 Manuale utente

Manhattan

Manhattan 702843 Manuale utente

Aphex

Aphex 230 Manuale utente

AMD

AMD Phenom II Manuale operativo

Intel

Intel NUC 12 Pro Manuale utente

dbx

dbx Zone Pro 1260 Manuale utente

Galaxy

Galaxy GHDX2-2430S-24F4D Manuale utente

Intel

Intel AXXRMFBU4 Manuale utente

Kontron

Kontron DIMM-PC/MD Manuale utente

ST X-NUCLEO-SAFEA1B Istruzioni operative

STEINWAY LYNGDORF

STEINWAY LYNGDORF SP-1 Manuale utente