Sharp PC-E500 Manuale utente

SHARP

1.

Product

outline

The

PC-E500

employs

the

large

display

(40

digits

x

4

lines)

and

32KB

memory

(standard).

2.

Specifications

Model

name

Display

Calculation

digit

Calculation

system

Program

language

CPU.

System

ROM

Memory

capacity

Stack

Basic

calculation

functions

:

PC-E500

:

40

digits

x

4

lines

(5

x

7

dot

matrix

liquid

crys-

tal

display)

:

Single

accuracy

calculation;

10

digits

(Mantis-

sa)

+

2

digits

(Exponent)

Double

accuracy

calculation;

20

digits

(Man-

tissa)

+

2

digits

(Exponent)

In

CAL,

MATRIX,

or

STAT

mode,

calculation

is

performed

in

single

accuracy.

:

In

theysequence

of

formula.

(Priority

judge-

ment

function)

:

BASIC

:

CMOS

8

bit

CPU

:

128K

Byte

:

System

area

about

3.8

K

Byte

Fixed

variable

(A

~

Z)

area

312

Byte

Program

data

area

28600

Byte

:

Total

145

Byte

Subroutine;

4

Byte

for

one

stage

FOR-NEXT;

21

Byte

for

one

stage

:

Basic

calculations;

Addition,

subtraction,

multiplication,

division

Functional

calculation;

Trigonometric

function,

reverse

trigonometric

function,

hyperbolic

function,

reverse

hyper-

bolic

function,

logarithm,

exponent,

angle

conversion,

power,

power

root,

coordinate

conversion,

extraction

of

the

square

root,

in-

tegration,

absolute

value,

code

function,

pi,

etc.

SHARP

CORPORATION

PC-E500

SERVICE

MANUAL

CODE:00ZPCE500SM/E

mopEL

PC-E500

Edit

function

Serial

1/0

machine

Communication

system

Communication

speed

Parity

bit

Word

length

Stop

bit

Connector

Output

signal

level

Interface

signal

Memory

protection

Operating

temperature

Power

source

Battery

operating

time

Power

consumption

External

dimension

_

Weight

Accessories

:

Cursor

shift,

right/eft

(4,

>)

Insertion

(INS)

Delete

(DEL,

BS)

Line

up,

down

(T,

4)

:

Start-stop

synchronous

(asynchronous).

sys-

tem,

half

duplex/total

duplex

mode

:

300, 600,

1200,

2400,

4800,

9600bps

(bit

per

second)

:

Even

number,

odd

number,

none

:

7,

8

bit

:

1,2

bit

:

15-pin

connector

(for

connection

with

external

devices)

:

C-MOS

level

(4

-

6V)

:

Input

......

RD,

CS,

CD

Output

......

SD,

RS, RR,

ER

Others

......

SG,

FG,

VC

:

Battery

backup

(Backups

the

program

and

data

when

the

power

is

turned

off.)

>

0~40°C

:

DC

6V

(ROS

x

4)

:

About

70

hours

of

continuous

operation

(Under

the

operating

temperature

of

20°C,

10

minutes

of

calculation

or

program

execution

and

50

minutes

of

display

for

every

hour).

,

+

There

may

be

some

variation

depending

on

the

operating

environment

and

using

condi-

tions.

:

0.07W

:

200mm

(W)

x

100mm

(D)

x

14mm

(H)

:

250g

(Including

the

battery)

:

Hard

cover,

RO3

battery

x

4,

Instruction

Manual

This

document

has

been

published

to

be

used

for

after

sales

service

only.

The

contents

are

subject

to

change

without

notice.

PC-E500

3.

System

configuration

Pocket

computer

PC-E500

Cassette

interface

RS-232C

CE-124

Level

converter

CE-130T

Personal

computer

MZ

series,

etc.

(The

RS-232C

function

is

required.)

Printer

&

cassette

interface

CE-126P

CE-212M

(8K

Byte)

CE-2H16M

(16K

Byte)

resiort

Sot

rhe

For

section

*,

a

cable

-2H64M

(64K

Byte

:

(

yte)

corresponding

to

the

model

is

required.

Coior

plotter

printer

Pocket

disk

drive

:

CE-515P

CE-140F

4.

PC-E500

system

block

diagram

.

-

LCD

LF7448G

DC-DC

converter

Column

(1)

HD61202

Common

HD61203

Ic

e

IRQ

9

79)

Q

<

$C62015B01

3G

=

Ceralock

=|

«

2.30MG

&

ROM

LH5320

X

4

ee

>

Seer

Key

matrix

114

15

(SIO)

5.

Memory

map

&H40000

[-

:

32K

RAM

16

CRAM

a

eae

me

eakRam

|

SC

card

&H47FFF

&H4FFFF

Py

&HB8000

:

Built-in

RAM

(32KB)

&HBFFFF

&HEOO0O

Built-in

ROM

(128KB)

&HFFFFF

6.

LSI

description

8K

RAM

card

BHASFFE

&H41

FFF

CPU

(SC62015)

terminai

signal

description

1

Output

vec

Power

RESET

input

GND

Power

~

TEST

\

Input

Cl

Input

co

Output

ON

Input

WR

Quipyt

MRQ

-

54

KO14

Output

55

KO13

Output

56

KO12

Output

inpwWOupa

KO15

Output

—

Ceramic

oscillation

output

Ceramic

oscillation

input

CR

oscillation

output

CR

oscillation

input

Display

power

(converter)

control

output

©

power

input

terminal

Reset

input.

Reset

at

high

level.

©power

input

terminal

Test

input

Cassette

signal

input

terminal

Cassette

signal

output

terminal

ON

key

input

terminal.

Normally

pulled

down

to

low

level.

Write

clock.

Normally

high

level.

(Not

used.)

Key

input

terminal

Data

bus

Address

bus

(Not

used.)

Clock

output

terminal

for

display

chip

SIO

PRQ

(Not

used.)

SIO

ER,

High

level

with

OPEN

command.

SIO

RR

(Reception

in

the

main

body

side

allowed)

SIO

RS

(Send

request

in

the

main

body

side)

Key:

strobe

signal

Low

battery

detection

input

terminal

Signal

description

PC-E500

pau

(Not

used.)

(Not

used.)

(Not

used.)

Input

7.

Low

battery

detection

circuit

The

PC-E500

is

equipped

with

the

low

battery

detection

circuit.

The

operations

of

the

circuit

are

described

below.

(Part

location

numbers

may

differ

from

those

in

the

actual

circuit

diagram.)

When

input

voltage

VIN

exceeds

the

detection

voltage

VD,

the

output

of

the

voltage

detection

IC

[LBIC(MN1280)]

is

driven

from

Low

to

High.

When

VIN

falls

under

VD,

the

output

is

driven

from

High

to

Low.

~The

LBIC

(MN1280)

detects

both

the

CAU

level

and

the

STOP

level

by

dividing

the

voltage

applied

to

the

input

terminal

(2

pin)

with

Rit

and

R2

and

by

turning

on/off

R2

with

CAU

signal

of

G-A.

When

the

power

voltage

falls

under

the

CAU

level,

as

shown

in

Fig.

3,

the

BATT

symbol

lights

up.

When

the

power

voltage

falls

further

under

the

STOP

level,

the

symbol

goes

off.

For

CAU

level

detection,

the

CPU

ES

it

turned

on

(low

level)

and

the

CPU

IRQ

terminal

state

is

observed.

(if

the

IRQ

is

at

Low

level,

the

symbol

lights

up.)

When

the

CAU

level

is

detected,

the

CPU

ES

terminal

is

turned

off

(high

impedance).

(When

the

CPU

E3

terminal

is

turned

off,

resistor

division

is

not

performed

and

the

voltage

at

LBIC

2

increases,

driving

the

output

from

Low

to

High.)

The

CPU

IRQ

terminal

state

is

checked

again

to

detect

the

STOP

level

SiO

PAK

(Not

used.)

Signal

description

ROM

ecard

chip

select

signa!

(active

high)

Chip

select

signal

for

display

chip

(Active

high)

Internal

ROM

chip

enable

signal

RAM

card

chip

enable

signal

internal

RAM

chip

enable

signal

Output

|

Key

strobe

signal

2

Output

Input

SIO

RD

(Receive

data)

Output

SIO

SD

(Send

data)

Input

CE-140F

data

input

terminal

input

Input

Output

11

DIN

Output

11

DOUT

Output

11

102

Output

11

101

Input

11

ACK

Output

11

BUSY

-

(Not

used.)

Output

Display

power

(converter)

control

signal

Output

Low

battery

voltage

control

signal

Input

SIO

CS

(Opponent

side

send

enable)

Input

SIO

CD

(Opponent

side

send

request)

After

the

STOP

level

is

detected,

the

ON

key

and

the

RESET

key

be-

come

ineffective.

10000

~

1FFFF

00000

~

O3FFF,

08000

~

OBFFF

C0000

~

FFFFF

40000

~

7FFFF

80000

~

BFFFF

P-ch

open

output

P-ch

open

dutput

P-ch

open

output

P-ch

open

output

P-ch

open

output

CPU

IRQ

GPU

E3

N-ch

open

Fig.

3

Voltage

detection

IC

operational

description

Low

battery

detection

circuit

check

CAU

level

VCC

—

GND:

4.2V

to

4.6V

STOP

level

VCC

-

GND:

3.8V

to

4.2V

8.

Current

consumption

check

.

DC

+5.0V

is

supplied

to

11-pin

connector

No.2

(VCC)

and

OV

to

No.3

(GND).

ON

(BASIC

mode

">"

is

displayed);

3.24mA

or

less

OFF

(Power

off);

64:4

or

less

OS

Power

source:

eo”,

Current:

Actual

use

(Max.)

$C62015801

(CPU)

RUN

~

4=2304KHz

4.2mA

e

During

display

2202A

e

OFF

SpA

e

LH5320x1

(2Mb

ROM)

RUN

tac=120ns

7OmA

f*#306KHz

4.59mA:

:

HLT

1SpA

&

e

HM62256LFP—12SLT

RUN

tace120ns

7OmMA

fei

53kHz,

1.29MA

(82KB

RAM)

HLT

100pA

-

PC—ES00

9.

Note

for

servicing

9-1.

Battery

holding

cushion

attachment

1~1.5

Battery

holding

Reference

,

cushion

Battery

lid

9-2.

Battery

holding

cushion

attachment

Reference

Bottom

cabinet

Battery

hoiding

cushion

PC-E500

9-3.

Battery

replacement

label

attachment

Bottom

cabinet

i}

Battery

replacement

caution

label

(A)

TLABH1266ECZZ

|

*

Must

be

free

from

tilt.

9-4.

Shield

tape

attachment

Shieid

tape

A

ae

-Reference

Note:

When

attaching

to

the

boss

ss

section,

attach

neatly

along

the

boss.

ute

Shield

tape

vale

|

Bottom

cabinet

Attachment

procedure

boss

Shield

tape

A

1)

Remove

the

separation

paper

in

side

B,

and

bend

section

C

and

D

as

shown

below.

2)

Fitthe

A

side

with

the

reference,

and

paste

the

B

side.

3)

Remove

the

separation

paper,

and

attach

the

tape.

Q)

«~

Fold.

Adhesive

side

4)

Attach

the

three

boss

sections.

(Fit

the

boss

holes

with

the

shield

tape

holes.)

5)

Attach

the

tape

so

that

there

is

no

slack.

Shield

tape

B

1)

Bend

E

section.

(Similar

to

C

section.)

2)

Fit

with

the

reference

and

attach

so

that

ai

and

a2

are

even.

3)

Attach

the

boss

section.

(Fit

the

boss

hole

and

the

shield

tape

hole.)

:

4)

Attach

the

tape

so

that

there

is

no

slack.

\

9-5.

Main

PWB

replacement

procedure

@

Press

the

OFF

key.

(If

a

RAM

card

is

installed,

remove

it.)

@®

Switch

the

select

switch

from

A

to

B.

@

Replace

all

the

four

batteries

with

new

ones.

@

Press

the

RESET

switch.

®

Switch

the

select

switch

from

B

to

A.

{Install

the

RAM

card.)

—

Arm®

—

PC-E500

9-6.

Memory

backup

battery

cover

attachment

@®

Hang

the

battery

on

the

larger

pawl.

®

Push

the

battery

to

hang

on

the

smaller

paw!.

©

Hang

the

battery

cover

pawi

on

the

cabinet,

and

push

it

to

attach.

®

tighten

the

screw

to

fix.

9-7.

Memory

backup

battery

replacement

When

replacing

the

memory

backup

battery,

be

sure

to

instal!

four

batteries

(RO3

x

4).

(Use

unexhausted

ones.)

Ot

+0

Replace

the

battery

in

procedures

(1)

to (6)

as

shown

in

the

figure.

Memory

backup

.

battery

HL

~re

caution

label

*

Paste

the

label

correctly

in

position.

9-9.

Battery

insulation

sheet

attachment

Attach

the

insulation

sheet

to

the

center

so

that

dimensions

A

(4

posi-

tions)

are

all

the

same.

9-10.

Battery

replacement

label

B

attachment

Card

lid

(inner

side)

|

MEMORY

BACKUP

BATTERY

REPLACEMENT

WHEN

REPLACING

THE

MEMORY

BACKUP

BATTERY,

MAKE

SURE

THAT

THE

INSTALLED

OPERATING

BATTERIES

(TYPE-AAA:RO3

x

4)

ARE

NOT

LOW.

FOLLOW

THE

STEPS

@

TO

@

AS

SHOWN

IN

THE

FIGURE.

Battery

replacement

label

B

MEMORY

BACKUP

BATTERY

Reference

*

Must

be

free

from

tilt.

9-11.

Insulation

spacer

attachment

1)

Solder

the

battery

terminal

®.

2)

Take

the

insulation

spacer

with

tweezers

and

insert

under

the

bat-

tery

terminal

from

side

@.

(Note

that

the

paste

side

is

the

battery

terminal

side.)

9-12.

Insulation

sheet

attachment

Insulation

sheet

*

Attach

the

insulation

sheet

so

that

it

does

not

cover

the

spring

by

s

minimizing

dimension

A

and

maximizing

dimension

B.

—~6-—

on

10.

Check

software

for

servicing

*

Check

item

(1)

Liquid

crystal

visual

check

(alternate

display)

(2)

Mask

ROM

verify

check

(3)

Built-in

RAM

read/write

check

(4)

11

/O

check

-

(5)

15

VO

check

(8)

RAM

card

read/write

check

¢

Required

tools

Jig

UKOGC3020CSZZ:

Used

for

(4)

and

(5).

*

Outline

of

using

method

Before

inputting

a

check

software,

clear

the

RAM

completely.

When

check

(6)

is

executed,

the

RAM

card

content

is

deleted.

Save

programs

and

data

before

check,

if

necessary.

<MENU>

MENU

screen

4:

DISP

2:

ROM

3:

RAM

er

4:

11PIN

5:

15PIN

6:

CARD

i)

Key

input

(1)

DISP

(display)

check

@

Key

input

(2)

Mask

ROM

check

(3)

Key

input

(3)

Built-in

ROM

check

en

Key

input

(4)

11

check

(e)

Key

input

(5)

15

check

Key

input

(8)

RAM

card

check

Note:

To

end

a

check,

press

the

BRK[ON]

key.

*

Details

of

each

check

(1)

DISP

(display)

check

MENU

screen

\a

3

Alternate

display

*

All

symbols

light

up.

a)

ee

Alternate

reversion

fe

all

symbols

go

off.

\d

MENU

screen

PC-E500

(2)

Mask

ROM

check

MENU

screen

\@

ROM

CHECK

(WAIT

6

SEC)

Buzzer

(Once)

ROM

CHECK

(WAIT

6

SEC)

ERROR!

Buzzer

(3

times)

ROM

CHECK

(WAIT

6

SEC)

EX

Ver.

1

(LH5320XH)

ROM

CHECK

OK!

MENU

screen

(3)

Built-in

RAM

check

MENU

screen

Buzzer

(once)

Buzzer

RAM

CHECK

ERRORI!

(3

times)

RAM

CHECK

OK!!

MENU

screen

PC-E500

(4)

11

check

MENU

screen

11PIN

CHECK

Y

Buzzer

(Once)

11PIN

CHECK

1130

ERROR!

Buzzer

(3

times)

41PIN

CHECK

OK!!

MENU

screen

(5)

15

check

MENU

screen

15PIN

CHECK

Buzzer

Y

Buzzer

(Once)

(3

times)

15

CHECK

1

40

ERRORI!

15PIN

CHECK

OKI!

MENU

screen

¢

The

error

code

in

11

check

or

15

check

means

as

fol-

lows:

Check

No.

Normal

value

_———

Error

value

1

13

=+0

¢

For

details

of

error,

see

“Error

code

description”.

(6)

RAM

card

check

MENU

screen

CARD

CHECK

1:

2KB

2:

4KB

3:

8KB

4:

16KB

5:

32KB

6:64KB

(In

case

of

32KB

card)

CARD

CHECK

1:

2KB

2:

4KB

3:

‘8KB

4:

16KB

5:

32KB

6:

32KB

CARD

RAM

32KB

Y

_

Buzzer

(Once)

CARD

CHECK

2KB

2:

4KB

3:

2KB

Buzzer

(3

times)

CARD

CHECK

1:

2KB

2;

4KB

3:

8KB

4:

16KB

5:

32KB

6:

64KB

_.

CARD

RAM

32KB

OK!!

MENU

screen

«

RAMcard

address

map

ooo00

2KB:

40000H

~

407FFH.

4KB:

40000H

~

40FFFH

©

aeePOTCARD|

—_8KB:

40000H

~

41FFFH

16KB:

40000H

~

43FFFH

32KB:

40000H

~

47FFFH

64KB:

40000H

~

4FFFFH

FFFFF

*

Addresses

are

checked

from

higher

one

to

lower

one,

and

the

error

address

found

first

is

displayed.

PC-E500

Check

software

e

*

145

check

code

table

Error

code

description

Nanlad:aeat

I

*

HOHLea=

$ABAN]

ATI

G86T

Tealaq

Nafilad

eset

LOS

$46

E6998

GY

SCES

TAS

Obst

BNGd

aGGT

BOSSE

PrESHT

BEL

S193

pG3

(Ags

SPOR

aZa+h

GOS

PSs

ELS

Ass

:

‘Ta3

oa

POSFILE

EGR

ENS

FEES

Sed

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Sharp PC-E500 Manuale utente

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