Siemens SMP16-CPU06 Series Manuale utente

SICOMP Industrial Microcomputer

(4)J31069-D2085-U001-A2-7618

Technical Description

Order No.: 6AR1930-0AA07-2CA0 February 2001

SMP16-CPU06x

SMP16-CPU065, SMP16-CPU066

SMP16-AT CPU Boards with Pentium II/III Processor

SMP16-CPU06x

2(4)J31069-D2085-U001-A2-7618

List of changes to the technical description

Release 1) Overview of Changes Date of

Release

A0 First edition 11/99

A1 Addition of KS02 functions 07/00

A2 Addition of theSMP16-CPU066 02/01

1Is the 4th block of digits of the drawing number in the footer

Explanation of the notation

* / # An asterisk or a pound character behind the name of a signal indicates a low-active signal

(e.g., IOR* / FRAME#).

/A slash between two signal names separates two level-dependent functions of a signal.

(Example: C/D* means high level for a "command" and low level for "data").

–Connections indicated with a dash in a plug connector allocation table (bus or I/O interface)

are reserved.

Signal Special signals not included in the specifications are shown in bold type in the signal

allocation tables and then explained at the end (e.g., NMI).

Notes:

SICOMP® is a registered brand of Siemens AG.

IBM AT® and IBM PC® are registered brands of International Business Machines Corp.

INTEL® is a registered brand of INTEL Corp.

MS-DOS®, Windows® and Windows NT® are registered brands of Microsoft.

All other designations in this documentation may be brands whose use by third parties for their own purposes may violate the

rights of the owner.

Passing on and duplication of this document as well as use and revelation of its contents is not permitted without express

model is registered.

With respect to freedom from rights of third parties, no liability is assumed for the specified circuits, descriptions and tables.

Technical descriptions specify products but do not guarantee characteristics. The product described in this documentation may

require licensing. Please check with your Siemens office.

Subject to delivery capacity and technical changes without prior notice TD1/Ka/WW8.0/VS5.0/A4

SMP16-CPU06x

(4)J31069-D2085-U001-A2-7618 3

Notes on safety for SICOMP boards

Qualified personnel

A device may only be commissioned and operated by qualified personnel. For the purposes of the

safety notes in this manual, qualified personnel are persons who are authorized to commission,

ground and tag devices, systems and electrical circuits in accordance with safety standards.

ESD protective measures

Caution

Always adhere to ESD (Electrostatic Sensitive Device) guidelines when handling boards

and other components

marked with this symbol.

•Never touch the boards unless necessary work makes this unavoidable.

•When handling the boards, use a conductive and grounded work surface.

•Wear a grounding bracelet.

•Never touch chip pins, component connections or circuit board conductors when handling the boards.

•Never allow boards or components to touch chargeable objects (plastics).

•Never place components or boards in the vicinity of cathode ray tube units or television sets (minimum

distance: 10 cm).

•Leave the boards in their special packaging until you are ready to use them. Do not take the boards out of

their packaging or touch them when registering them and so on.

•Boards may only be installed or removed when the power is off.

Wiring of bus backplanes

System-related signal wiring is done with wrap connections for SICOMP board systems. The power

supply cables are plug-in or screw-type connections which are bundled together with cable binders.

Attention

Keep all signal wiring (particularly the interrupt signal lines) as short as possible. If long signal cables

cannot be avoided, use twisted pair wiring.

Related SICOMP literature

See the SICOMP IMC system manual for more information on installing and handling SICOMP

boards.

SMP16-CPU06x

4(4)J31069-D2085-U001-A2-7618

SMP16-CPU06x

(4)J31069-D2085-U001-A2-7618 5

Table of Contents

1Introduction 9

2Technical Data 11

3Initial Commissioning 15

3.1 Settings on the Hardware 16

3.2 Layout and Special Wiring of the Bus Backplane 17

3.2.1 SMP16-CPU065 17

3.2.2 SMP16-CPU066 18

3.3 Switching from SMP16-CPU055 to SMP16-CPU065 19

3.4 Scope of Delivery 21

4Features 23

4.1 Microprocessor 26

4.2 Memory 26

4.2.1 BIOS 26

4.2.2 Working Storage 26

4.2.3 Serial EEPROM 26

4.2.4 SRAM Memory 26

4.3 Chip Set 27

4.3.1 Power Management 27

4.3.2 System Management Bus 27

4.3.3 Counters and Timers 27

4.3.4 DMA Controller 28

4.3.5 Interrupt Controller 28

4.3.6 NMI Generation 31

4.3.7 Bus Timing 32

4.3.8 Addressing the Loudspeaker 32

4.4 Drive Controller 33

4.5 LAN Controller 34

4.6 VGA Graphics Expansion 34

4.7 Realtime Functions 41

4.7.1 Additional Counter/Timer Block 41

4.7.2 Additional Interrupt Controller 43

4.7.3 Digital Inputs/Outputs 44

4.8 Safety Functions 45

4.8.1 Voltage Monitoring 45

4.8.2 Battery Buffering 45

4.8.3 Watchdog 45

4.8.4 Temperature Monitoring 46

4.8.5 Password Protection 46

4.8.6 LEDs 46

4.9 Operation without Fan 48

4.9.1 Setting via Setup 48

4.9.2 Regulated Operation 48

SMP16-CPU06x

6(4)J31069-D2085-U001-A2-7618

4.10 Operational Values 49

4.10.1 Operational Values of theSMP16-CPU06x 49

4.11 System Configuration 50

4.11.1 System Layout of the SMP16-CPU065 50

4.11.2 System Layout of the SMP16-CPU066 52

4.11.3 Operation of SMP16 Boards 53

4.12 Overview of the Interfaces 55

4.13 Ambient Conditions 56

4.14 Recommended Accessories/Replacement Parts 57

4.15 Recommended Reading 58

5Interfaces 60

5.1 Bus Interfaces 60

5.1.1 Signals of the IPCI Socket Strip 60

5.1.2 Signals of the CPCI Socket Strip 61

5.1.3 Signals on the SMP16 Bus 63

5.1.4 Special Signals of the SMP16 Bus 64

5.2 Drive Interfaces 66

5.2.1 Signals of the UNI-I/O Interface (SMP16-CPU065) 66

5.2.2 Signals of the Rear Panel I/O Interface (SMP16-CPU066) 67

5.2.3 Signals of the Hard Disk Interface (40-Pin) 68

5.2.4 Signals of the Hard Disk Interface (44-Pin) 69

5.2.5 Signals of the Floppy Disk Interface (34-Pin) 70

5.3 Front Plate Interfaces 71

5.3.1 USB Bus Interfaces 71

5.3.2 Signals of the Keyboard Interface 71

5.3.3 Signals of the Serial Interfaces - COM A / COM B 72

5.3.4 Signals of the LAN Interface (RJ45) 72

5.3.5 Parallel Interface - LPT1 73

5.3.6 CRT/LVDS Connection 74

5.3.7 PanelLink Connection 75

6Commissioning 76

6.1 Wiring of the Power Supply 76

6.2 Settings on the Hardware 77

6.3 Deleting the CMOS Configuration 81

6.4 Wiring of the Interrupts 82

6.5 Changing the Fuses 82

7Notes on Programming 84

7.1 Memory Address Areas 84

7.2 Input/Output Address Areas 86

7.2.1 Input/Output for Internal Board Registers 88

7.2.2 Manual Throttling Register 103

7.2.3 General Purpose Ports (GPP) 104

7.2.4 SMB Register Set 105

7.2.5 Memory Input/Output on the SMP16 Bus 108

7.2.6 Direct Input/Output for SMP16 AT Boards 109

SMP16-CPU06x

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7.2.7 Direct Input/Output for SMP16 I/O Boards 110

8Driver Software 112

8.1 LAN Drivers 112

8.2 Graphics Drivers 112

8.3 IOS 113

8.4 LAN Boot BIOS 113

8.5 Board Support Package 113

9BIOS 114

9.1 BIOS Setup 114

9.1.1 Starting Setup 114

9.1.2 Exiting Setup 117

9.1.3 Setup Page - "Standard CMOS Setup" 118

9.1.4 Setup Page - "BIOS Features Setup" 121

9.1.5 Setup Page - "Chipset Features Setup" 124

9.1.6 Setup Page - "Power Management Setup" 126

9.1.7 Setup Page - "PNP/PCI Configuration" 128

9.1.8 Setup Page - "Load BIOS Defaults" and "Load Setup Defaults" 130

9.1.9 Setup Page - "Integrated Peripherals" 131

9.1.10 Setup Page - "IMC Miscellaneous" 133

9.1.11 Setup Page - "Password Setting" 135

9.1.12 Setup Page - "IDE HDD Auto Detection" 135

9.1.13 Setup Page - "Save & Exit Setup" 136

9.1.14 Setup Page - "Exit Without Saving" 137

9.1.15 Setup - Default Setting 138

9.2 LAN Boot BIOS 141

9.3 BIOS Flash Memory 142

9.4 ROM-BIOS Interrupts 143

9.5 BIOS Data Area 145

10 BIOS Update 148

10.1 System BIOS 148

10.2 The AWDFLASH.EXE Service Program 148

10.3 How To Update Your BIOS 149

10.3.1 System with Graphics Card 149

10.3.2 System with Console Rerouting without Graphics Card 149

11 BSP-CPU06x: RMOS on the SMP16-CPU06x 150

11.1 RMOS and Power Management/Fanless Operation 150

11.2 Installation Program 151

11.3 RMOS Configuration for the SMP16-CPU06x 152

11.3.1 Support of the Secondary EIDE Controller 152

11.3.2 TCP/IP Connection 157

11.3.3 Extra Interrupt Controller 158

11.3.4 SRAM Driver 159

11.3.5 System Generation 162

SMP16-CPU06x

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11.4 Additional Functions 165

11.4.1 Temperature Monitoring 165

11.4.2 Use of the BIOS Flash Memory 166

11.4.3 Use of the Serial EEPROM 176

11.4.4 Use of the Buffered SRAM 178

11.4.5 Description of test program TEST6x.386 192

12 Appendix 193

12.1 Notes on the Different Operating Systems 193

12.1.1 Windows NT 193

12.1.2 Win9x 193

12.1.3 RMOS 193

12.2 Layout of the CMOS RAM and the CDT 194

12.3 Use of the CDT during BIOS Startup 195

12.4 POST Codes 196

12.5 View of the Front Plate of the SMP16-CPU06x 198

12.6 Abbreviations and Terms 200

SMP16-CPU06x Introduction

(4)J31069-D2085-U001-A2-7618 9

1Introduction

The functions of the two SICOMP IMC SMP16 CPU boards are the same. The only difference is the

PCI bus connection with the applicable I/O expansions.

A description of the functionality of the SMP16-CPU066 has been added to the existing technical

description (release A1, July 2000).

Another difference is the decoupling of the secondary EIDE channel and floppy via the I/CPCI

backplane. With the CPCI backplane, the signals for the secondary EIDE channel and the floppy disk

drives are assigned to the area for the rear panel I/O.

An adapter is required to decouple these signals (see chapter 4.14).

Use of the SMP16-CPU065 varies depending on the specific models of the individual boards, while

such differentiation does not apply with the SMP16-CPU066!

The SMP16-CPU066 does not have a PCI-PCI bridge which means that the CPCI backplane bus is

PCI bus 0 of the SMP16-CPU066.

Introduction SMP16-CPU06x

10 (4)J31069-D2085-U001-A2-7618

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