Skyworks Si5332 Manuale utente

Si5332 Data Sheet

6/8/12-Output Any-Frequency Clock Generator

Based on Skyworks' proprietary MultiSynth™ flexible frequency synthesis technology,

the Si5332 generates any combination of output frequencies with excellent jitter perfor-

mance (190 fs rms). The device's highly flexible architecture enables a single device

to generate a wide range of integer and non-integer related frequencies on up to 12

differential clock outputs with 0 ppm frequency synthesis error. The device offers multi-

ple banks of outputs that can each be tied to independent voltages, enabling usage in

mixed-supply applications. Further, the signal format of each clock output is user-config-

urable. Given its frequency, format, and supply voltage flexibility, the Si5332 is ideally

suited to replace multiple clock ICs and oscillators with a single device.

The Si5332 is quickly and easily configured using ClockBuilder Pro™ software. Clock-

Builder Pro assigns a custom part number for each unique configuration. Devices

ordered with custom part numbers are factory-programmed free of charge, making it

easy to get a custom clock uniquely tailored for each application. Using the Si5332's I2C

interface, the device may be user-configured at power-up or internally-configured NVM

programmed with new configuration using the ClockBuilder Pro Field Programmer.

Applications:

• Servers, Storage, Search Acceleration

•Ethernet Switches, Routers

• Small Cells, Mobile Backhaul/Fronthaul

• Print Imaging

• Communications

•Broadcast Video

• Test and Measurement

• Industrial, Embedded Computing

KEY FEATURES

• Any-Frequency 6/8/12-output

programmable clock generators

•Offered in three different package sizes,

supporting different combinations of output

clocks and user configurable hardware

input pins

• 32-pin, up to 6 outputs

• 40-pin, up to 8 outputs

• 48-pin, up to 12 outputs

• MultiSynth technology enables any-

frequency synthesis on any output up to

250 MHz

• Highly configurable output path featuring a

cross point mux

• Up to three independent fractional

synthesis output paths

• Up to five independent integer dividers

• Embedded 50 MHz crystal option

• Input frequency range:

• External crystal: 16 to 50 MHz

• Differential clock: 10 to 250 MHz

• LVCMOS clock: 10 to 170 MHz

• Output frequency range:

• Differential: 5 to 333.33 MHz

• LVCMOS: 5 to 170 MHz

• User-configurable clock output signal

format per output: LVDS, LVPECL, HCSL,

LVCMOS

• Multi-profile configuration support

• Temperature range: –40 to +85 °C

• Down and center spread spectrum

• RoHS-6 compliant

•Si5332 Family Reference Manual

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

1Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 1

Table of Contents

1. Features List ...............................4

2. Ordering Guide ..............................5

3. Functional Description............................6

3.1 Functional Block Diagrams ..........................7

3.2 Modes of Operation ............................9

3.2.1 Initialization .............................9

3.3 Frequency Configuration ..........................9

3.4 Inputs .................................10

3.4.1 External Reference Input (XA/XB) ......................10

3.4.2 Input Clocks .............................10

3.4.3 Input Selection ............................10

3.5 Outputs ................................11

3.5.1 Output Signal Format ..........................11

3.5.2 Differential Output Terminations .......................12

3.5.3 LVCMOS Output Terminations .......................16

3.5.4 LVCMOS Output Signal Swing .......................16

3.5.5 LVCMOS Output Polarity .........................16

3.5.6 Output Enable/Disable ..........................16

3.5.7 Differential Output Configurable Skew Settings..................16

3.5.8 Synchronous Output Disable Feature .....................16

3.6 Spread Spectrum .............................17

3.7 Universal Hardware Input Pins.........................17

3.8 Custom Factory Preprogrammed Parts ......................18

3.9 I2C Serial Interface ............................18

3.10 In-Circuit Programming...........................19

4. Register Map .............................. 20

5. Electrical Specifications .......................... 21

6. Pin Descriptions ............................. 37

6.1 Pin Descriptions (48-Pin) ..........................37

6.2 Pin Descriptions (40-Pin) ..........................42

6.3 Pin Descriptions (32-Pin) ..........................47

7. Package Outline ............................. 51

7.1 Si5332 6x6 mm 48-QFN Package Diagram, External Crystal Versions (Si5332A/B/C/D) .....51

7.2 Si5332 6x6 mm 40-QFN Package Diagram, External Crystal Versions (Si5332A/B/C/D) .....53

7.3 Si5332 5x5 mm 32-QFN Package Diagram, External Crystal Versions (Si5332A/B/C/D) .....54

7.4 Si5332 6x6 mm 48-LGA Package Diagram, Embedded Crystal Versions (Si5332E/F/G/H/L) ....55

7.5 Si5332 6x6 mm 40-LGA Package Diagram, Embedded Crystal Versions (Si5332E/F/G/H/L) ....57

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

2Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 2

7.6 Si5332 5x5 mm 32-LGA Package Diagram, Embedded Crystal Versions (Si5332E/F/G/H/L) ....59

8. PCB Land Pattern ............................ 60

8.1 Si5332A/B/C/D 48-QFN Land Pattern ......................60

8.2 Si5332A/B/C/D 40-QFN Land Pattern ......................62

8.3 Si5332A/B/C/D 32-QFN Land Pattern ......................64

8.4 Si5332E/F/G/H/L 48-LGA Land Pattern......................66

8.5 Si5332E/F/G/H/L 40-LGA Land Pattern......................68

8.6 Si5332E/F/G/H/L 32-LGA Land Pattern......................70

9. Top Marking ............................... 72

10. Revision History............................. 73

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

3Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 3

1. Features List

• Any-Frequency 6/8/12-output programmable clock generators

• Offered in three different package sizes, supporting different

combinations of output clocks and user configurable hardware

input pins

• 32-pin, up to 6 outputs

• 40-pin, up to 8 outputs

• 48-pin, up to 12 outputs

•MultiSynth™ technology enables any-frequency synthesis on

any output up to 250 MHz

• Integer output frequencies up to 333.33 MHz

• Embedded 50 MHz crystal option (E/F/G/H/L grades)

• Highly configurable output path featuring a cross point mux

• Two independent fractional synthesis output paths

• Up to five independent integer dividers

• Ordering options for embedded 50 MHz reference crystal

• Input frequency range:

• External crystal: 16 to 50 MHz

• Differential clock: 10 to 250 MHz

• LVCMOS clock: 10 to 170 MHz

• Output frequency range:

• Differential: 5 to 333.33 MHz

• LVCMOS: 5 to 170 MHz

• User-configurable clock output signal format per output: LVDS,

LVPECL, HCSL, LVCMOS

• Low phase jitter:

• 175 fs RMS (embedded crystal)

• 190 fs RMS (external crystal)

• PCIe Gen1/2/3/4, SRIS compliant

• 1.8 V, 2.5 V, 3.3 V core VDD

• Adjustable output-output delay

• Multi-profile configuration support:

• Store up to 16 input/output configurations in the same cus-

tom part number

• Independent glitchless on-the-fly output frequency changes

• Very low power consumption

• Independent output supply pins for each bank of outputs:

• 1.8 V, 2.5 V, or 3.3 V differential

• 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS

• Programmable spread spectrum

• Down and center spread from 0.1% to 2.5% in 0.01% steps

at 30 to 33 kHz

• Integrated power supply filtering

•Serial interface: I2C

• ClockBuilder Pro software utility simplifies device configuration

and assigns custom part numbers

• Operating temperature range: –40 to +85 °C

• RoHS-6 compliant

Si5332 Data Sheet • Features List

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

4Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 4

2. Ordering Guide

Si5332X DXXXXX - GMpR

D = Product Revision

XXXXX = NVM code. Aa unique 5-digit ordering sequence

will be assigned by ClockBuilder Pro

Operating Temp Range: -40 to +85 C

GM = ROHS-6 compliant package designator

P = 1 for 6-output, 32-pin QFN/LGA

2 for 8-output, 40-pin QFN/LGA

3 for 12-output, 48-pin QFN/LGA

R = Tape & Reel (ordering option)

D = Product Revision

Operating Temp Range: -40 to +85 C

GM = QFN, ROHS6 compliant

p = 1 for 6-output, 32-pin QFN/LGA

2 for 8-output, 40-pin QFN/LGA

3 for 12-output, 48-pin QFN/LGA

R = Tape & Reel (ordering option)

Preprogrammed Devices Using a ClockBuilder Pro Configuration File

Si5332X - D - GMpR

Blank Devices, In-System Programmable

Ordering Part

Number

Input Type Output Clock

Frequency Range

Operating

Temperature Range

Si5332A 5 MHz - 333.33 MHz

Si5332B 5 MHz - 200 MHz

Si5332C 5 MHz - 333.33 MHz

Si5332D 5 MHz - 200 MHz

Si5332E 5 MHz - 333.33 MHz

Si5332F 5 MHz - 200 MHz

Si5332G 5 MHz - 333.33 MHz

Si5332H 5 MHz - 200 MHz

Si5332L 5 MHz - 333.33 MHz

External

Crystal or

Clock

-40 to +85 °C

Integer and Fractional mode

Integer mode only

Integer and Fractional mode Embedded

Crystal or

External

Clock

Integer and Fractional mode

Integer mode only

Integer and Fractional mode

Frequency Synthesis Mode

Integer and Fractional mode

Ordering Part

Number

Input Type Output Clock

Frequency Range

Operating

Temperature Range

Si5332A 5MHz - 333.33MHz

Si5332B 5MHz - 200MHz

Si5332C 5MHz - 333.33MHz

Si5332D 5MHz - 200MHz

Si5332E 5MHz - 333.33MHz

Si5332F 5MHz - 200MHz

Si5332G 5MHz - 333.33MHz

Si5332H 5MHz - 200MHz

Si5332L 5MHz - 333.33MHz

Frequency Synthesis Mode

Integer and Fractional mode

External crystal

or Clock

Integer and Fractional mode

Integer mode only

Integer and Fractional mode

Embedded

crystal or

External Clock

-40 to +85CInteger and Fractional mode

Integer and Fractional mode

Integer mode only

Figure 2.1. Orderable Part Number Guide

Si5332 Data Sheet • Ordering Guide

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

5Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 5

3. Functional Description

The Si5332 is a high-performance, low-jitter clock generator capable of synthesizing up to twelve user-programmable clock frequencies

up to 333.33 MHz. The device supports free run operation using an external or embedded crystal, or it can lock to an external clock

signal. The output drivers support up to twelve differential clocks or twenty four LVCMOS clocks, or a combination of both. The output

drivers are configurable to support common signal formats, such as LVPECL, LVDS, HCSL, and LVCMOS. VDDO pins are provided

for versatility, which can be set to 3.3 V, 2.5 V, 1.8 V or 1.5 V (CMOS only) to power the multi-format output drivers. The core voltage

supply (VDD) accepts 3.3 V, 2.5 V, or 1.8 V and is independent from the output supplies (VDDOxs). Using its two-stage synthesis

architecture and patented high-resolution low-jitter MultiSynth technology, the Si5332 can generate an entire clock tree from a single

device.

The Si5332 combines a wideband PLL with next generation MultiSynth technology to offer the industry’s highest output count high

performance programmable clock generator, with attainable jitter performance below 200 fs RMS. The PLL locks to either an external

16-50 MHz crystal or an embedded 50 MHz crystal for generating free-running clocks or to an external clock (CLKIN_2/CLKIN_2# or

CLKIN_3/CLKIN_3#) for generating synchronous clocks. In free-run mode, the oscillator frequency is multiplied by the PLL and then

divided down either by an integer divider or MultiSynth for fractional synthesis.

The Si5332 features user-defined universal hardware input pins which can be configured in the ClockBuilder Pro software utility.

Universal hardware pins can be used for OE, spread spectrum enable, input clock selection, output frequency selection, or I2C address

select.

The device provides the option of storing a user-defined clock configuration in its non-volatile memory (NVM), which becomes the

default clock configuration at power-up. To enable in-system programming, a power up mode is available through OTP which powers up

the chip in an OTP defined default mode but with no outputs enabled. This allows a host processor to first write a user defined subset of

the registers and then restart the power-up sequence to activate the newly programmed configuration without re-downloading the OTP.

Si5332 Data Sheet • Functional Description

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

6Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 6

3.1 Functional Block Diagrams

Si5332-GM3: 12-Output, 48-QFN/LGA

Multi

Synth

Multi

Synth

INT

NVM

I2C

SCLK

SDATA

HW Input

Control

Input1

Input2

Input3

Input4

Input5

Input6

Input7

VDDO4

OUT9

OUT9b

÷INT

OUT10

VDDO5

OUT10b

÷INT

OUT11

OUT11b

÷INT

Bank D

OUT0

VDDO0

OUT0b

÷INT

VDDO2

OUT3

OUT3b

÷INT

OUT4

OUT4b

÷INT

OUT5

OUT5b

÷INT

Bank B

OUT1

VDDO1

OUT1b

÷INT

OUT2

OUT2b

÷INT

Bank A

VDDO3

OUT6

OUT6b

÷INT

OUT7

OUT7b

÷INT

OUT8

OUT8b

÷INT

Bank C

XTAL OSC

Si5332A/B/C/D: External Crystal

Si5332E/F/G/H/L: Internal Crystal

PLL

÷INT

CLKIN_3

CLKIN_3b

CLKIN_2

CLKIN_2b

INT

Figure 3.1. Block Diagram for 12-Output Si5332 in 48-QFN/LGA

The Si5332-GM3 features:

• Up to twelve differential clock outputs, with six VDDO pins.

• Seven user-configurable HW input pins, defined using ClockBuilder Pro.

Si5332 Data Sheet • Functional Description

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

7Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 7

Si5332-GM2: 8-Output, 40-QFN/LGA

Multi

Synth

INT

Multi

Synth

INT

OUT0

VDDO0

VDDO3

OUT4

OUT1

VDDO1

OUT2

VDDO2

OUT0b

OUT4b

OUT1b

OUT2b

÷INT

NVM

I2C

SCLK

SDATA

PLL

VDDO4

OUT6

OUT6b

÷INT

VDDO5

OUT7

OUT7b

÷INT

OUT3

OUT3b

÷INT

OUT5

OUT5b

÷INT

HW Input

Control

Input1

Input2

Input3

Input4

Input5

Input6

Input7

Bank A

Bank B

CLKIN_3

CLKIN_3b

CLKIN_2

XTAL OSC

CLKIN_2b

Si5332A/B/C/D: External Crystal

Si5332E/F/G/H/L: Internal Crystal

÷INT

Figure 3.2. Block Diagram for 8-Output Si5332 in 40-QFN/LGA

The Si5332-GM2 features:

•Up to eight differential clock outputs, with six VDDO pins.

• Seven user-configurable HW input pins, defined using ClockBuilder Pro.

Si5332 Data Sheet • Functional Description

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

8Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 8

Si5332-GM1: 6-Output, 32-QFN/LGA

Multi

Synth

INT

Multi

Synth

INT

OUT0

VDDO0

VDDO3

VDDO4

VDDO5

OUT3

OUT4

OUT5b

OUT1

VDDO1

OUT2

VDDO2

OUT0b

OUT3b

OUT4b

OUT5

OUT1b

OUT2b

÷INT

NVM

I2C

HW Input

Control

SCLK

SDATA

Input1

Input2

Input3

Input4

Input5

PLL

CLKIN_2

XTAL OSC

CLKIN_2b

Si5332A/B/C/D: External Crystal

Si5332E/F/G/H/L: Internal Crystal

÷INT

Figure 3.3. Block Diagram for 6-Output Si5332 in 32-QFN/LGA

The Si5332-GM1 features:

•Up to six differential clock outputs with individual VDDO.

• Five user-configurable HW input pins, defined using ClockBuilder Pro.

3.2 Modes of Operation

The Si5332 supports both free-run and synchronous modes of operation. The default mode selection is set in ClockBuilder Pro.

Alternatively, two universal hardware input pins can be defined as CLKIN_SEL[1:0] to select between a crystal or clock input. There is

also the option to select the input source via the serial interface by writing to the input select register.

3.2.1 Initialization

Once power is applied, the device begins an initialization period where it downloads default register values and configuration data

from NVM and performs other initialization tasks. Communicating with the device through the serial interface is possible once this

initialization period is complete. The clock outputs will be squelched until the device initialization is done.

3.3 Frequency Configuration

The phase-locked loop is fully integrated and does not require external loop filter components. Its function is to phase lock to the

selected input and provide a common synchronous reference to the high-performance MultiSynth fractional or integer dividers.

A cross point mux connects any of the MultiSynth divided frequencies or INT divided frequencies to individual output drivers or banks

of output drivers. Additional output integer dividers provide further frequency division by an even integer from 1 to 63. The frequency

configuration of the device is programmed by setting the input dividers (P), the PLL feedback fractional divider (Mn/Md), the MultiSynth

fractional dividers (Nn/Nd), and the output integer dividers (R). Skyworks’ Clockbuilder Pro configuration utility determines the optimum

divider values for any desired input and output frequency plan.

Si5332 Data Sheet • Functional Description

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

9Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 9

3.4 Inputs

The Si5332 requires an external 16-50 MHz crystal at its XIN/XOUT pins or the embedded 50 MHz crystal to operate in free-run mode,

or an external input clock (CLKIN_2/CLKIN_2# or CLKIN_3/CLKIN_3#) for synchronous operation. An external crystal is not required in

synchronous mode.

3.4.1 External Reference Input (XA/XB)

An external crystal (XTAL) is used in combination with the internal oscillator (OSC) on Si5332A/B/C/D to produce a low jitter reference

for the PLL when operating in the free-run mode. The Si5332 Reference Manual provides additional information on PCB layout

recommendations for the crystal to ensure optimum jitter performance. Refer to Table 5.4 External Crystal Input Specification (A/B/C/D

Grades) on page 24 for crystal specifications.

For free-running operation, the internal oscillator can operate from a low-frequency fundamental mode crystal (XTAL) with a resonant

frequency of 16 to 50 MHz. A crystal can easily be connected to pins XA and XB without external components, as shown in the figure

below. Internal loading capacitance (CL) values from 2.5 pf to 21.5 pf can be selected via register settings. Alternatively, an external CL

can be used along with the internal CL.

Osc To synthesis stage

or output selectors

XTAL

Figure 3.4. External Reference Input (XA/XB)

The Si5332E/F/G/H/L options feature an embedded 50 MHz reference crystal that is used in the free run mode.

3.4.2 Input Clocks

An input clock is available to synchronize the PLL when operating in synchronous mode. This input can be configured as LVPECL,

LVDS or HCSL differential, or LVCMOS. The recommended input termination schemes are shown in the Si5332 Family Reference

Manual. Differential signals must be AC coupled. Unused inputs can be disabled by register configuration.

3.4.3 Input Selection

The active clock input is selected by register control, or by defining two universal input pins as CLKIN_SEL[1:0] in ClockBuilder Pro.

A register bit determines input selection as pin or register selectable. If there is no clock signal on the selected input at power up, the

device will not generate output clocks.

In a typical application, the Si5332 reference input is configured immediately after power-up and initialization. If the device is switched

to another input more than ±1000 ppm offset from the initial input, the device must be recalibrated manually to the new frequency,

temporarily turning off the clock outputs. After the VCO is recalibrated, the device will resume producing clock outputs. If the selected

inputs are within ±1000 ppm, any phase error difference will propagate through the device at a rate determined by the PLL bandwidth.

Hitless switching and phase build-out are not supported by the Si5332.

Si5332 Data Sheet • Functional Description

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com

10 Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 16, 2021 10

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