Table 2. NTC electrical characteristics
Symbol Parameter Test Condition Min Typ Max Unit
R-40 Resistance T = -40°C - 105.7 - kΩ
R25 Resistance T = 25°C - 4.7 - kΩ
R100 Resistance T = 100°C - 0.426 - kΩ
B B- constant T = 25°C to 50°C - 3500 - -
T Operating temp range - -40 - 125 °C
5.4 L9907 gate driver characteristics
The main features of the L9907 gate driver are listed below:
•dV/dt immunity ±50 V/ns in full temperature range
• AEC-Q100 qualified
•Supply voltage from 6 V to 54 V for working battery applications
• The device can withstand -7 V to 90 V at the FET high-side Driver pins
• Low standby current consumption
• 3.3 V internal regulator supplied by VCC pin
• Boost regulator for full RDSON down to 6 V and over voltage protection
• 3 low-side plus 3 high-side drivers
• PWM operation up to 20 kHz
• Gate driver current adjustable via SPI in 4 steps.
– Range set via external resistor.
– Maximum gate controlled current 600 mA
• Source connection to each MOSFET
• Input pin for each gate driver
RELATED LINKS
For detailed information and pin-out details regarding the L9907 gate driver, see the device datasheet
5.5 L9907 supply voltage configuration for 48 V applications
The L9907 automotive 3 phase BLDC driver has a default typical overvoltage threshold of 36 V. if 48 V is applied
to the VB pin, an OV error is triggered in the start phase with (B11) = ‘1’ in the DIAG register and the FS_FLAG
pin set to low.
As the VB pin is supplied from 48 V, the overvoltage protection VBov (B9) has to be disabled setting ‘0’ in CMD1
register. The overvoltage protection set on the boost regulator BST_C pin also needs to be disabled (default is set
to '0') by setting bit DIS_BSTov (B12) in CMD3 register to ’1’.
Note: This bit is only acknowledged if AND (EN1, EN2) = '0'. Trying to write it without lowering AND (EN1, EN2) will not
generate an SPI error, but the command will be ignored for the specific bit.
While setting CMD3 B12 to 1 disables the overvoltage protection on the BST_C pin, this solution does not allow
use of the FS_FLAG pin (which would always be low) to trigger an error in the microcontroller. This is due to the
fact that only the fault effect is disabled when VBov (B9) is set to ‘0’, while the fault is still latched in the SPI
register DIAG. Continuous polling must therefore be performed to query the device to verify whether errors are
present.
RELATED LINKS
See application note AN5124 for more details
UM2673
L9907 gate driver characteristics
UM2673 - Rev 1 page 8/42
