Analog Devices AD1887 Manuale utente

REV. 0

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no res onsibility is assumed by Analog Devices for its

use, nor for any infringements of atents or other rights of third arties that

may result from its use. No license is granted by im lication or otherwise

under any atent or atent rights of Analog Devices.

AD1887

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U. .A.

Tel: 781/329-4700 www.analog.com

Fax: 781/326-8703 © Analog Devices, Inc., 2001

AC’97 SoundMAX

Codec

ENHANCED FEATURE

Full Duplex Variable ample Rates from 7040 Hz to

48 kHz with 1 Hz Resolution

oftware-Enabled VREFOUT Output for Microphones and

External Power Amp

plit Power upplies (3.3 V Digital/5 V Analog)

Mobile Low-Power Mixer Mode

Extended 6-Bit Headphone Volume Control

Digital Audio Mixer Mode

AC’97 2.1 FEATURE

Variable ample Rate Audio

AC’97 FEATURE

AC’97 2.2 Compliant

Greater than 90 dB Dynamic Range

Integrated tereo Headphone Amplifier

Multibit ⌺-⌬ Converter Architecture for Improved /N

Ratio Greater than 90 dB

16-Bit tereo Full-Duplex Codec

Two Analog Line-Level tereo Inputs for:

LINE-IN and CD

Mono MIC Input with Built-In Programmable Preamp

High-Quality CD Input with Ground ense

Power Management upport

48-Terminal TQFP Package

FUNCTIONAL BLOCK DIAGRAM

OSCILLATOR

SELECTOR

XTL_OUT XTL_IN

VREF

SAMPLE

RATE

GENERATORS

SELECTOR

PGA

16-BIT

⌺-⌬A/D

CONVERTER

16-BIT

⌺-⌬A/D

CONVERTER

16-BIT

⌺-⌬A/D

CONVERTER

MIC

PREAMP

16-BIT

⌺-⌬A/D

CONVERTER

CHIP SELECT

AD1887

SDATA_IN

SDATA_OUT

BIT_CLK

SYNC

RESET

VREFOUT

ID0 ID1

MIC

LINE_IN

HP_OUT_L

HP_OUT_R

G = GAIN

A = ATTENUATE

M = MUTE

LINK

SoundMAX is a registered trademark of Analog Devices, Inc.

REV. 0

–2–

AD1887–SPECIFICATIONS

ANALOG INPUT

Parameter Min Typ Max Unit

Input Voltage (RMS Values Assume Sine Wave Input)

LINE_IN, CD 1Vrms

2.83 V p-p

MIC with 20 dB Gain 0.1 V rms

0.283 V p-p

MIC with 0 dB Gain 1Vrms

2.83 V p-p

Input Impedance

20 kΩ

Input Capacitance

5 7.5 pF

HEADPHONE OUT VOLUME

Parameter Min Typ Max Unit

Step Size (+6 dB to –88.5 dB); HP_OUT_R, HP_OUT_L 1.5 dB

Output Attenuation Range Span

–94.5 dB

Mute Attenuation of 0 dB Fundamental

80 dB

PROGRAMMABLE GAIN AMPLIFIER—ADC

Parameter Min Typ Max Unit

Step Size (0 dB to 22.5 dB) 1.5 dB

PGA Gain Range Span 22.5 dB

ANALOG MIXER—INPUT GAIN/AMPLIFIERS/ATTENUATORS

Parameter Min Typ Max Unit

Signal-to-Noise Ratio (SNR)

CD to HP_OUT 90 dB

Other to HP_OUT 90 dB

Step Size (+12 dB to –34.5 dB): (All Steps Tested)

MIC, LINE_IN, CD, DAC 1.5 dB

Input Gain/Attenuation Range:

MIC, LINE_IN, CD, DAC –46.5 dB

DIGITAL DECIMATION AND INTERPOLATION FILTERS*

Parameter Min Typ Max Unit

Pass Band 0 0.4 ×

Pass-Band Ripple ±0.09 dB

Transition Band 0.4 ×

0.6 ×

Stop Band 0.6 ×

∞Hz

Stop-Band Rejection –74 dB

Group Delay 12/

sec

Group Delay Variation over Pass Band 0.0 µs

*Guaranteed but not tested.

STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED

Temperature 25°C

Digital Supply (V

) 3.3 V

Analog Supply (V

) 5.0 V

Sample Rate (

) 48 kHz

Input Signal 1008 Hz

Analog Output Pass Band 20 Hz to 20 kHz

2.0 V

0.8 V

(CS0, CS1) 4.0 V

1.0 V

DAC Test Conditions

Calibrated

–3 dB Attenuation Relative to Full Scale

Input 0 dB

32 ΩOutput Load (HP_OUT)

ADC Test Conditions

Calibrated

0 dB Gain

Input –3.0 dB Relative to Full Scale

REV. 0

AD1887

–3–

ANALOG-TO-DIGITAL CONVERTERS

Parameter Min Typ Max Unit

Resolution 16 Bits

Total Harmonic Distortion (THD) –84 dB

Dynamic Range (–60 dB Input THD + N Referenced to Full Scale, A-Weighted) 84 87 dB

Signal-to-Intermodulation Distortion

(CCIF Method) 85 dB

ADC Crosstalk

Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L) –100 –90 dB

LINE_IN to Other –90 –85 dB

Gain Error (Full-Scale Span Relative to Nominal Input Voltage) ±10 %

Interchannel Gain Mismatch (Difference of Gain Errors) ±0.5 dB

ADC Offset Error ±5mV

DIGITAL-TO-ANALOG CONVERTERS

Parameter Min Typ Max Unit

Resolution 16 Bits

Total Harmonic Distortion (THD) HP_OUT –75 dB

Dynamic Range (–60 dB Input THD + N Referenced to Full Scale, A-Weighted) 85 90 dB

Signal-to-Intermodulation Distortion

(CCIF Method) –100 dB

Gain Error (Full-Scale Span Relative to Nominal Input Voltage) ±10 %

Interchannel Gain Mismatch (Difference of Gain Errors) ±0.7 dB

DAC Crosstalk

(Input L, Zero R, Measure R_OUT; Input R, Zero L, –80 dB

Measure L_OUT)

Total Audible Out-of-Band Energy (Measured from 0.6 ×

to 20 kHz)

–40 dB

ANALOG OUTPUT

Parameter Min Typ Max Unit

Full-Scale Output Voltage; HP_OUT 1 V rms

2.83 V p-p

Output Impedance

800 Ω

External Load Impedance

32 Ω

Output Capacitance

15 pF

External Load Capacitance 100 pF

REF

2.05 2.25 2.45 V

REF_OUT

2.25 V

REF_OUT

Current Drive 5mA

Mute Click (Muted Output Minus Unmuted Midscale DAC Output) ±5mV

STATIC DIGITAL SPECIFICATIONS

Parameter Min Typ Max Unit

High-Level Input Voltage (V

): Digital Inputs 0.65 ×DV

Low-Level Input Voltage (V

)0.35 ×DV

High-Level Output Voltage (V

), I

= 2 mA 0.9 ×DV

Low-Level Output Voltage (V

), I

= 2 mA 0.1 ×DV

Input Leakage Current –10 +10 µA

Output Leakage Current –10 +10 µA

POWER SUPPLY

Parameter Min Typ Max Unit

Power Supply Range—Analog (AV

) 4.75 5.25 V

Power Supply Range—Digital (DV

) 3.15 3.45 V

Power Dissipation—5 V/3.3 V 253 mW

Analog Supply Current—5 V (AV

)36mA

Digital Supply Current—3.3 V (DV

)22mA

Power Supply Rejection (100 mV p-p Signal @ 1 kHz)

40 dB

(At Both Analog and Digital Supply Pins, Both ADCs and DACs)

*Guaranteed but not tested.

REV. 0

–4–

AD1887–SPECIFICATIONS

CLOCK SPECIFICATIONS*

Parameter Min Typ Max Unit

Input Clock Frequency 24.576 MHz

Recommended Clock Duty Cycle 40 50 60 %

POWER-DOWN STATES

Parameter Set Bits DV

Typ AV

Typ Unit

ADC PR0 15.82 30.0 mA

DAC PR1 15.08 26.3 mA

ADC + DAC PR1, PR0 3.79 19.9 mA

ADC + DAC + Mixer (Analog CD On) LPMIX, PR1, PR0 3.85 18.1 mA

Mixer PR2 17.65 17.4 mA

ADC + Mixer PR2, PR0 15.70 11.1 mA

DAC + Mixer PR2, PR1 15.07 8.3 mA

ADC + DAC + Mixer PR2, PR1, PR0 3.80 2.1 mA

Analog CD Only (AC-Link On) LPMIX, PR5, PR1, PR0 3.85 18.1 mA

Analog CD Only (AC-Link Off) LPMIX, PR1, PR0, PR4, PR5 0.06 18.1 mA

Standby PR5, PR4, PR3, PR2, PR1, PR0 0.06 0 mA

Headphone Standby PR6 17.66 26.1 mA

*Guaranteed but not tested.

Specifications subject to change without notice.

TIMING PARAMETERS (GUARANTEED OVER OPERATING TEMPERATURE RANGE)

Parameter Symbol Min Typ Max Unit

RESET Active Low Pulsewidth t

RST_LOW

1.0 µs

RESET Inactive to BIT_CLK Startup Delay t

RST2CLK

162.8 ns

SYNC Active High Pulsewidth t

SYNC_HIGH

1.3 µs

SYNC Low Pulsewidth t

SYNC_LOW

19.5 µs

SYNC Inactive to BIT_CLK Startup Delay t

SYNC2CLK

162.8 ns

BIT_CLK Frequency 12.288 MHz

BIT_CLK Period t

CLK_PERIOD

81.4 ns

BIT_CLK Output Jitter*750 ps

BIT_CLK High Pulsewidth t

CLK_HIGH

32.56 42 48.84 ns

BIT_CLK Low Pulsewidth t

CLK_LOW

32.56 38 48.84 ns

SYNC Frequency 48.0 kHz

SYNC Period t

SYNC_PERIOD

20.8 µs

Setup to Falling Edge of BIT_CLK t

SETUP

5 2.5 ns

Hold from Falling Edge of BIT_CLK t

HOLD

5ns

BIT_CLK Rise Time t

RISECLK

246 ns

BIT_CLK Fall Time t

FALLCLK

246 ns

SYNC Rise Time t

RISESYNC

246 ns

SYNC Fall Time t

FALLSYNC

246 ns

SDATA_IN Rise Time t

RISEDIN

246 ns

SDATA_IN Fall Time t

FALLDIN

246 ns

SDATA_OUT Rise Time t

RISEDOUT

246 ns

SDATA_OUT Fall Time t

FALLDOUT

246 ns

End of Slot 2 to BIT_CLK, SDATA_IN Low t

S2_PDOWN

0 1.0 µs

Setup to Trailing Edge of RESET (Applies to SYNC, SDATA_OUT) t

SETUP2RST

15 ns

Rising Edge of RESET to HI-Z Delay t

OFF

25 ns

Propagation Delay 15 ns

RESET Rise Time 50 ns

Output Valid Delay from Rising Edge of BIT_CLK to SDI Valid 15 ns

*Output jitter is directly dependent on crystal input jitter.

Specifications subject to change without notice.

REV. 0

AD1887

–5–

RESET

BIT_CLK

tRST2CLK

tRST_LOW

Figure 1. Cold Reset

SYNC

BIT_CLK

tSYNC_HIGH tRST2CLK

Figure 2. Warm Reset

CLK_HIGH

BIT_CLK

CLK_LOW

SYNC

SYNC_HIGH

tSYNC_LOW

SYNC_PERIOD

CLK_PERIOD

Figure 3. Clock Timing

BIT_CLK

SYNC

tHOLD

SDATA_OUT

tSETUP

Figure 4. Data Setu and Hold

BIT_CLK

SYNC

SDATA_IN

RISECLK

RISESYNC

RISEDIN

RISEDOUT

FALLCLK

FALLSYNC

FALLDIN

FALLDOUT

SDATA_OUT

Figure 5. Signal Rise and Fall Time

BIT_CLK

SDATA_OUT

SYNC

SDATA_IN

SLOT 1 SLOT 2

WRITE

TO 0x26

DATA

PR4

DON’T

CARE

S2_PDOWN

NOTE: BIT_CLK NOT TO SCALE

Figure 6. AC Link Low Power Mode Timing

RESET

SDATA_OUT

HI-Z

tSETUP2RST

tOFF

SDATA_IN, BIT_CLK

Figure 7. ATE Test Mode

REV. 0

AD1887

–6–

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although

the AD1887 features proprietary ESD protection circuitry, permanent damage may occur on

devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are

recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS*

Parameter Min Max Unit

Power Supplies

Digital (DV

) –0.3 +3.6 V

Analog (AV

) –0.3 +6.0 V

Input Current (Except Supply Pins) ±10.0 mA

Analog Input Voltage (Signal Pins) –0.3 AV

+ 0.3 V

Digital Input Voltage (Signal Pins) –0.3 DV

+ 0.3 V

Ambient Temperature (Operating) 0 70 °C

Storage Temperature –65 +150 °C

*Stresses greater than those listed under Absolute Maximum Ratings may cause

permanent damage to the device. This is a stress rating only; functional operation

of the device at these or any other conditions above those indicated in the

operational section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

ORDERING GUIDE

Temperature Package Package

Model Range Description Option

AD1887JST 0°C to 70°C Thin-Quad Flatpack ST-48

ENVIRONMENTAL CONDITIONS

Ambient Temperature Rating

AMB

= T

CASE

– (P

×θ

)

CASE

= Case Temperature in °C

= Power Dissipation in W

= Thermal Resistance (Case-to-Ambient)

= Thermal Resistance (Junction-to-Ambient)

= Thermal Resistance (Junction-to-Case)

Package ␪

␪

TQFP 76.2°C/W 17°C/W 59.2°C/W

PIN CONFIGURATION

13 14 15 16 17 18 19 20 21 22 23 24

48 47 46 45 44 39 38 3743 42 41 40

PIN 1

IDENTIFIER

TOP VIEW

(Not to Scale)

FILT_L

FILT_R

AFILT2

DD1

XTL_IN

XTL_OUT

SS1

SDATA_OUT

BIT_CLK

SS2

NC = NO CONNECT

SDATA_IN

DD2

SYNC

RESET

AFILT1

REFOUT

REF

SS1

AD1887

NC AV

DD1

ID1

ID0

SS3

DD3

HP_OUT_R

SS2

HP_OUT_L

DD2

CD_L

CD_GND_REF

CD_R

MIC_IN

LINE_IN_L

LINE_IN_R

REV. 0

AD1887

–7–

PIN FUNCTION DESCRIPTIONS

Digital I/O

Pin Name TQFP I/O Description

XTL_IN 2 I Crystal (or Clock) Input, 24.576 MHz

XTL_OUT 3 O Crystal Output

SDATA_OUT 5 I AC-Link Serial Data Output, AD1887 Input Stream

BIT_CLK 6 O/I AC-Link Bit Clock 12288 MHz Serial Data Clock Daisy Chain Output Clock

SDATA_IN 8 O AC-Link Serial Data Input AD1887 Output Stream

SYNC 10 I AC-Link Frame Sync

RESET 11 I AC-Link Reset AD1887 Master H/W Reset

Chip Selects

Pin Name TQFP Type Description

ID0 45 I Chip Select Input 0 (Active Low)

ID1 46 I Chip Select Input 1 (Active Low)

Analog I/O

These signals connect the AD1887 component to analog sources and sinks, including microphones and speakers

Pin Name TQFP I/O Description

CD_L 18 I CD Audio Left Channel

CD_GND_REF 19 I CD Audio Analog Ground Reference for Differential CD Input

CD_ R 20 I CD Audio Right Channel

MIC 21 I Microphone Input

LINE_IN_L 23 I Line in Left Channel

LINE_IN_R 24 I Line in Right Channel

HP_OUT_L 39 O Headphones Out Left Channel

HP_OUT_R 41 O Headphones Out Right Channel

Filter/Reference

These signals are connected to resistors, capacitors, or specific voltages

Pin Name TQFP I/O Description

REF

27 O Voltage Reference Filter

REFOUT

28 O Voltage Reference Output 5 mA Drive (Intended for Mic Bias)

AFILT1 29 O Antialiasing Filter Capacitor—ADC Right Channel

AFLIT2 30 O Antialiasing Filter Capacitor—ADC Left Channel

FILT_R 31 O AC-Coupling Filter Capacitor—ADC Right Channel

FILT_L 32 O AC-Coupling Filter Capacitor—ADC Left Channel

Power and Ground Signals

Pin Name TQFP Type Description

1 1 I Digital V

33 V

1 4 I Digital GND

2 7 I Digital GND

2 9 I Digital V

33 V

1 25 I Analog V

50 V

1 26 I Analog GND

2 38 I Analog V

50 V

2 40 I Analog GND

3 43 I Analog V

50 V

3 44 I Analog GND

REV. 0

AD1887

–8–

No Connects

Pin Name TQFP Type Description

NC 12 No Connect

NC 13 No Connect

NC 14 No Connect

NC 15 No Connect

NC 16 No Connect

NC 17 No Connect

NC 22 No Connect

NC 33 No Connect

NC 34 No Connect

NC 35 No Connect

NC 36 No Connect

NC 37 No Connect

NC 42 No Connect

NC 47 No Connect

NC 48 No Connect

Indexed Control Registers

Reg

Num Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default

00h Reset X SE4 SE3 SE2 SE1 SE0 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 0010h

04h Headphones Volume HPM X LHV5 LHV4 LHV3 LHV2 LHV1 LHV0 X X RHV5 RHV4 RHV3 RHV2 RHV1 RHV0 8000h

08h Reserved X X X X XXXX XXXX X X XX X

00Eh Mic Volume MCM X X X XXXX XM30XMCV4MCV3MCV2 MCV1 MCV0 8008h

10h Line-In Volume LM X X LLV4 LLV3 LLV2 LLV1 LLV0 X X X RLV4 RLV3 RLV2 RLV1 RLV0 8808h

12h CD Volume CVM X X LCV4 LCV3 LCV2 LCV1 LCV0 X X X RCV4 RCV3 RCV2 RCV1 RCV0 8808h

18h PCM Out Vol OM X X LOV4 LOV3 LOV2 LOV1 LOV0 X X X ROV4 ROV3 ROV2 ROV1 ROV0 8808h

1Ah Record Select X X X X X LS2 LS1 LS0 X X X X X RS2 RS1 RS0 0000h

1Ch Record Gain IM X X X LIM3 LIM2 LIM1 LIM0 X X X X RIM3 RIM2 RIM1 RIM0 8000h

20h General-Purpose X X X X XXXX LPBK X X X X X X X 0000h

26h Power-Down Ctrl/Stat X X PR5 PR4 PR3 PR2 PR1 PR0 X X X X REF ANL DAC ADC 000Xh

28h Ext’d Audio ID ID1 ID0 X X XXXX XXXX X X XVRA0005h

2Ah Ext’d Audio Stat/Ctrl X X X X XXXX XXXX X X XVRA0000h

2Ch/ PCM DAC Rate (SR1) SR15 SR14 SR13 SR12 SR11 SR10 SR9 SR8 SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0 BB80h

(7Ah)*

32h/ PCM ADC Rate (SR0) SR15 SR14 SR13 SR12 SR11 SR10 SR9 SR8 SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0 BB80h

(78h)*

74h Serial Configuration SLOT16 REGM2 REGM1 REGM0 XXXX XXXX X X XX 7000h

76h Misc Control Bits DACZ LPMIX X DAM DMS DLSR X ALSR MOD SRX10 SRX8 X X DRSR X ARSR 0404h

EN D7 D7

7Ch Vendor ID1 F7 F6 F5 F4 F3 F2 F1 F0 S7 S6 S5 S4 S3 S2 S1 S0 4144h

7Eh Vendor ID2 T7 T6 T5 T4 T3 T2 T1 T0 REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 5362h

NOTES

All registers not shown and bits containing an X are assumed to be reserved.

Odd register addresses are aliased to the next lower even address.

Reserved registers should not be written.

Zeros should be written to reserved bits.

*Indicates Aliased register for AD1819, AD1819A backward compatibility.

REV. 0

AD1887

–9–

Reset (Index 00h)

geRgeR geR geRgeR

muNmuN muN muNmuN emaNemaN emaN emaNemaN51D51D 51D 51D51D41D41D 41D 41D41D31D31D 31D 31D31D21D21D 21D 21D21D11D11D 11D 11D11D01D01D 01D 01D01D9D9D9D9D9D8D8D8D8D8D7D7D7D7D7D6D6D6D6D6D5D5D5D5D5D4D4D4D4D4D3D3D3D3D3D2D2D2D2D2D1D1D1D1D1D0D0D0D0D0DtluafeDtluafeD tluafeD tluafeDtluafeD

h00h00 h00 h00h00teseRteseR teseR teseRteseRXX

XX4ES4ES 4ES 4ES4ES3ES3ES 3ES 3ES3ES2ES2ES 2ES 2ES2ES1ES1ES 1ES 1ES1ES0ES0ES 0ES 0ES0ES9DI9DI 9DI 9DI9DI8DI8DI 8DI 8DI8DI7DI7DI 7DI 7DI7DI6DI6DI 6DI 6DI6DI5DI5DI 5DI 5DI5DI4DI4DI 4DI 4DI4DI3DI3DI 3DI 3DI3DI2DI2DI 2DI 2DI2DI1DI1DI 1DI 1DI1DI0DI0DI 0DI 0DI0DIh0100h0100 h0100 h0100h0100

Note: Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except

74h, which forces the serial configuration). Reading this register returns the ID code of the part and a code for the type of 3D Stereo

Enhancement.

ID[9:0] Identify Capability. The ID decodes the capabilities of AD1887 based on the following:

Bit = 1 Function AD1887

ID0 Dedicated Mic PCM in Channel 0

ID1 Modem Line Codec Support 0

ID2 Bass and Treble Control 0

ID3 Simulated Stereo (Mono to Stereo) 0

ID4 Headphone Out Support 1

ID5 Loudness (Bass Boost) Support 0

ID6 18-Bit DAC Resolution 0

ID7 20-Bit DAC Resolution 0

ID8 18-Bit ADC Resolution 0

ID9 20-Bit ADC Resolution 0

*The AD1887 contains none of the optional features identified by these bits.

SE[4:0] Stereo Enhancement. The 3D stereo enhancement identifies the Analog Devices 3D stereo enhancement.

Headphones Volume Registers (Index 04h)

geRgeR geR geRgeR

h40h40 h40 h40h40 senohpdaeHsenohpdaeH senohpdaeH senohpdaeHsenohpdaeH

emuloVemuloV emuloV emuloVemuloV MPHMPH MPH MPHMPHXX

XX5VHL5VHL 5VHL 5VHL5VHL4VHL4VHL 4VHL 4VHL4VHL3VHL3VHL 3VHL 3VHL3VHL2VHL2VHL 2VHL 2VHL2VHL1VHL1VHL 1VHL 1VHL1VHL0VHL0VHL 0VHL 0VHL0VHLXX

XXXX

XX5VHR5VHR 5VHR 5VHR5VHR4VHR4VHR 4VHR 4VHR4VHR3VHR3VHR 3VHR 3VHR3VHR2VHR2VHR 2VHR 2VHR2VHR1VHR1VHR 1VHR 1VHR1VHR0VHR0VHR 0VHR 0VHR0VHRh0008h0008 h0008 h0008h0008

RHV[5:0] Right Headphone Volume Control. The least significant bit represents 1.5 dB. This register controls the output

from +6 dB to a maximum attenuation of –88.5 dB.

LHV[5:0] Left Headphone Volume Control. The least significant bit represents 1.5 dB. This register controls the output

from +6 dB to a maximum attenuation of –88.5 dB.

HPM Headphones Volume Mute. When this bit is set to “1,” the channel is muted.

HPM xHV5 . . . xHV0 Function

0 00 0000 6 dB Gain

0 01 1111 –40.5 dB Attenuation

0 11 1111 –88.5 dB Attenuation

1 xx xxxx –∞dB Attenuation

REV. 0

AD1887

–10–

Mic Volume (Index 0Eh)

geRgeR geR geRgeR

hE0hE0 hE0 hE0hE0 CIMCIM CIM CIMCIM

emuloVemuloV emuloV emuloVemuloV MCMMCM MCM MCMMCMXX

XXXX

XX03M03M 03M 03M03MXX

XX4VCM4VCM 4VCM 4VCM4VCM3VCM3VCM 3VCM 3VCM3VCM2VCM2VCM 2VCM 2VCM2VCM1VCM1VCM 1VCM 1VCM1VCM0VCM0VCM 0VCM 0VCM0VCMh8008h8008 h8008 h8008h8008

MCV[4:0] Mic Volume Gain. Allows setting the Mic Volume attenuator in 32 steps. The LSB represents 1.5 dB, and the

range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.

M30 Mic Boost Gain: Amplifies the Mic input. 0 = 0 dB, 1 = 30 dB

MCM Mic Mute. When this bit is set to “1,” the channel is muted.

Line In Volume (Index 10h)

geRgeR geR geRgeR

muNmuN muN muNmuN emaNemaN emaN emaNemaN51D51D 51D 51D51D41D41D 41D 41D41D31D31D 31D 31D31D21D21D 21D 21D21D11D11D 11D 11D11D01D01D 01D 01D01D9D9D9D 9D9D8D8D8D 8D8D7D7D7D 7D7D6D6D6D6D6D5D5D5D5D5D4D4D4D4D4D3D3D3D3D3D2D2D2D2D2D1D1D1D1D1D0D0D0D0D0DtluafeDtluafeD tluafeD tluafeDtluafeD

h01h01 h01 h01h01 nIeniLnIeniL nIeniL nIeniLnIeniL

emuloVemuloV emuloV emuloVemuloV MLMLMLMLMLXX

XXXX

XX4VLL4VLL 4VLL 4VLL4VLL3VLL3VLL 3VLL 3VLL3VLL2VLL2VLL 2VLL 2VLL2VLL1VLL1VLL 1VLL 1VLL1VLL0VLL0VLL 0VLL 0VLL0VLLXX

XXXX

XX4VLR4VLR 4VLR 4VLR4VLR3VLR3VLR 3VLR 3VLR3VLR2VLR2VLR 2VLR 2VLR2VLR1VLR1VLR 1VLR 1VLR1VLR0VLR0VLR 0VLR 0VLR0VLRh8088h8088 h8088 h8088h8088

RLV[4:0] Right Line In Volume. Allows setting the Line In right channel attenuator in 32 steps. The LSB represents 1.5 dB,

and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.

LLV[4:0] Line In Volume Left. Allows setting the Line In left channel attenuator in 32 steps. The LSB represents 1.5 dB,

and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.

LM Line In Mute. When this bit is set to “1,” the channel is muted.

CD Volume (Index 12h)

geRgeR geR geRgeR

muNmuN muN muNmuN emaNemaN emaN emaNemaN51D51D 51D 51D51D41D41D 41D 41D41D31D31D 31D 31D31D21D21D 21D 21D21D11D11D 11D 11D11D01D01D 01D 01D01D9D9D9D9D9D8D8D8D8D8D7D7D7D7D7D6D6D6D6D6D5D5D5D5D5D4D4D4D4D4D3D3D3D 3D3D2D2D2D 2D2D1D1D1D 1D1D0D0D0D 0D0DtluafeDtluafeD tluafeD tluafeDtluafeD

h21h21 h21 h21h21 DCDCDCDCDC

emuloVemuloV emuloV emuloVemuloV MVCMVC MVC MVCMVCXX

XXXX

XX4VCL4VCL 4VCL 4VCL4VCL3VCL3VCL 3VCL 3VCL3VCL2VCL2VCL 2VCL 2VCL2VCL1VCL1VCL 1VCL 1VCL1VCL0VCL0VCL 0VCL 0VCL0VCLXX

XXXX

XX4VCR4VCR 4VCR 4VCR4VCR3VCR3VCR 3VCR 3VCR3VCR2VCR2VCR 2VCR 2VCR2VCR1VCR1VCR 1VCR 1VCR1VCR0VCR0VCR 0VCR 0VCR0VCRh8088h8088 h8088 h8088h8088

RCV[4:0] Right CD Volume. Allows setting the CD right channel attenuator in 32 steps. The LSB represents 1.5 dB, and

the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.

LCV[4:0] Left CD Volume. Allows setting the CD left channel attenuator in 32 steps. The LSB represents 1.5 dB, and the

range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.

CVM CD Volume Mute. When this bit is set to “1,” the channel is muted.

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