Analog Devices ADP1071-1EVALZ Manuale utente

ADP1071-1EVALZ User Guide

UG-1384

One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: 781.329.4700 •Fax: 781.461.3113 •www.analog.com

Evaluating the ADP1071-1 Isolated Synchronous Flyback Controller

with Integrated iCoupler

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT

WARNING AND LEGAL TERMS AND CONDITIONS.Rev. 0 | Page 1 of 13

FEATURES

Full support evaluation kit for the ADP1071-1

15 W multioutput flyback topology

+24 V, +5.5 V, and −15 V output voltage (VDC)

Light load mode (LLM) operation

Dedicated internal primary and secondary side MOSFET

drivers

External reference signal tracking

Precision enabled undervoltage lockout with hysteresis

Short-circuit, output overvoltage, cycle by cycle input

overcurrent, and overtemperature protection

Frequency synchronization

Soft start and soft stop functionality

EVALUATION KIT CONTENTS

ADP1071-1EVALZ

EQUIPMENT NEEDED

DC power supply capable of 18 VDC to 32 VDC, 1 A output

current capability of the supply

Electronic load capable of 15 W, 0 V to 30 V rating capability

of the load

Oscilloscope capable of ≥500 MHz bandwidth, 2 channels to

4 channels

Precision digital multimeter (HP 34401 or equivalent)

GENERAL DESCRIPTION

The ADP1071-1 E VA L Z allows users to evaluate the ADP1071-1

in flyback topology.

The evaluation board is set up to act as an isolated power supply

solution that incorporates three output voltages (+5.5 V, +24 V,

and −15 V) at a total rated power of 15 W. The evaluation board

also provides 5 kV isolation in compact form factor, making it

suitable for industrial applications, which usually have a variety

of voltage rails.

Complete information about the ADP1071-1 is available in the

ADP1071-1/ADP1071-2 data sheet. Consult the ADP1071-1/

ADP1071-2 data sheet in conjunction with this user guide when

using the evaluation board.

DIGITAL PICTURES OF THE EVALUATION BOARD

17050-001

Figure 1. ADP1071-1EVALZ Top

17050-002

Figure 2. ADP1071-1EVALZ Bottom

UG-1384 ADP1071-1EVALZ User Guide

Rev. 0 | Page 2 of 13

TABLE OF CONTENTS

Features .............................................................................................. 1

Evaluation Kit Contents................................................................... 1

Equipment Needed........................................................................... 1

General Description ......................................................................... 1

Digital Pictures of the Evaluation Board ....................................... 1

Revision History ............................................................................... 2

Evaluation Board Overview ............................................................ 3

Power Train Overview ................................................................. 3

Transformer................................................................................... 3

Connectors .................................................................................... 3

Caution .......................................................................................... 3

Evaluation Board Hardware ............................................................ 4

Evaluation Board Configurations .............................................. 4

Powering Up...................................................................................4

ADP1071-1EVALZ Dimensions .................................................4

Evaluating the ADP1071-1 E VA L Z B o a r d ......................................5

Startup.............................................................................................5

Cross Regulation ...........................................................................5

Control Loop Gain ........................................................................6

Voltage and Current Stress...........................................................6

Efficiency........................................................................................7

Thermal Performance...................................................................7

Evaluation Board Schematic and Artwork.....................................8

Ordering Information.................................................................... 11

Bill of Materials........................................................................... 11

REVISION HISTORY

8/2018—Revision 0: Initial Version

ADP1071-1EVALZ User Guide UG-1384

Rev. 0 | Page 3 of 13

EVALUATION BOARD OVERVIEW

This evaluation board features the ADP1071-1 in a dc-to-dc

switching power supply in flyback topology with multiple

outputs in a compact form factor.

The ADP1071-1 E VA L Z circuit is designed to provide +5.5 V,

+24 V, a n d −15 V at a total rated power of 15 W from a dc input

voltage source of 18 VDC to 32 VDC. To maximize efficiency at light

load conditions, the ADP1071-1 operates at a switching

frequency of 50 kHz. The switching frequency minimizes

switching losses of the converter and is high enough to keep the

transformer size small.

POWER TRAIN OVERVIEW

The ADP1071-1 E VA L Z is shown in Figure 1 and Figure 2. The

circuit components on the ADP1071-1 E VA L Z are described as

follows:

•The input filter consists of a capacitor bank including

Capacitor 24 (C24) to Capacitor 57 (C57).

•Q3 is an N channel, metal-oxide semiconductor field effect

transistor (MOSFET) used as the main switch on the

primary side.

•Transformer T1 provides isolation.

•The secondary side of the circuitry has three windings

followed by one rectifying diode and one resistor/capacitor

(RC) snubber.

•The output filter consists of two capacitors for each of the

rails. These capacitors include C60 and C65 at the 24 V

rail, C62 and C66 at the 5.5 V rail, and C7 and C67 at the

−15 V rail.

The snubber for the main switch is composed of D11 and D12.

The ADP1071-1 flyback controller (U1) is the power controller.

The power controller integrates gate drive for driving the

primary switch and synchronous rectifier based on the Analog

Devices, Inc., iCoupler® technolog y.

During startup, U1 is powered by the J2 or J4 input via an external

start-up circuit (Q7, R17, D5, or C38). When switching and

power conversion starts, the auxiliary winding provides power

to the VREG1 pin. R15 is the sense resistor that senses the

primary current.

TRANSFORMER

The transformer has 10 pins and five windings, including

primary winding (Pin 4 to Pin 3), auxiliary winding (Pin 2 to

Pin 1), and three output windings (Pin 6 to Pin 7, Pin 8 to Pin 9,

and Pin 9 to Pin 10).

PRI

18VDC TO 36VDC

66kHz

AUX

10V AND 20mAOUTPUT WINDING

15V AND 200mA

OUTPUT WINDING

5.5V AND 500mA

OUTPUT WINDING

24V AND 400mA

17050-003

Figure 3. Transformer Diagram

CONNECTORS

The connections to the ADP1071-1EVA LZ are shown in Table 1.

Table 1. Evaluation Board Connections

Connector Pin Function

J2 Pin 1, VIN+, dc input

Pin 2, VIN−, ground return for dc input

J5 Pin 1, 24 VDC output

Pin 2, 5.5 VDC output

Pin 3, GND, return for dc output

Pin 4, −15 V

output

CAUTION

The ADP1071-1 E VA L Z uses high voltages. Take extreme

caution, especially on the primary side, to ensure safety. It is

advised to switch off the evaluation board when not in use. Use

a current limited, isolated dc source at the input.

UG-1384 ADP1071-1EVALZ User Guide

Rev. 0 | Page 4 of 13

EVALUATION BOARD HARDWARE

EVALUATION BOARD CONFIGURATIONS

The ADP1071-1 E VA L Z is preconfigured with the default

settings to operate the power supply at the rated load. No

additional configuration is necessary. Replace J3 with at

least an AWG2 2 wire to monitor the primary current.

POWERING UP

To power up the ADP1071-1EVALZ , use the following steps:

1. Connect a dc source (voltage range of 18 VDC to 32 VDC) at

the input terminals and electronic loads at the output

terminals.

2. Connect voltmeters on the input terminals (VIN+ and

VIN−) and output terminals (+24 V, +5.5 V, −15 V, and

GND) separately.

3. Connect the voltage probes at different test pins. Use the

differential probes and ensure the ground of the probes are

isolated if the measurements are made on the primary and

secondary side of the transformer (T1) simultaneously.

4. Set the electronic load to the maximum rating for each rail.

5. Turn on the dc source.

ADP1071-1EVALZ DIMENSIONS

Table 2 shows the dimensions of the ADP1071-1 EVA L Z

evaluation board. The dimensions exclude standoff.

Table 2. Evaluation Board Dimensions

Dimension Value (Inches)

Length 1.9

Width

1.25

Height

0.75 (excluding standoffs)

ADP1071-1EVALZ User Guide UG-1384

Rev. 0 | Page 5 of 13

EVALUATING THE ADP1071-1EVALZ BOARD

Test points on the evaluation board allow the user to monitor

output signals. The following sections provide descriptions of

the typical results when evaluating the device in a multiflyback

topology. The user can modify the operation of the device

according to the ADP1071-1/ADP1071-2 data sheet as needed.

STARTUP

When the supply voltage is on, the output voltages ramp up

smoothly. For details about two-stage soft start, refer to the

ADP1071-1/ADP1071-2 data sheet. Figure 4 shows the startup

under a no load condition, and Figure 5 shows the startup of a

full load condition.

CH1 10.0V CH2 10.0V M40.0ms ACH1 9.60V

T9.0000ms

BWBW

CH3 10.0V BW

17050-004

+24V

+5.5V

–15V

Figure 4. Startup at No Load

CH1 10.0V CH2 10.0V M40.0ms ACH1 9.60V

T9.0000ms

BWBW

CH3 10.0V

17050-005

+24V

+5.5V

–15V

Figure 5. Startup at Full Load

To experiment with different soft start timings, see more details

in the soft start section in the ADP1071-1/ADP1071-2 data

sheet.

CROSS REGULATION

On the secondary side, the output voltage information of the

5.5 V rail and the 24 V rail are sensed by a voltage divider

network and sent to the FB pin. These two voltages (5.5 V and

24 V) are partially regulated by a weightage ratio of 6:4. The

−15 V rail is left quasi regulated due to its relatively low load

current rating. The user can adjust the feedback weightage ratio

according to the regulation requirement and load rating to

achieve the most optimal cross regulation among the three

outputs. Figure 6 through Figure 9 show the cross regulation

performance under different load conditions.

CH1 500mACH2 1.00V ACH1 270mA

CH3 5.00V CH4 5.00V

5.5V LOAD STEP

0mA TO 500mA

+24V

AT FULL

LOAD +5.5V

–15V

AT FULL

LOAD

17050-006

Figure 6. Cross Regulation with Load Step at a +5.5 V Rail When +24 V and

−15 V Rails at Full Load

CH1 500mACH2 1.00V ACH1 135mA

CH3 5.00V CH4 5.00V

5.5V LOAD STEP

0mATO 500mA

+24V +5.5V

AT FULL

LOAD

–15V

AT FULL

LOAD

17050-007

Figure 7. Cross Regulation with Load Step at a +24 V Rail When +5.5 V and

−15 V Rails at Full Load

CH1 500mACH2 1.00V ACH1 270mA

CH3 5.00V CH4 5.00V

5.5V LOAD STEP

0mA TO 500mA

+5.5V

+24V

AT NO

LOAD

–15V

AT NO

LOAD

17050-008

Figure 8. Cross Regulation with Load Step at a +5.5 V Rail When +24 V and

−15 V Rails at No Load

UG-1384 ADP1071-1EVALZ User Guide

Rev. 0 | Page 6 of 13

CH1 500mACH2 1.00V ACH1 135mA

CH3 5.00V CH4 5.00V

24V LOAD STEP

0mA TO 400mA

+24V +5.5V

AT NO

LOAD

–15V

AT NO

LOAD

17050-009

Figure 9. Cross Regulation with Load Step at a +24 V Rail When +5.5 V and

−15 V Rails at No Load

CONTROL LOOP GAIN

The loop gain can be measured via a network analyzer. The

small signal perturbation is injected at R19 and at the 5.5 V test

points. Figure 10 shows the loop gain of the system.

–15

–20

–25

–30

–35

–10

–5

250

–50

–100

–150

–200

–250

100k10k1k

1 2

FREQUENCY(Hz)

MAGNITUDE (dB)

PHASE (Degrees)

200

150

100

17050-010

PHASE

MAGNITUDE

Figure 10. Loop Gain Measurement, Crossover Frequency = 432.33 Hz, Phase

Margin = 91.07°, Gain Margin = 13.51 dB

VOLTAGE AND CURRENT STRESS

The drain to source voltage of the main switch is clamped by

the transient voltage suppressor (TVS) diode on the evaluation

board. The peak drain to source voltage occurs at the maximum

input voltage. The drain to source voltages at full load are shown

in Figure 11. The peak drain to source voltage is 114 V, and the

peak primary current is 2.2 A.

CH1 20.0V CH4 2.0AM10.0µs ACH1 75.6V

T0.0ns

Ω

17050-011

Figure 11. MOSFET Drain to Source Voltages at 32 VDC Input and Full Load

The peak reverse voltage stress on the secondary diodes are

measured in Figure 12 to Figure 14 under the same condition

as in Figure 11. For +5.5 V, +24 V, a n d −15 V rails, the diode

voltage stress is −19.5 V, −72.4 V, a n d +48 V, respectively.

CH1 5.00V CH4 2.0AM10.0µs ACH1 –16.0V

T0.0ns

Ω

17050-012

Figure 12. Peak Diode Voltage Stress on a 5.5 V Rail at 32 VDC Input and Full

Load

CH1 20.0V M10.0µs ACH1 –57.6V

T0.0s

17050-013

CH4 2.0AΩ

Figure 13. Peak Diode Voltage Stress on a 24 V Rail at 32 VDC Input and Full

Load

ADP1071-1EVALZ User Guide UG-1384

Rev. 0 | Page 7 of 13

CH1 10.0V

CH4 2.0A

M10.0µs A CH1 37.6V

T100.00ns

Ω

17050-014

Figure 14. Peak Diode Voltage Stress on a −15 V Rail at 32 VDC Input and Full

Load

EFFICIENCY

Table 3 shows the typical efficiency measurement under

different load conditions. Note that the minimal load of the

5.5 V rail and the 24 V rail are kept at 0.01 A to maintain

adequate load regulation.

THERMAL PERFORMANCE

Figure 15 shows the typical thermal image of the evaluation

board at different operating conditions.

17050-015

Figure 15. Thermal Image of the ADP1071-1 at 48 VDC Input, Full Load,

No Airflow, and 0.5 Hour Soaking Time

Table 3. Efficiency Measurement at Input Voltage (VIN) = 24 V

OUT1 Voltage,

VOUT1 (V)

OUT1 Current,

IOUT1 (A)

OUT2 Voltage,

VOUT2 (V)

OUT2 Current,

IOUT2 (A)

OUT3 Voltage,

VOUT3 (V)

OUT3 Current,

IOUT3 (A)

Efficiency

(%)

25.72 0.01 5.36 0.01 14.83 0.2 85.33

27.27 0.01 5.11 0.5 15.59 0.2 82.61

28.12 0.01 5.00 0.5 18.18 0 72.48

25.71 0.4 5.29 0.5 17.55 0 84.18

24.89 0.4 5.45 0.01 15.34 0.2 86.50

25.65 0.4 5.30 0.5 15.82 0.2 84.79

UG-1384 ADP1071-1EVALZ User Guide

Rev. 0 | Page 8 of 13

EVALUATION BOARD SCHEMATIC AND ARTWORK

2kV

VIN+

VIN–

VOUT1: 24V AT 400mA max = 9.6W

VOUT2: 5.5V AT 500mA max = 2.75W

VOUT3: –15V AT 200mA max = 3W

60-40% WEIGHT ON 24V AND 5.5V

PART NUMBER: 640454-4

USE THIS 4 PIN CONNECTOR

35V, 10uF

GMK316AB7106KL-TR

35V, 10µF

GMK316AB7106KL-TR

220uF, 35V

EEUFM1V221

220uF, 35V

EEUFM1V221

100uF, 10V

EEUFM1A101

22uF, 10V

GRM31CR71A226ME15L

VIN

AGND1

GATE

SYNC RT

COMP

SS2

VIN

VREG2

5.5V

FB OVP

VREG1

VREG2

OVP

SS2

MODE

VREG1

GATE

AGND1

SYNC

COMP

AGND1

MODE

–15V

5.5V

24V

5.5V24V

24V

5.5V

–15V

5.5V

R54

10kΩ

R31

4.7kΩ

C59

470pF

C48

2.2µF

C39

100pF

R56

46.4kΩ

R49

33kΩ

R35

33kΩ

+C67

220uF

C38

2.2µF

BZT52C11-7-F

A C

S1B

D11

10µF

R24

0.976kΩ

C32

2200pF C4532X7R3D222K130KA

C40

10nF

C65

10µF

R23

0.976kΩ

ADP1071-1

GATE

AGND1

VREG1

MODE

SYNC

SS2 9

COMP 10

FB 11

OVP 12

VDD2 13

VREG2 14

AGND2 15

SR 16

MBR2H200SFT1G

D16 A

R55

10kΩ

R19

10Ω

R17

33kΩ

R59

4.7Ω

R27

487kΩ

STL3N10F7

PAD2

PAD1

R53

10kΩ

C37

2.2µF

R50

DNI

C51

100pF

C58

470pF

MBRA160

D19 A

+C66

100uF

R12

5.1kΩ

C60

470pF

750316825

R57

4.7Ω

R28

51.1kΩ

MBRA140T3GD21

C24

10µF

C62

22µF

R29

0Ω

FMBS2383

R18

30kΩ

D12

P4SMA43A

R21

5.11kΩ

640454-4

R20

5.9kΩ

R14

10kΩ

C57

12105C106KAT2A

R58

4.7Ω

C36

1µF

640454-2

C35

DNI

2.2µF

R36

10Ω

MBRA1H100

D22

+C50

220µF

10mΩ

R15

VDD2

17050-016

10µF

Figure 16. ADP1071-1EVALZ Evaluation Board Schematic

ADP1071-1EVALZ User Guide UG-1384

Rev. 0 | Page 9 of 13

17050-017

Figure 17. Board Outline

17050-018

Figure 18. Silkscreen Top

17050-019

Figure 19. Silkscreen Bottom

17050-020

Figure 20. PCB Layout, Top Layer

UG-1384 ADP1071-1EVALZ User Guide

Rev. 0 | Page 10 of 13

17050-021

Figure 21. PCB Layout, Layer 2

17050-022

Figure 22. PCB Layout, Layer 3

17050-023

Figure 23. PCB Layout, Layer 4

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