Intel EV80Cl96KB Manuale utente

EV80Cl96KB

Evaluation Board

User’s Manual

(bier Number 270738-()O]

EV80C196KB Microcontroller Evaluation Board

Release 001

February 20,1989

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to, the implied warranties of merchantability and fitness for a particular purpose. Intel Corporation

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CONTENTS

SECTION Description ...................................... PAGE

INTRODUCTION ........................................................................................ 9

GETTING STARTED WITH THE EV80Cl96KB ........................................ 9

Powering the Board ........................................................................ 9

Connecting to your PC .................................................................... 9

Starting the Host Software .............................................................. 9

HARDWARE OVERVIEW OF THE EV80Cl96KB BOARD ...................... 10

Block Diagram of the EV80C196KB Board...................................... 10

Processor ........................................................................................ 30

Memory‘

............................................................................................ 10

Host Interface .................................................................................. 11

Digital I/O ........................................................................................ 11

Analog Inputs .................................................................................. 11

Decoding ........................................................................................ 12

Configuration Jumper Locations (Figure 3a) .................................. 14

Memory Configuration Jumper Locations (Figure 3b) .................... 15

Expansion Ports, Connectors and LEDs Locations (Figure 4) ........ 16

Host Serial Connector (Figure 5) .................................................... 17

8OCl96KB Serial Port Connector (Figure 6) .................................. 17

Analog Input Connector (Figure 7) .................................................. 18

I/O Expansion Connector (Figure 8) ................................................ 18

Memory-l/O Expansion Connector (Figure 9).................................. 19

Power Supply Connector (Figure 10) .............................................. 19

25pin to g-pin Adapter (Figure 11) ................................................ 20

INTRODUCTION TO iRISM-iECM96 SOFTWARE.. .................................. 21

Features .......................................................................................... 21

Restrictions ...................................................................................... 22

OVERVIEW ................................................................................................ 23

Embedded Controller Monitor.. ........................................................ 23

USER INTERFACE .................................................................................... 24

Background Information .................................................................. 24

Initiating and Terminating iECM-96 ................................................ 25

Default Base Commands ................................................................ 28

FILE OPERATIONS .................................................................................... 29

Loading and Saving Object Code .................................................... 29

Other File Operations.. ...................................................................... 30

PROGRAM CONTROL ................................................................................ 32

Resetting the Target ........................................................................ 32

Breakpoints ...................................................................................... 32

Program Execution .......................................................................... 33

Program Stepping ............................................................................ 35

DISPLAYING AND MODIFYING PROGRAM VARIABLES ........................ 37

Supported Data Types ...................................................................... 37

. BYTE Commands ............................................................................ 38

WORD Commands .......................................................................... 39

DWORD Commands ........................................................................ 40

REAL Commands ............................................................................ 41

STACK Commands .......................................................................... 42

STRING Commands ........................................................................ 42

Processor Variables .......................................................................... 43

ASSEMBLY AND DISASSEMBLY .............................................................. 44

Single Line Assembly Commands .................................................... 44

Disassembly Commands .................................................................. 45

SYMBOL OPERATIONS ............................................................................ 46

RISM .......................................................................................................... 47

RISM Variables 47

................................................................................

RISM Structure ................................................................................. 48

Receiving Data from the Host .......................................................... 48

Sending Datato the Host .................................................................. 48

RISM Commands .............................................................................. 49

Schematics and Parts List ..................................~.......~..................~......Appendix A

Specific iRlSM Information -..~.............~................................~..............0.. Appendix B

Listing of IRISM-196KB a.*.e..**..*...........*..

................................-....*.........aAppendix C

Timing Analysis .*-.................*..........e....

......................~........~....~.....~......~

Appendix D

Programmable Logic Equations ..........~...~....~.........~...........~.....~.........~..

Appendix E

Standard Memory-l/O Connector .....~......~................................~~.......~..~

Appendix F

Sample Session *“o...~~..~.....~..~.......e...~.*~.

...O.....................*s..*.............eo...Appendix G

-8- EV80C196KB Microcontroller Evaluation Board User’s Manual

Figure 1.

EV8OCl96KB Evaluation Board

EV80C196KB Microcontroller Evaluation Board User’s Manual -90

INTRODUCTION

The EV80C196KB is a next-generation version of the EV80C196KA. The major

changes are the use of a standard memory expansion bus compatible with the

EV80C51FB and EV80C186 boards, and the removal of the card edge bus. Also,

the HOLD/HLDA feature of the 8OC196KB is supported. The EV80C196KB is de-

signed to be a software evaluation tool for the ROMless 8OC196KB 16-bit microcon-

troller. As such, ports 3 and 4 are not available for use as I/O ports unless offboard

latches/buffers and decoding logic are used. All unreserved functions of the

80C196KB are available to you except for the Non-Maskable Interrupt (NMI), the

TRAP instruction, and 512 bytes of address space. The Chip Configuration Byte is

also used by the monitor, but most of its functions are provided by external logic.

GETTING STARTED WITH THE EV80C396KB

Powering up the Board

Power (+5, +/-12 Volts) must be connected to JP4 as shown on the board’s silk-

screen next to JP4 and in figure 10. Included with the board is a packet containing a

Molex connector and crimp terminals for your convenience.

Power supply requirements for the EV80C196KB board are as follows:

+ 5 VDC +I- 5 % @ 280 mA (150 mA if LED’sare disabled by

removing jumper shunt El 6)

+12VDC+/-20%@ 15mA

-12VDC+/-20%@ 15mA

Upon power-up (or after a reset) the board goes through initializations and a shift-

ing-pattern is displayed on the Port 1 LEDs when initialization has completed prop-

erly.

Connecting to your PC

Once you have applied power to the board, you need to connect Pl to a PC serial

port. Pl is configured to interface pin-to-pin with a standard nine-pin AT@)-type

serial connector (see figure 5 for pinout). Make certain that you use a cable provid-

ing all nine signals, as they are all needed for proper operation of the host interface.

When you have connected the cable, you may observe that the 8OC196KBis held in

reset, and all the LEDs turn on. This is because one of the host signals is used to

reset the part, and the signal’is often in a reset condition prior to invoking the host

software on your PC.

Note: if you have a 25pin serial port it will be necessary to make a 2%pin to 9-

pin adaptor (see figure 11 for details).

Starting the Host Software

After the you have made both connections to the board, you can invoke the host

interface. Install the disk in drive A of your system. At the DOS prompt type

“A:ECM96”eCR>. Your PC should eventually display the iECM-96 monitor screen.

If you have problems please refer to the sub-section “Initiating and Terminating

iECM-96” in the “USER INTERFACE” section of this manual. For further details on

using the monitor, refer to the “USER INTERFACE” section.

-IO- EV80C196KB Microcontroller Evaluation Board User’s Manual

HARDWARE OVERVIEW OF THE EV80C196KB BOARD

The EV80C196KB Microcontroller Evaluation board is delivered with an 8OC196KB,

8 K-words and 8 K-bytes of user code/data memory, a UART for host communica-

tions and analog-input filtering with a precision voltage reference. Also included is

programmable chip-select, bus-width and wait-state-counter logic which allows you

to custom tailor the board to look like your own system. The board’s physical dimen-

sions are 6 l/2” x 7 3/4” with an overall height of 3W. There are six main sections

to the EV80C196KB board: Processor, Memory, Host Interface, Digital I/O, Analog

Inputs and Decoding.

Block Diagram of the 80C196KB Board

Figure 2.

Processor

The Intel@)80C196KBis a 16-bit embedded microcontroller. Being a member of the

MCW-96 family, the 8OC196KB uses the same powerful instruction set and the

same architecture as the existing MCS-96 products. The 8OC196KB is an enhanced

CMOS version of the 8097BH. Its enhancements include up/down and capture

modes on Timer2, multiplyin

nearly twice as fast, Hold/Ho d Acknowledge logic, and power-down and idle modes

9 speeds almost 3 times as fast, overall execution

to save power. For more information, please refer to the 1989 “16-Bit Embedded

Controller Handbook,” Intel Corporation order number 270646-001 and the

8OC196KB Datasheet order number 270634-001.

Memory

There are five 28-pin memory sockets provided on the EV80C196KB board: Ul , U6,

U8, U13 and U14. The sockets are designed to support byte-wide, JEDEC-pinout,

memory devices of various types and sizes, i.e. 8K x 8 SRAM or 16K x 8 EPROM.

Ul and U8, U6 and U13 are connected as two 16-bit memory banks and U14 is

connected as an 8-bit memory bank.

EV80C196KB Microcontroller Evaluation Board User’s Manual -1I-

See appendix B and appendix C for details on reserved areas of memory.

Bank

No. Even

Bytes Odd

Bytes Enable

Signal Memory

Type

I.C. I.C.

0 U8 Ul CEO 8K x 16-bit Monitor EPROM

from 0-FFH and 1DOO-1DFFH

1 u13 U6 CEi 8K x 16-bit ROMsim/RAM

from 2000H-5FFFH

2 u14 u14 CE2 8K x 8-bit ROMsim/RAM

from 6000H-7FFFH

Host Interface

, The PC host interface is accomplished with the 82510 UART (U20) connected to Pl

via RS-232 drivers. The UART resides in the address range 1EOOH- 1EFFH.

Therefore, register 0 in the UART would be at address 1EOOHof the 8OC196KB,

reg. 1would be at 1EOl H, reg. 2 would be at 1E02H, etc. up to reg. 7 at 1E07H.

The registers will repeat again with reg. 0 at 1E08H due to the limited decoding

granularity of the EPLD. Pin 12 of the UART, OUTl#, is used to tell the PC host

when the 80C196KB is executing user code by a true level on the Ring Indicator

input of the host serial port.

Digital I/O

With the exception of the NMI input, which is used by the Host Interface, all Digital I/

0 functions of the 8OC196KB are available to you. There are eight LEDs on-board

along with buffer/drivers which allow you to quickly observe the state of Port 1,

HSO.0 and Port 2.5/PWM (see figure 4 or the schematics in appendix A for loca-

tion). The TxD and RxD pins of the 80C196KB (Port 2.0 and Port 2.1) are con-

nected to RS-232 buffer/drivers, which are connected to P2. All of the I/O signals

are available on JP2 (see figure 8 or the schematics in appendix A for pinout).

Note: because RxD is connected to an RS-232 receiver (U19 pin 3) any attempt

to use it as a digital input will result in a contention. If you would like to use it

as a digital input, remove jumper shunt El9 to disconnect the receiver.

Analog Inputs

The Port 0 inputs of the 80C196KB double as both digital and analog inputs. The

EV80C196KB board includes circuitry to make the analog inputs easier to use. A

precision voltage source for Vref is provided on board (U3 and U4) which can be

carefully adjusted by trimming RPl . Also, jumper shunt E4 allows Vref to be con-

nected to Vcc instead of the output of U3. By removing E4 entirely, an off board

reference can be connected to JPl . By removing jumper shunt E2, ANGND can be

isolated from Vss. Protective clamping diodes are installed on each channel. RC

networks are provided in sockets (to ailow you to change the input impedance to

match your application) on all of the analog input channels. If Port 0 is to be used

-729 EV80C196KB Microcontroller Evaluation Board User’s Manual

as a digital input, it is recommended that the capacitors be removed, and the resis-

tors replaced with wires. For additional connection information refer to figure 7 or

the schematics in appendix A. The ground and power planes beneath the analog

circuitry (Dl , D2, R3, C2, U3, U4, JPI and the analog connections on the

80Cl96KB) are isolated from the digital power and ground planes of the board to

keep noise from the analog inputs.

Decoding

The decoding logic on the EWOCl96KB board serves three purposes; to provide

Chip-Enable signals to memory and peripheral devices, to select the buswidth for

the device(s) being accessed and to provide wait-states for slow devices. This

section is provided in case you need to modify the memory configuration of the

EV80Cl96KB board. It is not necessary to understand this section for normal usage

of the board.

The heart of the decoding logic is U12, a 24-pin 5AC312 Intel EPLD or a C22VlO

programmable logic array which is socketed to allow easy changes. For the sake of

convenience it will be referred to as “the EPLD” throughout this text. The EPLD

uses latched addresses A8-Al5 along with CLKOUT, HLDA#, RESET# and STALE

(STretched ALE) from the 8OCl96KB as decode inputs.

There are 4 enable outputs from the EPLD, all of which are low-level true, however

only one should be true at a time to avoid bus contention. They are decoded from

the address lines, and an internally-latched signal called MAP. MAP is cleared

when the RESET# input is true, and set when the Monitor EPROMs are accessed in

the address range 1DOOH-IDFFH. MAP will always be set when the board is in the

USER mode.

pin 21 = CEO Enables memory in Ul and U8

(monitor EPROM as shipped).

CEO = (ADDRESS RANGE 2000H - 27FF and NOT MAP)

or ADDRESS RANGE OH- FFH

or ADDRESS RANGE 1DOOH- 1DFFH

pin 22 = CEl Enables memory in U6 and U13

(user 16-bit ROMsim/RAM as shipped).

CEl = (ADDRESS RANGE 2000H - 27FFH and MAP)

or ADDRESS RANGE 2800H - 5FFFH

pin 15-CE2 Enables memory in U14

(user 8-bit ROMsim/RAM as shipped).

CE2 = ADDRESS RANGE 6000H - 7FFFH

pin 14 - CS510 Enables U20, the 82510 UART, which is

used for host communications.

CS510 = ADDRESS RANGE 1EOOH- 1EFFH

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