KNJN Pluto Manuale utente
FPGA RS-232 development boards
© 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017 KNJN LLC
http://www.knjn.com/
his document applies to the following boards:
●Pluto rev. F
●Pluto-II rev. H
●Pluto-IIx rev. A
●Pluto-IIx HDMI
●Pluto-3 rev. B and C
FPGA RS-232 development boards Page 1
Document last revision on October 19, 2017
Table o Contents
1 Welcome............................................................................................................................................................................. 5
1.1 his guide................................................................................................................................................................... 5
1.2 Why RS-232 FPGA boards?....................................................................................................................................... 5
1.3 he Pluto boards........................................................................................................................................................ 5
1.4 Boards characteristics................................................................................................................................................ 5
2 Software tools..................................................................................................................................................................... 6
2.1 Important downloads.................................................................................................................................................. 6
2.2 FPGA software........................................................................................................................................................... 6
2.3 C/C++ compiler........................................................................................................................................................... 6
3 FPGAconf........................................................................................................................................................................... 7
3.1 Board selection........................................................................................................................................................... 7
3.2 Configuring the FPGA................................................................................................................................................ 7
3.3 FPGAconf options...................................................................................................................................................... 7
4 FPGA boot-PROM (Pluto-II/-IIx/-IIx HDMI/-3)..................................................................................................................... 8
4.1 What's the boot-PROM?............................................................................................................................................. 8
4.2 Boot-PROM actions.................................................................................................................................................... 8
4.3 Boot-PROM requirements.......................................................................................................................................... 8
4.4 Boot-PROM and J AG............................................................................................................................................... 8
4.5 Boot-PROM on-demand FPGA configuration............................................................................................................. 8
5 FPGAconf extras................................................................................................................................................................ 9
5.1 Auto configuration mode............................................................................................................................................. 9
5.2 Scrollbar..................................................................................................................................................................... 9
5.3 erminal...................................................................................................................................................................... 9
6 FPGA configuration using Quartus-II J AG support (Pluto-II/-3)......................................................................................10
6.1 J AG requirements................................................................................................................................................... 10
6.2 J AG configuration................................................................................................................................................... 10
7 FPGA project using Quartus-II (Pluto/-II/-3)...................................................................................................................... 11
7.1 Create a new project................................................................................................................................................. 11
7.2 A simple start............................................................................................................................................................ 11
8 FPGA projects with Xilinx's ISE (Pluto-IIx/HDMI).............................................................................................................. 12
8.1 Create a new project................................................................................................................................................ 12
8.2 A simple start............................................................................................................................................................ 12
9 FPGA connections............................................................................................................................................................ 13
9.1 FPGA pins................................................................................................................................................................ 13
9.2 IO headers................................................................................................................................................................ 13
9.3 Boot-PROM connection (Pluto-II/-IIx/HDMI/-3).........................................................................................................13
9.4 HDMI (Pluto-IIx/HDMI).............................................................................................................................................. 13
9.5 Power header........................................................................................................................................................... 13
9.6 XDI connector......................................................................................................................................................... 14
9.7 Secondary connector................................................................................................................................................ 14
10 J AG connection............................................................................................................................................................ 15
10.1 J AG on Pluto........................................................................................................................................................ 15
10.2 J AG on Pluto-II..................................................................................................................................................... 15
10.3 J AG on Pluto-IIx/HDMI......................................................................................................................................... 15
10.4 J AG on Pluto-3..................................................................................................................................................... 15
11 Flashy boards................................................................................................................................................................. 16
11.1 FlashyMini design................................................................................................................................................... 16
11.2 FlashyDemo design................................................................................................................................................ 16
12 FPGA configuration through RS-232.............................................................................................................................. 17
12.1 Pluto/-II/-IIx FPGA configuration............................................................................................................................. 17
With a UAR .............................................................................................................................................................. 17
Without a UAR ......................................................................................................................................................... 17
12.2 Pluto-3 FPGA configuration.................................................................................................................................... 17
13 Quartus-II J AG indirect mode (Pluto-II/-3).................................................................................................................... 18
13.1 What is it?............................................................................................................................................................... 18
13.2 Create a “J AG indirect configuration” file.............................................................................................................. 18
13.3 Program the boot-PROM........................................................................................................................................ 18
14 Power requirements....................................................................................................................................................... 19
14.1 Wall adapter........................................................................................................................................................... 19
14.2 USB to power jack cable......................................................................................................................................... 19
FPGA RS-232 development boards Page 2
14.3 Power consumption................................................................................................................................................ 19
14.4 Voltage regulator temperature................................................................................................................................ 19
15 Connecting the Pluto boards to a PC............................................................................................................................. 20
15.1 Serial connection.................................................................................................................................................... 20
15.2 With a XDI............................................................................................................................................................ 20
15.3 With a XDI/MAX232 or XDI/F DI....................................................................................................................... 20
15.4 Without a XDI....................................................................................................................................................... 20
16 Sample C code for RS-232 Win32 send & receive......................................................................................................... 21
17 Board checklist............................................................................................................................................................... 22
17.1 he FPGA doesn't configure?................................................................................................................................. 22
17.2 Boot-PROM problem?............................................................................................................................................ 22
18 Board connectors and headers, with IO pin assignments...............................................................................................23
18.1 Pluto....................................................................................................................................................................... 23
18.2 Pluto-II.................................................................................................................................................................... 24
18.3 Pluto-IIx.................................................................................................................................................................. 25
18.4 Pluto-IIx HDMI........................................................................................................................................................ 26
18.5 Pluto-3.................................................................................................................................................................... 27
19 Mechanical drawings...................................................................................................................................................... 28
19.1 Pluto....................................................................................................................................................................... 28
19.2 Pluto-II/-IIx/-IIX HDMI............................................................................................................................................. 29
19.3 Pluto-3.................................................................................................................................................................... 30
FPGA RS-232 development boards Page 3
FPGA RS-232 development boards Page 4
1 Welcome
1.1 This guide
Welcome to the KNJN FPGA RS-232 development boards guide.
Although FPGA boards can be intimidating, the Pluto FPGA boards are easy to use. his document is partitioned in short
and easy to read chapters, and will explain all you need to know about your new FPGA board.
1.2 Why RS-232 FPGA boards?
Although RS-232 is overshadowed by USB's popularity, RS-232 provides an easier way to interact with FPGAs, and so is
valuable as a learning tool.
1.3 The Pluto boards
his guide applies to five different boards (Pluto, Pluto-II, Pluto-IIx / HDMI and Pluto-3).
Along this document, when a paragraph apply to all of them, they are collectively named “the Pluto boards” or “the FPGA
boards”.
Check them also on the KNJN website.
1.4 Boards hara teristi s
Pluto Pluto-II Pluto-IIx Pluto-IIx HDMI Pluto-3
FPGA (vendor page) EP1K10 EP1C3 XC3S50A or 200A XC3S200A EP2C5
Datasheet (PDF) ACEX 1K Cyclone Spartan-3A Spartan-3A Cyclone II
Logic cells 576 2910 1584 or 4032 4032 4608
IO pins 41 51 48 36 65
PLL/DLL - PLL DLL DLL PLL
External clocks up to 2 up to 4 up to 4 up to 4 up to 4
Boot-PROM (1) - 1Mbit 1Mbit or 4Mbit 4Mbit 4Mbit
On-board oscillator 25MHz 25MHz 25MHz 25MHz 25MHz
DIL8 oscillator header - - - Yes Yes
Push-button - - - - Yes
JTAG header - (see chapter 10) (see chapter 10) (see chapter 10) Yes
LED(s) 1 1 1 2 2
ADC board ready Flashy / Widy Flashy / Widy Flashy / Widy Flashy / Widy FlashyD / WidyD
Dimensions 58 x 28 mm 58 x 28 mm 58 x 28 mm 58 x 28 mm 58 x 41 mm
(1) Minimum boot-PROM size shown here. Actual product may use a higher capacity boot-PROM.
FPGA RS-232 development boards Page 5
2 So tware tools
2.1 Important downloads
Each KNJN FPGA board is provided with a “startup-kit” that includes the board documentation and other files (mainly
example source code). he startup-kit doesn't include some important software tools that are required as you experiment
with your FPGA board:
●he FPGA software
●A C/C++ compiler
2.2 FPGA software
he FPGA software is required to generate FPGA bitfiles. You have to get the software that matches your FPGA.
Board So tware
Pluto Quartus II Web Edition 9.0 SP2
Pluto-II Quartus II Web Edition 11.0 SP1
Pluto-IIx ISE W eb PACK
Pluto-IIx HDMI ISE W eb PACK
Pluto-3 Quartus II Web Edition 13.0
hese software are free, don't require a license and don't expire. hey are big so you might want to download and install
them in advance.
2.3 C/C++ ompiler
A C/C++ compiler is optional but you'll need one for many projects. Here are different compilers that can be used:
●Microsoft Visual C++ 5.0 or 6.0
●Microsoft Visual C++ 2010 express edition or Visual Studio Express 2012 for Windows Desktop (free downloads)
●Digital Mars (free download)
●Jacob Navia's lcc-win32 (free download)
FPGA RS-232 development boards Page 6
3 FPGAcon
FPGAconf is a multifunction software provided with your FPGA board.
3.1 Board sele tion
FPGAconf can be used with different boards – make sure that your board is selected.
For example, we select Pluto-II below.
3.2 Configuring the FPGA
FPGAconf makes FPGA configuration very easy.
1. Select an RBF or BI bitfile (i.e. click on the browse button to select a file – the browse button is shown as “...”).
2. Click “Configure”.
After a few seconds, the FPGA should be configured. If not, see the board checklist (chapter 17).
For your convenience, sample RBF and BI files are provided in the startup-kit. In particular, try “LEDblink” and “LEDglow”
from the LED directory.
When the FPGA is not configured, the board's LED glows slightly. With practice, you’ll be able to recognize immediately if
the FPGA is configured or not.
3.3 FPGA onf options
he different settings available are:
1. “Beep after configuration”
2. “COM port” (choose from COM1 to COM32)
3. “Look for any COM port available” (if the COM port specified fails, FPGAconf uses the next port it can open)
4. “Use alternate COM port for the terminal” (useful if you want the terminal window to use a different port)
5. “Keep COM port open after configuration” (some PCs reset the Pluto board unless this is enabled)
6. “ urbo mode” (allows faster FPGA configuration, works on most boards)
FPGA RS-232 development boards Page 7
4 FPGA boot-PROM (Pluto-II/-IIx/-IIx HDMI/-3)
4.1 What's the boot-PROM?
he boot-PROM is a serial flash memory that is read by the FPGA at power-up to get configuration data. If the boot-
PROM is empty or its content is invalid, the FPGA stays un-configured and the boot-PROM gets “out of the way” to allow
FPGA configuration from another source (RS-232 or J AG).
4.2 Boot-PROM a tions
he boot-PROM can be programmed, verified and erased.
●o program the boot-PROM, select a bitfile and left-click on the “Program boot-PROM” button.
●o verify or erase the boot-PROM, right-click on the button and use the drop-down menu.
4.3 Boot-PROM requirements
FPGAconf requires bi-directional communication with the PC to access the boot-PROM. If the boot-PROM is not
recognized by FPGAconf, try the SerialRx x project to diagnose the communication.
4.4 Boot-PROM and JTAG
he boot-PROM can also be programmed from J AG, although it is usually less convenient.
●For Pluto-II and Pluto-3, use Quartus-II J AG indirect mode (chapter 13).
●For Pluto-IIx, use ISE iMPAC (part of ISE WebPACK).
4.5 Boot-PROM on-demand FPGA onfiguration
On the Pluto-IIx/HDMI/-3 boards, the boot-PROM can also configure the FPGA “on-demand” (i.e. under software control
after power-up).
Here's a summary of all the boot-PROM features.
Boot-PROM Pluto-II Pluto-IIx Pluto-IIx HDMI Pluto-3
Configures FPGA at power-up Yes Yes Yes Yes
Can be programmed through RS-232 Yes Yes Yes Yes
Can be programmed through J AG Yes Yes Yes Yes
Configures FPGA on-demand (after power-up) No Yes Yes Yes
FPGA RS-232 development boards Page 8
5 FPGAcon extras
5.1 Auto onfiguration mode
When the “Auto mode” is enabled, FPGAconf monitors the bitfile and takes action each time the file is updated. Useful for
example if you want to re-configure the FPGA automatically after each ISE or Quartus-II compilation,.
5.2 S rollbar
FPGAconf has a “scrollbar window” that is activated by pressing C RL-S. Every time the scrollbar position is changed, a
byte between 0 and 255 is sent to the Pluto board (depending of the bar position).
hat can be used to control easily a servomotor for example, or other simple applications that can be controlled by a
single byte.
5.3 Terminal
FPGAconf has an RS-232 terminal window that is activated by pressing C RL- .
Note: you can also use a third-party terminal, but it is recommended in this case to use a XDI with MAX232. See
paragraph 15.3 and KNJN's XDI page for more information.
FPGA RS-232 development boards Page 9
6 FPGA con iguration using Quartus-II JTAG support (Pluto-II/-3)
6.1 JTAG requirements
o use the J AG port, you need a compatible J AG cable (like an Altera ByteBlaster-MV/II or USB-Blaster) connected to
your board's J AG connector (chapter 10).
6.2 JTAG onfiguration
Follow these steps:
●In Quartus-II, open the “Programmer” window (Menu → ools → Programmer)
●Click on the “Hardware Setup” button and select the J AG cable you’re using.
●Select “J AG” in the “Mode” drop-down list.
●Load the “.sof” file.
●Check the “Program/Configure” check-box and click “Start”.
Note how J AG configuration is accomplished through the Quartus-II software using SOF files instead of RBF files. Both
files are generated by Quartus-II – more details in paragraph 7.2.
he boot-PROM can also be programmed using J AG, check chapter 13 for more information.
FPGA RS-232 development boards Page 10
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