Quectel EC25 series Guida

EC25 Reference Design

LTE Module Series

Rev. EC25_Reference_Design_Rev.D

Date: 2016-11-11

www.quectel.com

LTE Module Series

EC25 Reference Design

EC25_Reference_Design Confidential / Released 1 / 4

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assistance, please contact our company headquarters:

Quectel Wireless Solutions Co., Ltd.

Office 501, Building 13, No.99, Tianzhou Road, Shanghai, China, 200233

Tel: +86 21 5108 6236

Email: [email protected]

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QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION

PROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORT

TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT

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OR DESIGN.

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About the Document

History

Revision

Date

Author

Description

2016-04-01

Winter CHEN

Initial

2016-08-22

Yeoman CHEN

1. Added ADC interface design in Sheet 1.

2. Added power supply for codec in Sheet 3.

3. Added note for UART Translator (Transistor

Solution) in Sheet 4.

4. Changed some DGND to AGND in audio

design in Sheet 5.

2016-10-14

Eden LIU

Added the reference design of SGMII and FC20

module

2016-11-11

Power JIN

1. Modified the connection of network name

PCM_IN_BT and PCM_OUT_BT in Sheet 1

2. Added note 7 in Sheet 7

3. Added note 6 in Sheet 9

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Contents

About the Document................................................................................................................................ 2

Contents.................................................................................................................................................... 3

1Reference Design.............................................................................................................................. 4

1.1. Introduction.............................................................................................................................4

1.2. Schematics .............................................................................................................................4

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1Reference Design

1.1. Introduction

This document provides the reference design for Quectel EC25 module.

1.2. Schematics

The schematics illustrated in the following pages are provided for your reference only.

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Module Interface

6. Keep all RESERVED and unused pins unconnected, and all GND pins are connected to the ground network.

Notes:

5. C101/C102 must be close to the SGMII interface of the module.

1. It is recommended to reserve the test points for upgrading the firmware over USB interface and

4. ADC pin can not be directly connected to the power supply and must not exceed the voltage range.

2. Do not pull up WAKEUP_IN_MODULE unless the module starts up sucessfully.

Note 1

Note 2

Note 3

Note 5

3. Do not pull up NTE_MODE unless the module starts up sucessfully.

Note 4

minimizing the stub length of USB test signals.

8. PCM_***_BT network is used for the communication with FC20 module and

CODEC_PCM_*** network is used for the communication with CODEC.

FC20 and CODEC can not be connected to the same PCM

interface at the same time.

Reference Design

7. Pin 73～84 are unused in the design. You can ignore them in schematic, PCB decal and the keepout area of pin 73～84.

R112 0R

R110 0R

R111 NM_0R

R109 NM_0R

R113 100K

R114 100K

R116

100K

R115 100K

C101 100nF

C102 100nF

R117 NM_0R

R118 0R

R119 NM_0R

R120 0R

R121 NM_0R

R122 0R

R123 NM_0R

R124 0R

R107 NM_0R

R103 NM_0R

R105 NM_0R

R108 0R

R104 0R

R106 0R

R101 NM_0R

R102 0R

1WAKEUP_IN

2AP_READY

3RESERVED

4W_DISABLE#

5NET_MODE

6NET_STATUS

7VDD_EXT

8GND

9GND

10 USIM_GND

11 DBG_RXD

12 DBG_TXD

13 USIM_PRESENCE

14 USIM_VDD

15 USIM_DATA

16 USIM_CLK

17 USIM_RST

18 RESERVED

19 GND

20 RESET_N

21 PWRKEY

22 GND

23 RESERVED

24 PCM_IN

25 PCM_OUT

26 PCM_SYNC

27 PCM_CLK

28 RESERVED

29 RESERVED

30 RESERVED

31 RESERVED

32 RESERVED

33 RESERVED

34 RESERVED

35 ANT_DIV

36 GND

RESERVED

I2C_SCL

I2C_SDA

RESERVED

ADC1

ADC0

GND

ANT_GNSS

GND

ANT_MAIN

GND

RESERVED 56

GND 57

VBAT_RF 58

VBAT_RF 59

VBAT_BB 60

VBAT_BB 61

STATUS 62

RI 63

DCD 64

CTS 65

RTS 66

DTR 67

TXD 68

RXD 69

USB_DP 70

USB_DM 71

USB_VBUS 72

GND

115 USB_BOOT

116 RESERVED

113

RESERVED 114

RESERVED

141 RESERVED

142 RESERVED 143

RESERVED

144

RESERVED

U101-A

EC25

85 GND

86 GND

87 GND

88 GND

89 GND

90 GND

91 GND

92 GND

93 GND

94 GND

95 GND

96 GND

97 GND

98 GND

99 GND

100 GND

101 GND

102 GND

103 GND

104 GND

105 GND

106 GND

107 GND

108 GND

109 GND

110 GND 111

GND

112

GND

117

RESERVED

118

WLAN_SLP_CLK

119

EPHY_RST_N

120

EPHY_INT_N

121

SGMII_MDATA

122

SGMII_MCLK

123

SGMII_TX_M

124

SGMII_TX_P

125

SGMII_RX_P

126

SGMII_RX_M

127

PM_ENABLE

128

USIM2_VDD

129

SDC1_DATA3

130

SDC1_DATA2

131

SDC1_DATA1

132

SDC1_DATA0

133

SDC1_CLK

134

SDC1_CMD

135

WAKE_ON_WIRELESS

136

WLAN_EN

137

COEX_UART_RX

138

COEX_UART_TX

139

BT_EN

140

RESERVED

U101-B

EC25

[4] USIM_GND

[10] DBG_RXD

[10] DBG_TXD

[4] USIM_VDD

[4] USIM_CLK

[4] USIM_RST

[4] USIM_DATA

[2,4,7,9,10] VDD_EXT

[10] NET_STATUS

[10] NET_MODE

[2] W_DISABLE_MODULE

[2] AP_READY_MODULE

[2] RESET_N

[2,10] PWRKEY

[6] ANT_DIV

[6]

ANT_MAIN

[6]

ANT_GNSS

[2,10] USB_VBUS

[2] USB_DM

[2] USB_DP

[4] RXD_MODULE

[4] TXD_MODULE

[4]

DTR_MODULE

[4] RTS_MODULE

[4] CTS_MODULE

[4]

DCD_MODULE

[4]

RI_MODULE

[10]

STATUS

[1,3,10]

VBAT

[1,3,10]

VBAT

[4] USIM_PRESENCE

[5] CODEC_PCM_IN

[5] CODEC_PCM_OUT

[5] CODEC_PCM_SYNC

[5] CODEC_PCM_CLK

[5]

I2C_SDA

[10]USB_DM_TEST

[10]USB_DP_TEST

ADC0_INPUT

ADC1_INPUT

[5]

I2C_SCL

[9]

BT_EN

[9]

COEX_UART_TX

[9]

COEX_UART_RX

[9]

WLAN_EN

[9]

WAKE_ON_WIRELESS

[9]

SDIO_CMD

[9]

SDIO_CLK

[9]

SDIO_D0

[9]

SDIO_D1

[9]

SDIO_D2

[9]

SDIO_D3

[7]

SGMII_RX_M

[7]

SGMII_RX_P

[7]

SGMII_TX_P

[7]

SGMII_TX_M

[7]

SGMII_MDIO_CLK

[7]

SGMII_MDIO_DAT

[7]

EPHY_INT_N

[7]

EPHY_RST_N

[9] PCM_OUT_BT

[9] PCM_IN_BT

[9] PCM_SYNC_BT

[9] PCM_CLK_BT

[9] RXD_BT

[9] TXD_BT

[9] RTS_BT

[9] CTS_BT

[10] USB_BOOT

[7]

USIM2_VDD

[2] WAKEUP_IN_MODULE

[3]

PM_ENABLE

[9]

WLAN_SLP_CLK

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MCU Interface

It is used to turn on or off the module. It is used to reset the module.

5V power source from main board.

Notes:

1. U201 represents customer's MCU.

2. EC25 can only work as a USB device and supports Full Speed and High Speed modes. To communicate with USB interface,

MCU needs to support USB host or OTG function. The VBUS pins of MCU and EC25 should be powered by

a 5V power system for USB detection, and VBUS-CTRL is used to turn on/off VBUS power supply.

3. AP_READY can be configured to high level detection and low level detection. For more details about AP_READY,

please refer to

4. Transistor circuits (Q203~Q206) are used for level translation.

Keep WAKEUP_IN_MODULE at low level

before module starts up successfully.

Reference Design

Quectel_EC25&EC21_AT_Commands_Manual.Quectel_EC25_Hardware_Design

and

VBUS_CTRL=High level, Q207 is turned on.

AP_READY_MODULE low level detection.

Q206 SI2333CDS-T1

Q207

DTC043ZEBTL

R204

10K

Q202

DTC043ZEBTL

Q201

DTC043ZEBTL

Q205

2SC4617TLQ

R201

4.7K

R202

4.7K

Q203

DTC043ZEBTL

C201

470nF

R203

100K

Q204

DTC043ZEBTL

VDD

GND

TXD

RXD

CTS

RTS

USB_VBUS

USB_D+

USB_D-

GPIO_01

GPIO_02

GPIO_03

USB_ID

GPIO_04

GPIO_05

GPIO_06

GPIO_07

GPIO_08

GPIO_09

GPIO_10

GPIO_11

GPIO_12

GPIO_13

DCD

DTR

U201

VDD_MCU

[4]

TXD_MCU

[4]

RXD_MCU

[1]

USB_DP

[1]

USB_DM

[1,2,10]

USB_VBUS

[2]

ON/OFF_MCU

[2]

RESET_MCU

[2]

VBUS_CTRL

[3] DC_5V [1,2,10]

USB_VBUS

[2] VBUS_CTRL

[2]

W_DISABLE_M

[2]

SLEEP_STATUS

[1]

RESET_N

[2] RESET_MCU

[1,10]

PWRKEY

[2] ON/OFF_MCU

[4]

CTS_MCU

[4]

RTS_MCU

[3]

VBAT_EN

[1] AP_READY_MODULE [2]

SLEEP_STATUS

VDD_EXT VDD_EXT

[1]W_DISABLE_MODULE

[2] W_DISABLE_M

[2]WAKEUP_IN_MCU

[1]

WAKEUP_IN_MODULE

[4]

RI_MCU

[4]

DCD_MCU

[4]

DTR_MCU

[3]

CODEC_POWER_EN

[2]

WAKEUP_IN_MCU

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VDD_1V8=(R310/R312+1)*1.207=1.8V

VDD_3.3V=(R305/R308+1)*1.207=3.3V

Power Supply Design

DC-DC Application

It is used when the input voltage is above 7V. Use a DC-DC converter to convert a high input voltage

e.g. DC12V IN DC-DC DC 5V OUT LDO DC 3.8V 2.0A

LDO DC 1.8V

LDO DC 3.3V

VBAT=(R301/R306+1)*1.24=3.88V

Recommended load current is greater than 10mA.

Codec

Supply Power for FC20 and SGMII

VDD3V3=(R314/R317+1)*1.24=3.3V

LDO FC20

DC 3.3V 1.2A

SGMII

EC25

into 5V output, and then the LDOs will generate 3.8V, 3.3V and 1.8V typical voltages.

LDO Application

It is used when the input voltage is below 7V.

Note:

1. Recommended load current of MIC29302WU is greater than 10mA.

Notes:

Close to the module VBAT pins.

Notes:

2. VBAT should be routed in star mode to VBAT_BB and VBAT_RF pins.

VBAT Design

Connect to VBAT_BB pins.

Connect to VBAT_RF pins.

1. The power supply must be able to provide sufficient current up to 2A or more.

3. The recommended operating voltage of VBAT is 3.3V~4.3V.

Supply Power for PCM Codec

Reference Design

Note 2

2. RC circuit, which is assembled with R318 and C327, is used to delay the start-up of MOSFET switch circuit.

Note 1

1IN

3EN

OUT

2GND

U303

SGM2019-ADJYN5G/TR

C320

4.7uF

R310

39K_1%

R312

75K_1%

C318

100nF

C321

100nF

C322

33pF

C319

1uF

C315

4.7uF

R305

73.2K

R308

42.2K

C316

100nF

C313

1uF

C314

100nF

1IN

3EN

OUT

2GND

U302

SGM2019-ADJYN5G/TR

C317

33pF

R307

100K

R304 0R

R311

100K

R309 0R

C323

470uF

1EN

2IN

3GND

OUT

5ADJ

U304

MIC29302WU

C324

100nF

C326

100nF

C325

470uF

R314

75K

R317

47K

R313

51K

R315

330R R316

10K

Q302

SI2333

C327

100nF

R318

100K

Q303

DTC043ZE

C311

470uF

1EN

2IN

3GND

OUT

5ADJ

U301 MIC29302WU

C312

100nF

C310

100nF

C309

470uF

R301

100K

R306

47K

R302

330R

D302

TVS

Q301 DTC043ZEBTL

R303

51K

C301

100uF

D301

PZ3D4V2H

C302

100nF

C303

33pF

C304

10pF

C306

100nF

C307

33pF

C308

10pF

C305

100uF

VDD_1V8

VDD_3.3V

[2,3] DC_5V

[2,3] CODEC_POWER_EN

[2,3] DC_5V

VDD3V3

[1] PM_ENABLE

[9]

VDD3V3_FC20

[2,3] DC_5V VBAT

[2] VBAT_EN

[1,3,10]

VBAT

[1,3,10]

VBAT

[2,3] CODEC_POWER_EN

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1. R401~R403 are applied to suppress the EMI spurious transmission

Notes:

3. R404 can improve anti-jamming capability of the USIM circuit, and

USIM and UART Design

and enhance the ESD protection.

it should be placed close to the USIM connector.

UART Translation - IC Solution (Recommended)

UART Translation - Transistor Solution

4. VCCA should not exceed VCCB. For more information about TXS0108E,

please refer to the datasheet from TI.

5. If you need to enable high baud rate, it is highly recommended to install

a 1nF capacitor (C407/C408/C409/C410) on transistor circiut.

6. The DTR transistor circuit is similar to RTS interface. The RI and DCD

transistor circuits are similar to CTS interface.

2. It is recommended to take electrostatic discharge (ESD) protection measures

near the USIM card socket. The TVS diode with junction capacitance

less than 50 pF must be placed as close as possible to the USIM socket.

USIM Interface

2. EC25 module provides an input pin (USIM_PRESENCE) to detect whether the USIM card exists or not.

It supports both low level and high level detections. For more details, please refer to

1. The decouple capacitor of USIM_VDD should be less than 1uF and must be near to USIM socket.

Notes:

Note:

It is recommended to use an IC conversion chip for UART translation.

Note:

Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. Reference Design

Quectel_EC25_Hardware_Design.

C401 100nF

U401 ESDA6V8AV6

C403

33pF

C404

33pF

C402

33pF

R401 22R

R402 22R

R403 22R

R404

15K

C405

100nF

R406

120K

R405

10K

C406 100nF

Q401

2SC4617TLQ Q402 2SC4617TLQ

R408

4.7K

R407

4.7K

C407

1nF

R409

4.7K

R410

4.7K

C408

1nF

Q403

2SC4617TLQ

R412

4.7K

R411

4.7K

Q404 2SC4617TLQ

R413

4.7K

R414

4.7K

6A5

7A6

8A7

9A8

10 OE

5A4

4A3

VCCB

GND

3A2

2VCCA

1A1

U402

TXS0108E

GND

VPP

I/OCLK

RST

VCC

PRESENCE

J401

SIM Holder

R415

51K

C409

1nF

C410

1nF

USIM_VDD

[1] USIM_RST

[1] USIM_CLK

[1] USIM_DATA

USIM_VDD

[1]

USIM_GND

VDD_EXT

VDD_EXT VDD_MCU

[1,4] TXD_MODULE

[1,4] RXD_MODULE

[1] RI_MODULE

[1] DTR_MODULE

[2,4]

RXD_MCU

[2,4]

TXD_MCU

[2]

DTR_MCU

[2]

RI_MCU

[2,4] TXD_MCU [1,4]

RXD_MODULE

VDD_EXT

[2,4] RXD_MCU [1,4]

TXD_MODULE

VDD_EXTVDD_MCU

VDD_EXT

[1,4]RTS_MODULE

[2,4] RTS_MCU

VDD_EXT VDD_MCU

[2,4] CTS_MCU [1,4]

CTS_MODULE

VDD_EXT

[2,4]

CTS_MCU

[2,4]

RTS_MCU

[1,4] CTS_MODULE

[1,4] RTS_MODULE

[1] DCD_MODULE [2]

DCD_MCU

VDD_EXT

[1] USIM_PRESENCE

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CTIA OMTP

R519/R521

R518/R520 M

Audio Design

Audio - Earphone Application Audio - Handset Application

To make sure the function works normally, please follow ALC5616 power on and off sequence.

Note:

For more details please refer to ALC5616 datasheet.

Close to earphone interface.

1. The analog output only drives earphone and headset. For larger power loads such as speakers, the design needs to incease the audio power amplifier.

2. The maximum capacitive loading for SPK is 330 pF and the maximum capacitive loading for MIC is 250 pF.

Notes:

Reference Design

J502

D504

ESD9X5.0ST5G

D505

C537

33pF

C539

33pF

C540

10pF

C538

10pF

C541

33pF

C536

10pF

C544

10pF

C545

33pF

C546

10pF

C547

33pF

C543

33pF

C542

10pF

C527

10pF

C528

33pF

C529

4.7uF

F501 0R

F502 0R

F504 0R

F503 0R

D506

PESD5V0S1BL

D507

2IN1P/DMC_DAT

3IN2P

4IN2N/JD2

DACREF 6

AVDD

7AGND

LOUTR/N

CPN2

CPP2

CPN1

CPP1

CPVDD

CPVPP

CPVREF

CPVEE

HPO_L

21 ADCDAT1

22 DACDAT1

23 LRCK1

SCL

SDA

28 GPIO1/IRQ1

DBVDD

DCVDD

MICVDD

32 MICBIAS1

VREF2

24 BCLK1

1JD1

LOUTL/P

HPO_R

25 MCLK

33 DGND

U501

ALC5616

C505

4.7uF

C504

4.7uF

C503

100nF

R501 0R

C501

4.7uF

C502

100nF

C5092.2uF

C510100nF

C506

4.7uF

C507

100nF

C508

2.2uF

C515 2.2uF

C516 2.2uF

C511 4.7uF R503

R508 NM_10K

R510

4.7K

R509

4.7K

C523 4.7uF

C521 2.2uF

C522 2.2uF

R517 0R

R-0805

R504 0R

R505 0R

R506 0R

R507 0R

C512

C513

C514

C524 2.2uF

C525 2.2uF

R516

R514

1.5K

R513

R515

1.5K

C526

10uF

R502 0R

J501

C517 1uF

C518 1uF

C519 1uF

C520 1uF

R511 0R

R512 0R

C530

10pF

C531

33pF

D501

ESD9X5.0ST5G

R519 NM_0R

R518 0R

R520 0R

R521 NM_0R

D502

PESD5V0S1BL

C532

10pF

C533

33pF

D503

PESD5V0S1BL

C534

10pF

C535

33pF

R522 0R

R523 0R

C549

NM_33pF

C548

NM_33pF

[5] SPK_P

[5] MIC_P

[5] MIC_N

[5] SPK_N

VDD_3.3V

VDD_1V8

VDD_3.3V

[1]

I2C_SDA

[1]

I2C_SCL

VDD_1V8

[1] CODEC_PCM_OUT

[1] CODEC_PCM_IN

[1] CODEC_PCM_CLK

[1] CODEC_PCM_SYNC

[5]MIC+

[5] MIC-

[5]

SPK_P

[5]

SPK_N

MICBIAS

[5] MIC_P

[5] MIC_N

MICBIAS

[5]

MIC+

[5]

MIC-

VDD_1V8

[5]

SPK_R

[5]

SPK_L

[5] SPK_R

[5] SPK_L

[5] MIC_P

[5]

MIC_P

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