Texas Instruments DAC5668EVM Manuale utente

User's Guide

SLAU241A–June 2008–Revised March 2010

DAC5668/88/89EVM

1 Overview

1.1 Purpose

The DAC5668/88/89EVM provides a platform for evaluating the DAC5668, DAC5688, and DAC5689

digital-to-analog (DAC) converter under various signal, reference, and supply conditions. All three DACs

are dual channel, 800MSPS interpolating DACs with DAC5668 being a 12-bit DAC and

DAC5688/DAC5689 being 16-bit DACs. Also, both the DAC5668 and the DAC5688 have internal

PLL/VCO, which is useful when a high-rate clock is not available at the system level. The table below

summarizes the comparisons among the DAC family. The evaluation module also allows designers to

analyze either a transformer-coupled output from the DAC or an RF-modulated output using Texas

Instruments (TI) TRF3703 analog quadrature modulator. Use this document with the EVM schematic

diagram and the corresponding device datasheet.

Table 1. Device Comparisons

12-Bit 16-Bit PLL/VCO EVM Software

DAC5668 X X DAC5688

DAC5688 X X DAC5688

DAC5689 X DAC5689

1.2 EVM Basic Functions

Digital inputs to the DAC can be provided with CMOS-level signals up to 250 MSPS through two 34-pin

headers. The analog outputs from the DAC are available via SMA connectors. Because of its flexible

design, the analog outputs of the DAC device can be configured to drive a 50-Ωterminated cable using a

4:1 or 1:1 impedance ratio transformer, or single-ended referred to AVDD. The EVM also allows for an

option to use TI’s TRF3703 analog quadrature modulator to mix the DAC outputs to RF.

The EVM also includes a TI CDCM7005 clock distribution device to clock the system. The CDCM7005 can

be used with an onboard VCXO for full PLL functionality or with an external signal source, in which case

the CDCM7005 functions as a buffer.

Power connections to the EVM are via banana jack sockets. In addition to the internal bandgap reference

provided by the DAC device, the EVM allows an external reference to be provided to the DAC.

The DAC5668/88/89EVM allows the user to program the DAC and CDCM7005 registers through a USB

port. The interface allows read and write access to all the DAC5668/88/89 registers and write-only access

to the CDCM7005 registers.

1.3 Power Requirements

The DAC5668/88/89EVM requires 1.8-Vdc and 3.3-Vdc supplies for normal operation. An additional 5-Vdc

supply is required to power up the TRF3703 for RF measurements.

SLAU241A–June 2008–Revised March 2010 DAC5668/88/89EVM

Software Installation

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1.3.1 Voltage Limits

CAUTION

Exceeding the maximum input voltages can damage EVM components.

Undervoltage may cause improper operation of some or all of the EVM

components.

2 Software Installation

The DAC5668/88/89EVM comes with a software package that allows the user to configure the DAC and

CDCM7005 registers, save and load register settings to/from text files, and visualize the data path through

the DAC. Communication with the EVM is achieved through a USB port on the host PC. The DAC5668

and the DAC5688 shares the same EVM software since both DACs have internal PLL/VCO. The

DAC5689 has a stand-alone EVM software.

2.1 Minimum Requirements

Before installing the software, verify that the PC meets the following requirements:

• Microsoft Windows™ 2000 or later operating system

• 1024 × 768 screen resolution for optimal viewing

• USB 1.1 or later compatible input port

Other configurations may work; however, they remain untested.

2.2 Installing the EVM Control Software

Double-click the setup.exe file located on the installation CD. The EVM Installation Wizard opens.

Figure 1. DAC5668/88/89/89EVM Install Screen

2DAC5668/88/89EVM SLAU241A–June 2008–Revised March 2010

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Software Installation

2.3 Installing the DAC5668/88/89EVM Instrument Drivers

As part of the installation Wizard, the EVM instrument drivers are installed automatically. Because the

USB device driver is unsigned by Windows, the warning in Figure 2 appears. Press Continue Anyway to

complete the installation.

Figure 2. Windows USB Driver Warning

To finalize the installation, the installation Wizard asks the user to restart the computer. The system must

be rebooted prior to running the software.

2.4 Installing the DAC5668/88/89EVM Hardware

After installing the EVM control software and drivers, connect the DAC5668/88/89EVM to a spare USB

port of the host PC. If this is the first time connecting to the device, the Windows Found New Hardware

Wizard guides you through the final setup steps. If the Hardware Wizard does not start, ensure that the

cable is connected properly.

Instruct the Hardware Wizard to find the software automatically. If Windows is unable to find the drivers

automatically, point it to the EVM program folder. The default folder for DAC5668/DAC5688 EVM software

is C:\Program Files\Texas Instruments\DAC5688\DAC5688 Drivers. The default folder for DAC5689 EVM

software is C:\Program Files\Texas Instruments\DAC5689\DAC5689 Drivers. A warning indicating that the

drivers are unsigned by Windows appears. Press Continue Anyway to complete the setup.

To verify a complete installation, open Windows Hardware Device Manager and observe that the

DAC5668/88/89EVM should be listed under the USB controllers list as shown in Figure 3.

SLAU241A–June 2008–Revised March 2010 DAC5668/88/89EVM

DAC5668/88/89EVM Description

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Figure 3. Hardware Device Manager

3 DAC5668/88/89EVM Description

The DAC5668/88/89EVM provides a robust and flexible evaluation system for the 800-MSPS interpolating

DAC5668, DAC5688, and DAC5689 DAC family. In addition to the DAC5668/88/89, the EVM includes a

CDCM7005 for clock distribution and a TRF3703 analog quadrature modulator path for RF

measurements. For a complete hardware description, consult the schematics and layout sections at the

end of this guide. See the DAC5668, DAC5688, DAC5689, CDCM7005, and TRF3703 data sheets for

more information on each device.

3.1 Texas Instruments Components on the DAC5668/88/89EVM

A basic radio system block diagram is shown in Figure 4. The dashed-line box illustrates where the EVM

fits in the system.

Figure 4. Basic Radio System

The block diagram of the EVM is shown in Figure 5. As illustrated on the block diagram, the

DAC5668/88/89EVM includes three Texas Instruments components that make the entire solution an

excellent choice for radio systems.

4DAC5668/88/89EVM SLAU241A–June 2008–Revised March 2010

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DAC5688

CLK2 CLK1

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DAC5668/88/89 Hardware Description

Figure 5. EVM Block Diagram

3.1.1 DAC5668/88/89

The DAC5668/88/89 are dual-channel, 800-MSPS interpolating DACs with dual CMOS digital data bus,

integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled

oscillator (NCO), IQ compensation, and internal voltage reference. Different modes of operation enable or

bypass various signal processing blocks. The DAC5668 and the DAC5688 also include an internal 2x-32x

clock multiplying PLL/VCO. This feature is useful when a high-rate clock is not available at the system

level.

The DAC5668/88/89 dual-CMOS data bus provides 250-MSPS input data transfer per DAC channel.

Several input data options are available: dual-bus data, single-bus interleaved data, even and odd

multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing.

Input data can be interpolated 2x, 4x, or 8x by onboard digital interpolating FIR filters with over 80 dB of

stop-band attenuation.

The DAC5668/88/89 allows both complex and real output. An optional 32-bit NCO/mixer in complex mode

provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A

digital inverse sinc filter compensates for natural DAC Sin(X)/X frequency rolloff. The digital Quadrature

Modulator Correction (QMC) feature allows IQ compensation of phase, gain, and offset to maximize

sideband rejection and minimize LO feedthrough of an external quadrature modulator performing the final

single-sideband RF upconversion.

3.1.2 CDCM7005

The CDCM7005 is a high-performance, low-phase noise and low-skew clock synchronizer that

synchronizes a VCXO (voltage-controlled crystal oscillator) or VCO (voltage-controlled oscillator)

frequency to a reference clock. The CDCM7005 is used to generate and synchronize the clock outputs to

the system. The device has five outputs which can be configured to LVPECL or LVCMOS levels and can

be divided down by 1, 2, 3, 4, 6, 8, and 16. The divide by 16 can be replaced with a divide by 4 or 8 with a

90 degree phase shift.

3.1.3 TRF3703

The TRF3703 is a very-low-noise direct quadrature modulator, capable of converting complex modulated

signals from baseband or IF directly up to RF based on the LO frequency.

4 DAC5668/88/89 Hardware Description

The DAC5668/88/89EVM can be set up in a variety of configurations to accommodate a specific mode of

operation. Before starting evaluation, the user should decide on the configuration and make the

appropriate connections or changes. The demonstration board comes with the following factory-set

configuration:

SLAU241A–June 2008–Revised March 2010 DAC5668/88/89EVM

DAC5668/88/89 Hardware Description

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• No VCXO installed. CDCM7005 in buffer mode which requires an input single-ended clock signal to

SMA connector J20.

• The DAC outputs are set by default to drive the TRF3703.

• The converter is set to operate with internal reference. Jumper J5 EXTLO is installed between pins 1

and 2.

• Full-scale output current set to 20 mA through RBIAS resistor R91.

4.1 Jumper Settings

The DAC5668/88/89EVM has onboard jumpers that allow the user to modify the board configuration.

Table 2 explains the functionality of the jumpers.

Table 2. Jumper List

JUMPER LABEL FUNCTION DEFAULT SETTING

CONDITION

SW1 BRD_RESET Resets the DAC and CDCM7005 devices

JP1 REF_CLK Chooses internal 10-MHz ref or external ref Internal Ref Pin 2-3

J1 VCXO_EN VCXO power down Disabled Unpopulated

JP2 VCXOB Chooses internal VCXO or external source External source Pin 2-3

JP3 VCXO Chooses internal VCXO or external source External source Pin 2-3

JP4 CLK1/CLKOUT Selects between CLK1 input to DAC or CLKOUT DAC CLKOUT Pin 2-3

output

JP5 CLK1C/LOCK Selects between CLK1C input to DAC or LOCK LOCK Pin 2-3

indicator DAC output

JP6 VFUSE Factory use only. Connect to 1.8VDD for normal 1.8 VDD Pin 1-2

operation.

J5 EXTLO Internal (GND) or external (3.3V) voltage reference Internal Reference Pin 1-2

CDC_PD Active-low power down of CDCM7005 Active CDCM7005 Pin 2-3

RESET DAC RESET Signal Unpopulated

CLKOUT_EN Active-low enable of CLKOUT signal buffer Enabled Buffer Pin 1-2

SYNC DAC SYNC Signal GND Pin 1-2

TX_ENABLE DAC TX_ENABLE Signal 3.3V Pin 2-3

4.2 Input/Output Connectors

Table 3 lists the input and output connectors on the DAC5668/88/89EVM.

Table 3. Input and Output Connections

REFERENCE LABEL CONNECTOR DESCRIPTION

DESIGNATOR TYPE

J2 34-pin Header A-bus input data to the DAC.

J3 IOUTB1 SMA Optional IOUTB1 output.

J4 IOUTB2 SMA DACB transformer output. Optional IOUTB2 output.

J6 RFOUT SMA RF output from TRF3703.

J7 34-pin Header B-bus input data to the DAC.

J8 IOUTA1 SMA Optional IOUTA1 output.

J9 IOUTA2 SMA DACA transformer output. Optional IOUTA2 output.

J10/J11 +5V Banana Plug +5-V connection pair. Required only for RF measurements.

J12 USB_CONN USB USB connector for software communication.

J13/J14 +1.8V Banana Plug +1.8-V connection pair.

J15/J16 3.3V Banana Plug +3.3-V connection pair.

J17 OUTCLK2 Y3A SMA Optional CDCM7005 clock output.

J18 OUTCLK2 Y4A SMA Optional CDCM7005 clock output.

6DAC5668/88/89EVM SLAU241A–June 2008–Revised March 2010

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DAC5668/88/89 Hardware Description

Table 3. Input and Output Connections (continued)

REFERENCE LABEL CONNECTOR DESCRIPTION

DESIGNATOR TYPE

J19 OUTCLK1 Y4B SMA Optional CDCM7005 clock output.

J20 EXT_VCXO SMA External main clock input.

J21 DAC CLKOUT SMA CLKOUT output from DAC.

J22 EXT_REF_CLK SMA External reference clock input.

J23 RF_LO_IN SMA TRF3703 LO source input.

4.3 USB Interface

The DAC5668/88/89EVM contains a USB connector to interface to a USB 1.1 or later compliant USB port.

Programming of the CDCM7005 and DAC is accomplished through this port.

4.4 Power Management

The DAC5668/88/89EVM requires 1.8-V and 3.3-V supplies for normal operation. An additional 5-V supply

is required to power up the TRF3703 for RF measurements.

4.5 Input Data

The DAC5668/88/89EVM can accept 1.8-V or 3.3-V CMOS logic levels data inputs through the 34-pin

headers J2 and J7 per Table 4 and Table 5. The board provides series dampening resistors to minimize

digital ringing and switching noise. The DAC logic level is selected through software.

Table 4. Input Data Connector J2 – Data A Bus

Pin Description Pin Description

1 CMOS data bit 15 (MSB) 18 GND

2 GND 19 CMOS data bit 6

3 CMOS data bit 14 20 GND

4 GND 21 CMOS data bit 5

5 CMOS data bit 13 22 GND

6 GND 23 CMOS data bit 4

7 CMOS data bit 12 24 GND

8 GND 25 CMOS data bit 3

9 CMOS data bit 11 26 GND

10 GND 27 CMOS data bit 2

11 CMOS data bit 10 28 GND

12 GND 29 CMOS data bit 1

13 CMOS data bit 9 30 GND

14 GND 31 CMOS data bit 0 (LSB)

15 CMOS data bit 8 32 GND

16 GND 33 SYNC

17 CMOS data bit 7 34 GND

Table 5. Input Data Connector J7 – Data B Bus

Pin Description Pin Description

1 CMOS data bit 0 (LSB) 18 GND

2 GND 19 CMOS data bit 9

3 CMOS data bit 1 20 GND

4 GND 21 CMOS data bit 10

5 CMOS data bit 2 22 GND

SLAU241A–June 2008–Revised March 2010 DAC5668/88/89EVM

DAC5668/88/89 Hardware Description

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Table 5. Input Data Connector J7 – Data B Bus (continued)

Pin Description Pin Description

6 GND 23 CMOS data bit 11

7 CMOS data bit 3 24 GND

8 GND 25 CMOS data bit 12

9 CMOS data bit 4 26 GND

10 GND 27 CMOS data bit 13

11 CMOS data bit 5 28 GND

12 GND 29 CMOS data bit 14

13 CMOS data bit 6 30 GND

14 GND 31 CMOS data bit 15 (LSB)

15 CMOS data bit 7 32 GND

16 GND 33 TX_ENABLE

17 CMOS data bit 8 34 GND

4.6 Clock Configuration

The CDCM7005 requires a VCXO or external clock source to derive its output clock signals.

4.6.1 Buffer Mode

The DAC5668/88/89EVM does not come populated with a VCXO and requires an external sine wave

source with a 1-Vrms, 0-V offset on SMA J20. Under this setup, the CDCM7005 operates as a buffer. To

select this mode, the following changes need to be made:

1. JP2 and JP3 need to be set in position 2-3.

2. If a VCXO is installed, it is recommended to disable it by removing jumper J1.

4.6.2 PLL Mode

A VCXO can be installed in U6 to operate the CDCM7005 as a PLL. The following changes need to be

made:

1. JP2 and JP3 need to be in the 1-2 position.

2. Install jumper J1.

3. A frequency reference (internal or external) needs to be provided.

4.6.3 DAC Clock Options

In both CDCM7005 configurations, the Y1A/Y1B outputs are used to drive the DAC5668/88/89

CLK2/CLK2C inputs. The DAC5668/88/89 can also be operated in dual-clock mode, in which case a

second clock needs to be provided to the device. This clock may be single ended (CLK1) or differential

(CLK1/CLK1C). The CDCM7005 Y2A/Y2B outputs may be used to provide this clock. To do this, the

following changes need to be made:

1. If the clock is single ended, connect jumper JP4 in the 1-2 position.

2. If the clock is differential, connect jumpers JP4 and JP5 in the 1-2 position.

As an output, the CLK1 signal provides a clock at the data rate frequency. The data rate clock is used to

drive a buffer and is accessible through SMA connector J21. This signal can be used to clock the data

source to the DAC. To enable this output, the following changes need to be done to the board:

1. Connect jumper JP4 to position 2-3.

2. Jumper J5 /CLKOUT_EN must be in the 1-2 position.

If the device is not in dual-clock mode, the CLK1 pin can be configured as an output. The CLK1C pin can

be configured as a PLL lock indicator. The PLL lock indicator is connected to LED D4 (JP5 must be in

position 2-3). The DAC5689 does not have the internal PLL feature thus the PLL lock indicator is not

functional.

8DAC5668/88/89EVM SLAU241A–June 2008–Revised March 2010

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DAC5668/88/89 Hardware Description

4.7 Output Configuration

The DAC5668/88/89EVM has a resistor network that can be configured such that the DAC outputs are

routed to the TRF3703 for an RF measurement or routed to the transformer path for a DAC measurement.

The default setup on the board is for RF output.

4.7.1 DAC Outputs

To configure the DAC5668/88/89EVM to evaluate the DAC outputs, the following changes need to be

done to the board:

1. R46, R56, R58, and R69 need to be uninstalled

2. R45, R55, R57, and R68 need to be installed

If the board is configured for DAC outputs, the TRF3703 modulator is not used and the 5-Vdc supply is

unnecessary. The DAC outputs in this setup are in J4 and J9.

The DAC outputs can be configured to drive a doubly terminated 50-Ωcable or to provide unbuffered

differential outputs.

4.7.1.1 Transformer-Coupled Signal Output

The factory-set configuration of the EVM provides the user with single-ended DAC output signals at SMA

connectors J4 and J9. The DAC outputs are configured to drive a doubly terminated 50-Ωcable using a

4:1 impedance ratio transformer with the center tap of the transformers connected to +3.3 Vdc.

4.7.1.2 Unbuffered Differential Output

To provide unbuffered differential outputs, the EVM must be configured as follows:

1. Remove T1 and T2.

2. Install R36 (24.9 Ω), R37 (24.9 Ω), R74 (24.9 Ω), R75 (24.9 Ω), R34, R41, R42, R71, R72, and R77.

With a 20-mA, full-scale output current, this configuration provides a 0.5-Vpp output.

4.7.2 RF Output

To configure the DAC5668/88/89EVM to evaluate the RF output (default setup), the following changes

need to be done to the board:

1. R46, R56, R58 and R69 need to be installed

2. R45, R55, R57, and R68 need to be uninstalled

If the board is configured for RF output, the 5-Vdc must be applied to power up the modulator. The output

in this setup is in J6.

4.7.2.1 TRF3703 LO Source

The DAC5668/88/89EVM requires an external local oscillator (LO) source to drive the onboard TRF3703

modulator. This external LO input needs to be connected to the SMA connector J23. The signal level of

the LO source must comply with the requirements in the TRF3703 data sheet (SLWS184), but typically an

LO power around 0-to-3 dBm is adequate.

4.7.2.2 DAC-to-Modulator Interface

The TRF3703 quadrature modulator requires a common-mode dc voltage of approximately 3.3 V. In order

to use the dc-offset adjustment capabilities of the DAC5668/88/89 for carrier suppression, it is imperative

to maintain a dc path from the DAC output to the modulator input. The common-mode voltage for the

modulator is maintained with a passive resistor network that is designed to provide the proper operation

point for the DAC and the TRF3703 modulator.

The DAC5668/88/89EVM is configured with enough pads to provide a specific fifth-order differential

passive LC filter. By default, it is only populated with a simple LC low-pass filter to attenuate the higher

clock harmonics. The 3-dB corner of this filter is approximately 300 MHz.

SLAU241A–June 2008–Revised March 2010 DAC5668/88/89EVM

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IOUT = 16

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The DAC5668/88/89EVM also includes a pi pad network on the modulator output to provide some

matching or filtering, if desired. In its default state, the pad is not used and a series capacitor is used on

the RF output.

4.8 Reference Operation

The DAC full-scale output current is set by applying an external resistor (R91) between the BIASJ pin of

the device and ground. The full-scale output current can be adjusted from 20 mA down to 2 mA by varying

this resistor. The full-scale output current, IOUTFS, is defined as follows:

(1)

where VEXTIO is the voltage at pin EXTIO. This voltage is 1.2 V when using the internally provided bandgap

reference voltage source. The internal reference can be disabled and overridden by an external reference

by connecting a voltage source to EXTIO and connecting EXTLO to +3.3 Vdc (J5 EXTLO connected

between pins 2 and 3). The specified range for external reference voltages must be observed.

5 DAC5668/88/89 EVM Software

The EVM Control Software is started by accessing the Windows Start →All Programs →Texas

Instruments DACs cascading menus. The DAC5668 and the DAC5688 share the same EVM software,

and the DAC5689 has a stand-alone EVM software.

The DAC EVM application allows users to:

• Configure the DAC and CDCM7005 registers.

• Save and load register settings using text files.

• Visualize the data path through the DAC.

5.1 Software Description

The software has five main settings that allow you to modify the functionality of the active panels. You can

switch between these settings by selecting one of the Menu items described in Table 6.

10 DAC5668/88/89EVM SLAU241A–June 2008–Revised March 2010

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