Texas Instruments TPS65300EVM Manuale utente

User's Guide

SLVU685–February 2012

TPS65300EVM

Contents

1 Introduction .................................................................................................................. 2

2 Setup ......................................................................................................................... 2

2.1 Input/Output Connector Description ............................................................................. 2

2.2 Setup ................................................................................................................ 6

2.3 Operation ............................................................................................................ 6

3 Board Layout ................................................................................................................ 7

4 Schematic and Bill of Materials ........................................................................................... 9

4.1 Schematic ........................................................................................................... 9

4.2 Bill of Materials .................................................................................................... 10

List of Figures

1 EVM Board................................................................................................................... 2

2 IGN Jumper Settings ....................................................................................................... 3

3 EN Jumper Settings ........................................................................................................ 3

4 3.3V PWR Jumper Settings ............................................................................................... 4

5 1.2V PWR Jumper Settings ............................................................................................... 4

6 Bridge Jumper Settings .................................................................................................... 4

7 Top Assembly Layer........................................................................................................ 7

8 Top Layer Routing .......................................................................................................... 8

9 Bottom Layer Routing ...................................................................................................... 8

10 TPS653000EVM Schematic............................................................................................... 9

List of Tables

1 Device and Package Configurations ..................................................................................... 2

2 TPS65300EVM Bill of Materials ......................................................................................... 10

PowerPAD is a trademark of Texas Instruments.

SLVU685–February 2012 TPS65300EVM

Introduction

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1 Introduction

The Texas Instruments TPS65300EVM evaluation module (EVM) helps designers evaluate the operation

and performance of the TPS65300 Switch Mode Power Supply – Multiple-output voltage regulator.

The EVM contains one DC / DC converter (see Table 1).

Table 1. Device and Package Configurations

Converter IC Package

U1 TPS65300QPWPRQ1 PWP-24

2 Setup

This section describes the jumpers and connectors on the EVM and how to properly connect, set up and

use the TPS65300EVM.

2.1 Input/Output Connector Description

Figure 1. EVM Board

2TPS65300EVM SLVU685–February 2012

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IGN

Low, part disabled

at startup , (unless

supplied via

IGN-terminal )

IGN

High, part enabled

at startup , do not

install if connected

at IGN-terminal

Low, part disabled

after ignition of

(IGN = low)

High, part remains

enabled after

ignition off

(IGN = low)

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Setup

Terminal blocks:

J1 – Input is the output terminal for the TPS65300 switch-mode converter. The terminal block provides a

power (VREG) and ground (GND) connection.

J2 – Output is the power input terminal for the device. The terminal block provides a power (VBAT) and

ground connection to allow the user to attach the EVM to a cable harness.

J3 – Sync is the input terminal to enable the TPS65300 at initial startup. The terminal block provides a

power (IGN) and ground (GND) connection. If this terminal is not used, install the IGN-Jumper to power-up

the device (see the respective description). If IGN is shut down again, the device will power down, unless

the EN-Jumper is installed.

J5 – Output is the output terminal for the TPS65300 linear regulator controller with 1.2V output. The

terminal block provides a power (1.2V) and ground (GND) connection. Please observe the Power-ratings

of the external bipolar-transistor: If powered from VREG, it allows approximately 120mA at room

temperature, approximately 50mA at 125°C ambient. Note, if the dropout is reduced by powering it from

the 3.3V-rail (installing BRIDGE jumper instead of 1.2V_PWR jumper), will allow higher currents on this

rail, but consider the extra power drawn from the 3.3V rail and its transistor

Jumpers:

IGN – required to power-up the device at startup: if IGN is low (IGN-terminal not supplied AND IGN-

jumper not installed) the part will not power-up (indifferent of EN-setting). Either supply IGN-terminal with a

High-level or install the IGN-jumper to power up the device:

Figure 2. IGN Jumper Settings

EN – Keeps the outputs of the devices active after ignition is turned off (IGN = low). However, a high level

on IGN is required for initial start-up. Before this, the EN-jumper has no effect. Note, as opposed to IGN,

the EN-pin is a logic-level-input, maximum input voltage should not exceed 5.25V.

Figure 3. EN Jumper Settings

SLVU685–February 2012 TPS65300EVM

3.3VPWR

unsupplied Supplied

by VREG

3.3VPWR

1.2VPWR

Disconnected

from VREG

Supplied by

VREG, remove

before installing

BRIDGE-jumper!

1.2VPWR

BRIDGE

Disconnected

from 3.3V rail

Supplied by 3.3V rail.

Remove 1.2V_PWR-

jumper before

installation

BRIDGE

Setup

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3.3V_PWR – Supplies the Collector of the external bipolar transistor of the 3.3V rail. Installing connects it

to VREG (5.3V-output of the Buck-regulator). If uninstalled, the transistor in not powered (Note: at light

loads, the base-current may be sufficient to supply the output, but adding a load causes VOUT to drop).

Figure 4. 3.3V PWR Jumper Settings

1.2V_PWR - Supplies the Collector of the external bipolar transistor of the 1.2V rail. Installing connects it

to VREG (5.3V-output of the Buck-regulator). If uninstalled, the transistor in not powered (Note: at light

loads, the base-current may be sufficient to supply the output, but adding a load causes VOUT to drop). An

alternative to supply the 1.2V rail is to install the jumper on BRIDGE (see Figure 6), but make sure to

never have both jumpers (1.2V_PWR and BRIDGE) installed at the same time.

Figure 5. 1.2V PWR Jumper Settings

JP6 – Bridge - Supplies the Collector of the external bipolar transistor of the 1.2V rail. Installing connects

it to the 3.3V LDO-output. If connected, consider the extra current drawn from the 3.3V rail, which must be

supported by the power-dissipation of the 3.3V-transistor! Make sure to never have both jumpers

(1.2V_PWR and BRIDGE) installed at the same time.

Figure 6. Bridge Jumper Settings

4TPS65300EVM SLVU685–February 2012

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Setup

Test Points:

• VBAT Power Input

• VIN_D, VIN Power Input after the reverse battery protection diode.

• IGN Ignition, monitors if IGN-input is high, powering up the device.

• IGN_EN Ignition enable (IGN after series resistor).

• BOOT_LDO Voltage at internal regulator, which supplies the power to charge the flying boot

capacitor.

• VREG Regulated output of switch-mode converter, supplying 5.3V.

• DELAY Input for reset delay.

• SS Input for soft start time.

• EN Enable pin, if high, the device remains active after IGN is transitioning to low.

• GND (x7) Ground

• PH Switch node, source of internal switching FET.

• nRST Reset output for Switcher, asserted high after VREG, 3.3V and 1.2V regulator

outputs are regulating and delay timer has expired.

• 3.3V 3.3V - Linear regulator output

• 3.3VDRIVE Base drive for external 3.3V-regulator bipolar transistor.

• 1.2V 1.2V - Linear regulator output.

• 1.2VDRIVE Base drive for external 1.2V-regulator bipolar transistor.

• VSENSE Inverting node of error amplifier for voltage mode control of VREG.

• IGN_ST Ignition input indicator. Asserted high while ignition input is high.

• 5V Output of the 5V linear regulator. Since no screw-terminal is provided for this

output, use the test-point to attach a load.

SLVU685–February 2012 TPS65300EVM

Setup

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2.2 Setup

The input voltage range for the converter is 5.6 volts to 40 volts.

2.3 Operation

For proper operation of the TPS65300EVM, the jumpers should be properly configured. Set jumpers to

this configuration:

EN Open (device will power down if IGN is transitioning low.

3.3V_PWR Installed (supply 3.3V rail from VREG).

1.2V_PWR Installed (supply 1.2V rail from VREG, remove before installing BRIDGE-jumper!).

BRIDGE Open (install to supply 1.2V rail from 3.3V-rail, remove 1.2V_PWR jumper before

installing BRIDGE!).

IGN Installed (device powers up if VIN is applied).

In this configuration, the regulators will turn on when power is applied and will power down if Vin is falling.

To prohibit initial startup, remove IGN-jumper. While IGN is high, EN has no functionality. If IGN transitions

low after the device has powered up, a high level on EN (jumper installed) will keep the regulators active,

a low (EN open) will power down the regulators if IGN goes low.

The supply for the 1.2V rail is sourced from VREG in the above configuration. BRIDGE allows to power

the external transistor of this rail from the 3.3V output, make sure to remove the jumper on 1.2V_PWR

before installing BRIDGE-jumper. This reduces the drop-out-voltage on the external transistor and such

helps to reduce power dissipation on this transistor; however, consider the extra power drawn from the

3.3V rail, causing extra dissipation on the 3.3V-rail transistor.

The switching frequency is defined by the resistor on RT (R4), here 40.2kΩ, setting fSW to approximately

2.4MHz.

Regulator Configuration (out current s given for above configuration, i.e. 1.2V rail powered from VREG):

Regulator Output Voltage Maximum Output Current

Switcher 5.3 V 1.2 A

3.3V regulator 3.3 V 0.3A (at room temperature, less at high temperature)

1.2V regulator 1.2 V 0.1A (at room temperature, less at high temperature)

5V regulator 5 V 0.2A

6TPS65300EVM SLVU685–February 2012

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Board Layout

3 Board Layout

Figure 7,Figure 8 and Figure 9 show the board layout for the TPS65300EVM PWB. The EVM offers

jumpers to enable the device in various ways and to select supply rails for 3.3V and 1.2V linear regulators.

Figure 10 shows the schematic.

The TPS65300 converter offers high efficiency, but does dissipate power. The PowerPAD™ package

offers an exposed thermal pad to enhance thermal performance. This must be soldered to the copper

landing on the PCB for optimal performance. The PCB provides a GND-plane on the bottom side to

dissipate heat from the device, transferred via the PowerPad™ and thermal vias underneath the device.

The external transistors have a smaller area on the top side connected to their collector to allow heat

dissipation.

Figure 7. Top Assembly Layer

SLVU685–February 2012 TPS65300EVM

Board Layout

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Figure 8. Top Layer Routing

Figure 9. Bottom Layer Routing

8TPS65300EVM SLVU685–February 2012

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10uH

GND

0.1uF

GND

GND GND GND GND GND

GND

VIN_D

10uF

2 1

+C1

GND

IGN_ST

PBSS302NZ

GND

VREG

IGN

GND

3.3V

1.2V

GND

VIN

IGN_EN

BOOT_LDO

VSENSE

1.2VDRIVE

3.3VDRIVE

nRST

30.1k

IGN

3.3V PWR

1.2V PWR

30.1k

40.2k

1uF

27.4k

30k

240

660

DELAY

1nF

2.2uF

C11

470pF

C12

0.01uF

0.033uF

2.2uF

C13

2.2uF

C10

0.1uF

VIN

nRST 23

COMP 14

1.2VDRIVE 17

SS 20

RT/CLK

IGN_EN

VIN_D

BOOT

NC 13

PGND 24

1.2VSENSE 16

3.3VDRIVE 19

3.3VSENSE 18

BOOT_LDO

VSENSE 15

PAD

IGN_ST

GND

DELAY 21

VREG 22

U1 TPS65300

VBAT

GND

2 1

10uF

DNP

2 1

+C9

GND

0.1uF

C14

GND

JP6

GND

0.1uF

C15

GND

0R0

R41

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Schematic and Bill of Materials

4 Schematic and Bill of Materials

4.1 Schematic

Figure 10. TPS653000EVM Schematic

SLVU685–February 2012 TPS65300EVM

Schematic and Bill of Materials

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4.2 Bill of Materials

Table 2. TPS65300EVM Bill of Materials

COUNT REF DES DESCRIPTION SIZE MFR PART NUMBER

1 C1 Capacitor, ceramic, 10uF, 16V 1206 Panasonic EEV-FK1H221P

2 C2, C3 Capacitor, ceramic, 0.1uF, 50V, 10% 603 muRata GCM188R71H104KA57

1 C4 Capacitor, ceramic, 10uF, 63V Size D Panasonic ECE-V1JA100P

1 C5 Capacitor, ceramic, 0.01uF, 50V, 10% 603 muRata GRM188R71H103KA01D

1 C6 Capacitor, ceramic, 0.033uF, 25V, 10% 603 muRata GRM188R71E333KA01D

1 C7 Capacitor, ceramic, 1uF, 16V, 10% 603 muRata GRM188R61E105KA12D

1 C8 Capacitor, ceramic, 1000pF, 50V, 10% 603 muRata GRM188R71H102KA01D

1 C9 do not populate

3 C10, C11, C13 Capacitor, ceramic, 2.2uF, 50V, 10% 1210 muRata GCM31CR71H225KA55L

1 C12 Capacitor, ceramic, 470pF, 50V, 10% 603 muRata GRM188R71H471KA01D

2 D1, D2 Diode, Schottky, 3A, 100V PowerDI Diodes PDS360-13

5 J1, J2, J3, J4, J5 Terminal block, 2-pin, 6A, 3.5mm 0.25 x 0.27 OST ED1514

1 L1 Inductor, SMT, 10-uH 12.3mm x Coilcraft MSS1278T-103

12.3mm

26 1.2V, 3.3V, 1.2VDRIVE, Test point, 52-mil 0.052 Kobiconn 151-103-RC

3.3VDRIVE, 5V,

BOOT_LDO, DELAY, EN,

GND(7), IGN, IGN_EN,

IGN_ST, nRST, PH, SS,

VBAT, VIN, VIN_D,

VREG, VSENSE

5 1.2VPWR, 3.3VPWR, EN, Header, 2-pin, 100-mil spacing, (36-pin 0.100 x 2 Sullins PEC02SAAN

IGN, BRIDGE (J6) strip)

5 1.2VPWR, 3.3VPWR, EN, Connector jumper, shorting, 100-mil spacing 0.1 Sullins SPC02SYAN

IGN, BRIDGE (J6)

2 Q1, Q2 TRANS NPN 20V 5.8A SOT-223 NXP PBSS302NZ

3 R1, R2, R8 Resistor, chip, 30.1-kΩ, 1/10W, 1% 603 Panasonic ERJ-3EKF3012V

1 R3 Resistor, chip, 6.04-kΩ, 1/10W, 1% 603 Panasonic ERJ-3EKF6041V

1 R4 Resistor, chip, 40.2-kΩ, 1/10W, 1% 603 Panasonic ERJ-3EKF4022V

1 R5 Resistor, chip, 665-Ω, 1/10W, 1% 603 Panasonic ERJ-8ENF6650V

1 R6 Resistor, chip, 27.4-kΩ, 1/10W, 1% 603 Panasonic ERJ-3EKF2742V

1 R7 Resistor, chip, 240-Ω, 1/10W, 1% 603 Panasonic ERJ-8GEYJ241V

1 R41 Resistor, chip, 0R0Ω, 1/10W, 1% 603 Panasonic ERJ-3GEY0R00V

1 U1 IC, TPS65300-Q1PWPR TI TPS65300QPWP

- PCB, 3-inch x 3-inch x 0.062 Any TPS65300, REV G

10 TPS65300EVM SLVU685–February 2012

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