Texas Instruments TPS7A26EVM-021 Manuale utente

SBVU050–December 2018

TPS7A26EVM-021 Evaluation Module

User's Guide

SBVU050–December 2018

TPS7A26EVM-021 Evaluation Module

Figure 1. TPS7A26EVM-021 Evaluation Module

This user’s guide describes the operational use of the TPS7A26EVM-021 evaluation module (EVM) as a

reference design for engineering demonstration and evaluation of the TPS7A2601DRV, low-dropout linear

regulator (LDO). Included in this user’s guide are setup and operating instructions, thermal and layout

guidelines, a printed circuit board (PCB) layout, a schematic diagram, and a bill of materials (BOM).

Throughout this document, the terms demonstration kit,evaluation board, and evaluation module are

synonymous with the TPS7A26EVM-021.

Table 1 lists the related documentation available through the Texas Instruments web site at www.ti.com.

Table 1. Related Documentation

Device Literature Number

TPS7A26 SBVS290

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Contents

1 Introduction ................................................................................................................... 3

1.1 Before You Begin................................................................................................... 3

2 EVM Setup.................................................................................................................... 4

2.1 Input/Output Connectors and Jumper Descriptions............................................................ 4

2.2 Soldering Guidelines ............................................................................................... 5

2.3 Equipment Connection............................................................................................. 5

3 Operation ..................................................................................................................... 5

4 PCB Layout................................................................................................................... 6

5 Schematic..................................................................................................................... 7

6 Bill of Materials............................................................................................................... 8

List of Figures

1 TPS7A26EVM-021 Evaluation Module ................................................................................... 1

2 Assembly Layer.............................................................................................................. 6

3 Top Layer Routing........................................................................................................... 6

4 Bottom Layer Routing....................................................................................................... 6

5 TPS7A26EVM-021 Schematic............................................................................................. 7

List of Tables

1 Related Documentation..................................................................................................... 1

2 TPS7A26EVM-021 BOM.................................................................................................... 8

Trademarks

All trademarks are the property of their respective owners.

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Introduction

SBVU050–December 2018

TPS7A26EVM-021 Evaluation Module

1 Introduction

Texas Instruments' TPS7A26EVM-021 EVM helps design engineers evaluate the operation and

performance of the TPS7A26 family of linear regulators for possible use in their own circuit application.

This particular EVM configuration contains a single low-noise, high-PSRR linear regulator for high-speed

communication systems. The regulator is capable of delivering up to 500 mA to the load with low VIN to

VOUT dropout voltage. For stability, use a 0.47-µF (or larger) output capacitor for the TPS7A26.

1.1 Before You Begin

The following warnings and cautions are noted for the safety of anyone using or working close to the

TPS7A26EVM-021. Observe all safety precautions.

Warning Warning Hot surface. Contact may cause burns. Do not touch.

CAUTION

The circuit module may be damaged by over temperature. To avoid damage,

monitor the temperature during evaluation and provide cooling, as needed, for

your system environment.

CAUTION

Some power supplies can be damaged by application of external voltages. If

using more than one power supply, check your equipment requirements and

use blocking diodes or other isolation techniques, as needed, to prevent

damage to your equipment.

CAUTION

The circuit module is not a finished product or electrical appliance. The module

does not contain current or voltage thresholds for circuit protection. It must be

used by qualified personnel with additional equipment for evaluation only.

EVM Setup

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2 EVM Setup

This section describes how to properly connect and setup the TPS7A26EVM-021, including the jumpers

and connectors on the EVM board.

2.1 Input/Output Connectors and Jumper Descriptions

2.1.1 J1 – IN

Input power supply voltage connector. Twist together the positive input lead and ground return lead from

the input power supply, and keep them as short as possible to minimize input inductance.

2.1.2 J2 – OUT

Regulated output voltage connector.

2.1.3 J3 – VPU

Pullup-voltage selector for PG. This EVM is designed so that PG can be pulled up either to VOUT by

shorting J3, or pulled up to another voltage by applying an external voltage to the VPU post.

2.1.4 J4 – IN_S

Input sense.

2.1.5 J5 – OUT_S

Output sense.

2.1.6 J6 – SHORT TO ENABLE

Output enable. To enable the output, connect a jumper to short VIN to EN.

2.1.7 J7 – GND

Input ground return connector.

2.1.8 J8 – GND

Output ground return connector.

2.1.9 J9 – OUTPUT VOLTAGE Set

For convenience, the EVM is prepopulated with four resistor divider options. Place a shunt on J9 next to

the silkscreen label of your desired output voltage.

2.1.10 TP1 – IN_S

Input sense test point.

2.1.11 TP2 – OUT_S

Output sense test point.

2.1.12 TP3 – EN

Enable test point.

2.1.13 TP4 – PG_S

PG test point.

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EVM Setup

SBVU050–December 2018

TPS7A26EVM-021 Evaluation Module

2.1.14 TP5 – GND

Ground test point.

2.1.15 TP6 – GND

Ground test point.

2.1.16 TP7 – GND

Ground test point.

2.1.17 TP8 – GND

Ground test point.

2.2 Soldering Guidelines

To avoid damaging the integrated circuit (IC), use a hot-air system for any solder rework to modify the

EVM for the purpose of repair or other application reasons.

2.3 Equipment Connection

Connect the equipment as shown in the following steps:

1. Set the input power supply up to 18 V (max), and turn the power supply off.

2. Connect the positive voltage lead from the input power supply to IN at the J1 connector of the EVM.

3. Connect the ground lead from the input power supply to GND at the J7 connector of the EVM.

4. Connect a 0-A to 500-mA load between OUT and GND.

5. Disable the output by floating J6.

3 Operation

Operate the equipment using the following steps:

1. Turn on the power supplies.

2. Enable the output by jumping J6 (the EN pin) to VIN.

3. Vary the respective load and input voltage, as necessary, for test purposes.

PCB Layout

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4 PCB Layout

Figure 2 to Figure 4 illustrate the PCB layout for this EVM.

Figure 2. Assembly Layer Figure 3. Top Layer Routing

Figure 4. Bottom Layer Routing

TPS7A2601DRVR

OUT 1

FB/NC 2

PG 3

GND 5

PAD 7

GND

IN_S

DNP J3

TP1

IN_S

OUT

GND

TP2

OUT_S

DNP

2.2uF

DNP

TP4

PG_S

GND

GND GND GND

GND

2.2uF

DNP

2.2uF

0.01uF

DNP

10.0k

TP3

499k

1.10M

301k

165k

57.6k

OUTPUT VOLTAGE

GND

TP7

GND

TP8

GND

TP6

GND

TP5

GND

Vin Up to 18 V

Vout Selected by J9

Iout Up to 500 mA

100k

12 V

5 V

1.8 V

3.3 V

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Schematic

SBVU050–December 2018

TPS7A26EVM-021 Evaluation Module

5 Schematic

Figure 5 is the schematic for this EVM.

Figure 5. TPS7A26EVM-021 Schematic

Bill of Materials

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6 Bill of Materials

The BOM for this EVM is shown in Table 2.

(1) These assemblies are ESD sensitive, observe ESD precautions.

(2) These assemblies must be clean and free from flux and all contaminants. Use of no-clean flux is not acceptable.

(3) These assemblies must comply with workmanship standards IPC-A-610 Class 2.

(4) Unless otherwise noted in the Alternate Part Number or Alternate Manufacturer columns, all parts may be substituted with equivalents.

Table 2. TPS7A26EVM-021 BOM(1)(2)(3)(4)

Designator QTY Value Description Package Reference Part Number Manufacturer Alternate Part

Number

Alternate

Manufacture

!PCB1 1 Printed Circuit Board LP021 Any

C2, C3 2 2.2uF CAP, CERM, 2.2 uF, 50 V, +/- 20%, X7R, 0805 0805 TDK

J1, J2 2 Standard Banana Jack, Insulated, Red 6091 6091 Keystone

J3, J6 2 Header, 2.54 mm, 2x1, Gold, R/A, SMT Header, 2.54 mm, 2x1, R/A,

SMT 878980204 Molex

J7, J8 2 Standard Banana Jack, Insulated, Black 6092 6092 Keystone

J9 1 Header, 2.54mm, 4x2, Gold, SMT Header, 2.54mm, 4x2, SMT 95278-801A08LF FCI

R1 1 10.0k RES, 10.0 k, 1%, 0.1 W, 0603 0603 RCG060310K0FKEA Vishay Draloric

R2 1 100k RES, 100 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603100KFKEA Vishay-Dale

R3 1 499k RES, 499 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603499KFKEA Vishay-Dale

R4 1 1.10Meg RES, 1.10 M, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06031M10FKEA Vishay-Dale

R5 1 301k RES, 301 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603301KFKEA Vishay-Dale

R6 1 165k RES, 165 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603165KFKEA Vishay-Dale

R7 1 57.6k RES, 57.6 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060357K6FKEA Vishay-Dale

SH-J1, SH-J2, SH-

J3 3 1x2 Shunt, 100mil, Gold plated, Black Shunt 969102-0000-DA 3M SNT-100-BK-G Samtec

TP1, TP2, TP3,

TP4, TP5, TP6,

TP7, TP8 8 Test Point, Compact, SMT Testpoint_Keystone_Compact 5016 Keystone

U1 1 500mA, 18V, Ultra-Low-IQ, Low Drop-Out Linear Voltage

Regulator With Power Good, DRV0006A (WSON-6) DRV0006A TPS7A2601DRVR Texas

Instruments TPS7A2601DRV

TTexas

Instruments

C1, C4 0 2.2uF CAP, CERM, 2.2 uF, 50 V, +/- 10%, X7R, 1206 1206 C3216X7R1H225K160AB TDK

C5 0 0.01uF CAP, CERM, 0.01 uF, 50 V, +/- 10%, X7R, 0603 0603 C1608X7R1H103K080AA TDK

FID1, FID2, FID3 0 Fiducial mark. There is nothing to buy or mount. N/A N/A N/A

J4, J5 0 Connector, SMA Jack, Vertical, Gold, SMD SMA 142-0711-201 Cinch

Connectivity

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AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

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standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you

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