Texas Instruments TRF1208-EVM Manuale utente
User’s Guide
TRF1208 Evaluation Module
ABSTRACT
The basic steps and functions that are required to ensure the proper operation and quick setup of the TRF1208-
EVM. This document also includes a schematic diagram, a bill of materials (BOM), printed-circuit board (PCB)
layouts, and test block diagrams is outlined in this document. Throughout this document, the abbreviations EVM,
TRF1208 EVM and the term evaluation module are synonymous with the TRF1208-EVM, unless otherwise
noted.
Table of Contents
1 Description.............................................................................................................................................................................. 2
1.1 Features............................................................................................................................................................................. 2
1.2 General Usage Information................................................................................................................................................ 2
2 EVM Overview......................................................................................................................................................................... 4
2.1 Schematic.......................................................................................................................................................................... 4
2.2 PCB Layers........................................................................................................................................................................ 5
2.3 TRF1208 EVM Bill of Material............................................................................................................................................6
2.4 Stack-Up and Material........................................................................................................................................................7
3 Test Setup Diagrams.............................................................................................................................................................. 8
3.1 S-Parameter Test Setup.....................................................................................................................................................8
3.2 Noise Figure Test Setup.....................................................................................................................................................9
3.3 Two-Tone OIP3 Test Setup.............................................................................................................................................. 10
4 Related Documentation........................................................................................................................................................11
List of Figures
Figure 1-1. Single Tone Setup for Gain and Output P1dB...........................................................................................................2
Figure 2-1. TRF1208 EVM Schematic.........................................................................................................................................4
Figure 2-2. Top Layer...................................................................................................................................................................5
Figure 2-3. Layer 2...................................................................................................................................................................... 5
Figure 2-4. Layer 3...................................................................................................................................................................... 5
Figure 2-5. Bottom Layer............................................................................................................................................................. 5
Figure 2-6. TRF1208 EVM Stack-Up (Units in Mils).................................................................................................................... 7
Figure 3-1. S-Parameter Test Setup............................................................................................................................................ 8
Figure 3-2. PCB Trace Loss vs Frequency..................................................................................................................................9
Figure 3-3. Noise Figure Test Setup............................................................................................................................................ 9
Figure 3-4. OIP3 Test Setup...................................................................................................................................................... 10
List of Tables
Table 2-1. TRF1208 EVM BOM................................................................................................................................................... 6
Trademarks
Isola® is a registered trademark of Isola USA Corporation.
All trademarks are the property of their respective owners.
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TRF1208 Evaluation Module 1
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1 Description
The TRF1208 evaluation module (EVM) is used to evaluate the TRF1208 device, which is a single-ended input
to differential output RF amplifier available in a 2 × 2-mm2, 12-pin WQFN package. The device is designed to
drive a high-speed differential input ADC without using a passive balun.
The board is set up for 50-Ω single-ended input matching. The amplifier has a low output impedance. The board
has ac-coupling capacitors at input and output. The EVM is ready to connect to a +3.3-V power supply, signal
source, and test instruments for the measurements.
1.1 Features
• Operates on a single +3.3-V supply.
• Designed for a single-ended 50-Ω input matching.
• Simple interface to the inputs and output through onboard SMA connectors.
• Power down option available onboard using a jumper connector.
(J4)
TRF1208
+3.3-V Single Bench
Power Supply
+3.3 V GND
(J6)
TRF1208 EVM
(J1)
DMM
(Current
Measurement)
(J5)
RF Signal Generator
Spectrum Analyzer
Hyperlabs HL9402
or similar
0°
180°
2:1, Zo = 50
3-dB pad
6-dB pad
6-dB pad
3-dB pad
INP
INM
OUTM
OUTP
Figure 1-1. Single Tone Setup for Gain and Output P1dB
1.2 General Usage Information
This section provides general usage information for the TRF1208 EVM. See for a general single tone setup
diagram as a reference point for the following instructions. Some components such as supply bypass capacitors
are omitted for clarity.
1. Recommended power up sequence:
a. Before connecting the power-supply cables to the EVM, set the DC output power supply to +3.3 V.
b. Set the current limit of the DC output power supply at 250 mA.
c. Making sure the supply is turned off, connect the power supply cables to the J1 connector of the EVM.
d. Now turn on the DC power supply of VCC = +3.3 V. The supply current (IQ) drawn from the power supply
should be approximately 135 mA.
e. If the supply current is low, ensure that the device is not disabled by the PD pin.
2. Power-down option:
a. Connect +1.8 V (logic-1) on PD pin to power-down the chip. Ground the PD pin to enable the chip.
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3. Single tone measurement setup recommendation:
a. Connect an RF signal generator to input SMA connector, J4.
When measuring single tone distortion, use an RF band pass filter as shown in Figure 1-1.
b. The RF signal generator used must support up to 12-GHz signal frequency for testing out the TRF1208
EVM.
c. The TRF1208 device input is 50-Ω in the pass-band.
To minimize signal reflections due to impedance mismatch, TI recommends using an attenuator pad of
approximately 3-dB to 6-dB between the source and J4 SMA input.
d. The EVM outputs are fully differential (or 180° out-of-phase) at J5 and J6 SMA connectors.
The TRF1208 device has low output impedance at dc and low frequencies.
e. When connecting to a spectrum analyzer, the differential signal out of the EVM should be converted to a
single-ended signal using an external passive balun as shown in Figure 1-1.
Usage of an attenuator pad of approximately 3-dB to 6-dB is recommended at the three terminals of the
passive balun to minimize reflections.
f. Lastly, it is recommended to properly characterize and account for the insertion loss of RF coaxial (coax)
cables, attenuator pads, and passive baluns to measure accurate gain and power levels for the device.
4. Matching considerations:
a. TRF1208 is a wide-band amplifier and it expects 50-Ω input matching over its operating bandwidth upto
about 12 GHz. A signal generator or Noise Source that drives this EVM will have 50-Ω impedance
over a wide band width. But if this EVM is driven by a narrow-band driver or a source that has non
50-Ω matching, then there may be instability issues with the amplifier. To avoid such issues, additional
matching may be require at the input. See the TRF1208 Single Channel, 10 MHz to 8 GHz 1-dB BW,
Single Ended to Differential Amplifier data sheet for more information.
b. As mentioned earlier, the TRF1208 device has low output impedance and a zero-ohm series resistors
are used in the EVM. When the EVM outputs are connected to a balun, it is recommended to use
attenuator pads to minimize reflections.
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2 EVM Overview
This section includes the schematic diagram, a bill of materials (BOM), PCB layer prints, and EVM stack-up
information.
2.1 Schematic
Figure 2-1 shows the TRF1208 EVM schematic.
Figure 2-1. TRF1208 EVM Schematic
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2.2 PCB Layers
Figure 2-2 through Figure 2-5 illustrate the PCB layers for this EVM.
Figure 2-2. Top Layer Figure 2-3. Layer 2
Figure 2-4. Layer 3 Figure 2-5. Bottom Layer
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2.3 TRF1208 EVM Bill of Material
Table 2-1. TRF1208 EVM BOM
Item # Designator Quantity Value Description Package Reference Part Number Manufacturer Alternate Part
Number
Alternate
Manufacturer
1 C1, C2, C3, C4 4 0.1 µF CAP, CERM, 0.1 µF, 16 V, ± 10%, X7R, 0402 0402 ATC530L104KT16T AT Ceramics
2 C5 1 22 µF CAP, CERM, 22 µF, 10 V, ± 20%, X5R, 0603 0603 CL10A226MP8NUNE Samsung
Electro-
Mechanics
3 C6, C7 2 2.2 µF CAP, CERM, 2.2 µF, 10 V, ± 10%, X7S, 0402 0402 C1005X7S1A225K050B
C
TDK
4 C8 1 0.22 µF CAP, CERM, 0.22 µF, 10 V, ± 20%, X5R, 0201 0201 LMK063BJ224MP-F Taiyo Yuden
5 J1 1 Header, 2.54 mm, 2x1, Gold, TH Header, 2.54 mm, 2x1, TH 61300211121 Wurth
Elektronik
6 J4, J5, J6 3 50 Ω JACK, SMT 50 Ω JACK, SMT 145-0701-802 Cinch
Connectivity
7 J9 1 Header, 100 mil, 3x1, Tin, TH Header, 3 PIN, 100 mil, Tin PEC03SAAN Sullins
Connector
Solutions
8 L1 1 1000 Ω Ferrite Bead, 1000 Ω at 100 MHz, 0.25 A, 0402 0402 BLM15HD102SN1D MuRata
9 R1 1 49.9 RES, 49.9, 1%, 0.05 W, AEC-Q200 Grade 1,
0201
0201 ERJ-1GEF49R9C Panasonic
10 R2 1 2.49k RES, 2.49 k, 1%, 0.063 W, AEC-Q200 Grade 0,
0402
0402 CRCW04022K49FKED Vishay-Dale
11 R3 1 3.24k RES, 3.24 k, 1%, 0.063 W, AEC-Q200 Grade 0,
0402
0402 CRCW04023K24FKED Vishay-Dale
12 R4, R5 2 0 RES, 0, 5%, .05 W, AEC-Q200 Grade 0, 0201 0201 ERJ-1GN0R00C Panasonic
13 SH-J1 1 1x2 Shunt, 100 mil, Gold plated, Black Shunt SNT-100-BK-G Samtec 969102-0000-DA 3M
14 U1 1 RF IC WQFN-FCRLF12 TRF1208RPVR Texas
Instruments
15 FID1, FID2, FID3 0 Fiducial mark. There is nothing to buy or mount. N/A N/A N/A
16 R6, R7 0 0.1 RES, 0.1, 1%, 0.25 W, 0402 0402 ERJ2BWFR100X Panasonic
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2.4 Stack-Up and Material
The TRF1208 EVM is a 67-mil, 4-layer board whose material type is Isola® 370HR. The top layer routes the
power, ground, and signals between SMA connectors and the device. Second layer is the reference RF ground
layer. The signal trace impedance is targeted at 50Ω. The bottom 3 layers are ground layers.
Figure 2-6. TRF1208 EVM Stack-Up (Units in Mils)
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3 Test Setup Diagrams
This section includes general recommendations for S-parameter, noise figure, and two-tone OIP3 setup while
measuring the TRF1208 EVM.
3.1 S-Parameter Test Setup
(J4)
TRF1208
(J6)
TRF1208 EVM
(J5)
INP
INM
OUTM
OUTP
Vector Network Analyzer
Figure 3-1. S-Parameter Test Setup
Use the following guidelines for S-parameter measurement:
1. As Figure 3-1 shows, the S-parameter measurement is typically done using a Vector Network Analyzer
(VNA). For measuring the TRF1208 EVM, a 3-port VNA is recommended which can generate single-ended
and receive differential signals at the input and output ports of EVM respectively.
2. Before connecting the RF coax cables to the EVM, you must calibrate the VNA along with the cables using a
calibration kit.
3. Make sure the frequency sweep and output power level from the VNA is set within the linear operating range
of the TRF1208 devices. The resolution bandwidth (RBW) and dynamic range of the VNA can be adjusted to
give optimum sweep time for the measurement.
4. It is important to account for board trace losses at the input and output side of the device during gain
measurements. Figure 3-2 gives typical input and output trace losses measured on the EVM.
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freq (GHz)
S21 (dB)
0 2 4 6 8 10 12 14 16
-3
-2.5
-2
-1.5
-1
-0.5
0
0.5
Input trace loss: - SE 50-ohm (dB)
Output trace loss: Diff 100-ohm (dB)
Figure 3-2. PCB Trace Loss vs Frequency
3.2 Noise Figure Test Setup
ENR Diode
Spectrum Analyzer or
Noise Figure Analyzer
0°
180°
2:1, Zo = 50
3-dB pad
3-dB pad
(J4)
TRF1208
(J6)
TRF1208 EVM
(J5)
INP
INM
OUTM
OUTP
Hyperlabs HL9402
or similar
Figure 3-3. Noise Figure Test Setup
Use the following guidelines for Noise Figure (NF) measurement:
1. As Figure 3-3 shows, the traditional Y-factor method can be used for the NF measurement using a Noise
Diode and a spectrum analyzer (or a Noise Figure Analyzer).
2. While doing the measurement, take into account any RF cable losses to the EVM board. Any external input
attenuator added for matching will result in proportional NF degradation and must be calibrated out in the
measurement.
3. Also, onboard losses of the input traces at the device input pin must be factored into the NF measurement.
4. If the loss after the device output is significant, it is important to factor the output loss into the NF
measurement. Use the Friis equation to calculate the Noise Figure of the device from the total measured NF.
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3.3 Two-Tone OIP3 Test Setup
RF Signal Gen 1
Spectrum Analyzer
0°
180°
2:1, Zo = 50
3-dB pad
6-dB pad
6-dB pad
3-dB pad
RF Signal Gen 2
Power Splitter/
Combiner
6-dB pad 6-dB pad
(J4)
TRF1208
(J6)
TRF1208 EVM
(J5)
INP
INM
OUTM
OUTP
Hyperlabs HL9402
or similar
Mini-circuits
ZN2PD2-14W+
or equivalent
Figure 3-4. OIP3 Test Setup
Use the following guidelines for two-tone OIP3 measurement:
1. As Figure 3-4 shows, combine two signal generator outputs using an in-phase power splitter and combiner.
A 6-dB attenuator is recommended at the signal generator outputs to prevent the generators from talking to
each other and resulting in signal generator IMD3 spurs.
2. Set both the signal generator outputs to a power level and frequency spacing such that it would yield the
desired output power (POUT) at the device.
3. We recommend that the output power level is within the linear operation range of the TRF1208 device. For
example, if the total desired output power at the device is 8 dBm, then set the signal generators such that
each of the fundamental output power results in 2 dBm per tone. As a general rule, it is recommended to
keep the total output power level approximately 6 to 8 dB lower than the 1-dB compression point. See the
device data sheet for the output power levels supported by the device.
4. For the OIP3 test, the two tones can be spaced by the specified frequency.
5. Set the spectrum analyzer attenuation setting appropriately so that the spectrum analyzer non-linearity does
not affect the measurements.
6. Keep spectrum analyzer RBW and VBW settings identical for main tone and IM3 products.
7. For output IP3 calculation, take into account combined losses at the desired frequency band between the
TRF1208 device output to the spectrum analyzer input. The combined power losses include loss due to
PCB output trace, RF coax cable, 0/180◦passive balun and any attenuator pad used for external matching
purposes. The calculated OIP3 is given in Equation 1.
Output IP3 = (PIN_SA – IMD3) / 2 + PIN_SA + PLOSS
where,
• PIN_SA = Input power per tone into the spectrum analyzer
• PLOSS = Power loss from the device output to the spectrum analyzer input
• IMD3 = Higher power of the two intermodulation distortion products recorded at either 2f1 – f2 or 2f2 – f1
8. In Equation 1, PIN_SA + PLOSS = POUT is the amplifier output power per tone.
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