Transcend Secure Digital Card SD80 Manuale utente

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

Description

Secure Digital Card is a compact, slim and high

capacity storage media with copyright protection.

Designed in advanced SD specification Ver.1.1,

Transcend SD80 series now reaches a new

performance milestone. Based on 0.16 um process

controller and high quality SLC (Single-Level-Cell)

NAND Flash chip, Transcend SD80 series can

provide high performance ,low power consumption yet

excellent reliability.

-Manufactured with SLC NAND Flash chip

-Operating Temperature : -25 ~ 85°C

Placement

Front Back

Features

•Storage Capacity: 128M~1GB

•Operating Voltage: 2.7 ~ 3.6V

•Operating Temperature: -25 ~ 85°C

•Insertion/removal durability: 10,000 cycles

•Fully compatible with SD card spec. v1.1

•Support SD command class 0,2,4,5,7,8

•Mechanical Write Protection Switch

•Forward compatibility to MultiMediaCard Version 2.11

•Supports Copy Protection for Recorded Media(CPRM)

for music and other commercial media

•Form Factor: 24mm x 32mm x 2.1mm

Pin Definition

SD Mode SPI Mode

Pin No.

Name

Type

Description Name

Type

Description

CD/DAT3

I/O/PP

Card Detect/Data Line [Bit3] CS I Chip Select (neg true)

CMD PP Command/Response DI I Data In

SS1

S Supply voltage ground VSS S Supply voltage ground

S Supply voltage VDD S Supply voltage

CLK I Clock SCLK

I Clock

SS2

S Supply voltage ground VSS2

S Supply voltage ground

DAT0

I/O/PP

Data Line [Bit0] DO O/PP Data Out

DAT1

I/O/PP

Data Line [Bit1] RSV

DAT2

I/O/PP

Data Line [Bit2] RSV

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

Architecture

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

Bus Operating Conditions

• General

Parameter Symbol

Min. Max. Unit Remark

Peak voltage on all lines -0.3 VDD+0.3

All Inputs

Input Leakage Current -10 10 µA

All Outputs

Output Leakage Current -10 10 µA

• Power Supply Voltage

Parameter Symbol

Min. Max. Unit Remark

Supply voltage V

2.0 3.6 V CMD0, 15,55,ACMD41

commands

Supply voltage specified in OCR register 2.7 3.6 V Except CMD0, 15,55,

ACMD41 commands

Supply voltage differentials (V

SS1

, V

SS2

) -0.3 0.3 V

Power up time 250 ms From 0v to V

Min.

•

Bus Signal Line Load

The total capacitance C

the CLK line of the SD Memory Card bus is the sum of the bus master capacitance C

HOST

, the bus

capacitance C

BUS

itself and the capacitance C

CARD

of each card connected to this line:

= C

HOST

+ C

BUS

+ Ν*C

CARD

Parameter Symbol

Min. Max. Unit Remark

Bus signal line capacitance C

100 pF f

≤ 20 MHz, 7 cards

Single card capacitance C

CARD

10 pF

Maximum signal line inductance 16 nH f

≤ 20 MHz

Pull-up resistance inside card (pin1) R

DAT3

10 90 kΩMay be used for card

detection

Note that the total capacitance of CMD and DAT lines will be consist of C

HOST

, C

BUS

and one C

CARD

only since they are

connected separately to the SD Memory Card host.

Parameter Symbol

Min. Max. Unit Remark

Pull-up resistance R

CMD

, R

DAT

10 100 kΩTo prevent bus floating

Bus signal line capacitance C

250 pF f

≤ 5 MHz, 21 cards

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

•

Bus Signal Levels

As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage.

To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the

following specified ranges for any V

of the allowed voltage range:

Parameter Symbol Min. Max. Unit Remark

Output HIGH voltage V

0.75*V

V I

= -100 µA @V

min

Output LOW voltage V

0.125*V

V I

= -100 µA @V

min

Input HIGH voltage V

0.625*V

+ 0.3 V

Input LOW voltage V

– 0.3 0.25*V

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

•

Bus Timing (Default)

Parameter Symbol

Min Max. Unit Remark

Clock CLK (All values are referred to min (V

) and max (V

)

Clock frequency Data Transfer Mode f

0 25 MHz C

≤ 100 pF, (7 cards)

Clock frequency Identification Mode

(The low freq. is required for MultiMediaCard

compatibility.)

0 400 KHz C

≤ 250 pF, (21 cards)

10 ns C

≤ 100 pF, (7 cards)Clock low time

50 ns C

≤ 250 pF, (21 cards)

10 ns C

≤ 100 pF, (7 cards)Clock high time

50 ns C

≤ 250 pF, (21 cards)

Clock rise time t

TLH

10 ns C

≤ 100 pF, (7 cards)

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

50 ns C

≤ 250 pF, (21 cards)

THL

10 ns C

≤ 100 pF, (7 cards)Clock fall time

50 ns C

≤ 250 pF, (21 cards)

Inputs CMD, DAT (referenced to CLK)

Input set-up time t

ISU

5 ns C

≤ 25 pF, (1 cards)

Input hold time t

5 ns C

≤ 25 pF, (1 cards)

Outputs CMD, DAT (referenced to CLK)

Output Delay time during Data Transfer Mode t

ODLY

0 14 ns C

≤ 25 pF, (1 cards)

Output Delay time during Identification Mode t

ODLY

0 50 ns C

≤ 25 pF, (1 cards)

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

•

Bus Timing (High Speed Mode)

Parameter Symbol

Min Max. Unit Remark

Clock CLK (All values are referred to min (V

) and max (V

)

Clock frequency Data Transfer Mode f

0 50 MHz

Clock low time t

7 ns

Clock high time t

7 ns

Clock rise time t

TLH

3 ns

Clock fall time t

THL

3 ns

Inputs CMD, DAT (referenced to CLK)

Input set-up time t

ISU

6 ns

Input hold time t

2 ns

Outputs CMD, DAT (referenced to CLK)

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

Output Delay time during Data Transfer Mode t

ODLY

14 ns

Output Hold time t

2.5 ns

Total System capacitance for each line C

40 pF

Reliability and Durability

Temperature Operation: -25°C / 85°C (Target spec)

Storage: -40°C (168h) / 85°C (500h)

Junction temperature: max. 95°C

Moisture and corrosion Operation: 25°C / 95% rel. humidity

Storage: 40°C / 93% rel. hum./500h

Salt Water Spray: 3% NaCl/35C; 24h acc. MIL STD Method 1009

Durability 10.000 mating cycles

Bending 10N

Torque 0.15N.m or +/-2.5 deg

Drop test 1.5m free fall

Visual inspection

Shape and form

No warpage; no mold skin; complete form; no cavities surface smoothness <= -0.1

mm/cm² within contour; no cracks; no pollution (fat, oil dust, etc.)

Minimum moving force of WP witch

40gf (Ensures that the WP switch will not slide while it is inserted to the connector.)

WP Switch cycles minimum 1000 Cycles(@Slide force 0.4N to 5N)

Above technical information is based on industry standard data and tested to be reliable. However, Transcend makes no

warranty, either expressed or implied, as to its accuracy and assumes no liability in connection with the use of this product.

Transcend reserves the right to make changes in specifications at any time without prior notice.

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

Within the card interface six registers are defined: OCR, CID, CSD, RCA, DSR and SCR. These can be accessed only

by corresponding commands. The OCR, CID, CSD and SCR registers carry the card/content specific information,

while the RCA and DSR registers are configuration registers storing actual configuration parameters.

1. OCR register

The 32-bit operation conditions register stores the VDD voltage profile of the card. Additionally, this register

includes status information bits. One status bit is set if the card power up procedure has been finished. This register

includes another status bit indicating the card capacity status after set power up status bit. The OCR register shall be

implemented by the cards. The 32-bit operation conditions register stores the VDD voltage profile of the card. Bit 7 of

OCR is newly defined for Dual Voltage Card and set to 0 in default. If a Dual Voltage Card does not receive CMD8,

OCR bit 7 in the response indicates 0, and the Dual Voltage Card which received CMD8, sets this bit to 1.

Additionally, this register includes 2 more status information bits. Bit 31 - Card power up status bit, this status bit

is set if the card power up procedure has been finished. Bit 30 - Card capacity status bit, this status bit is set to 1 if card

is High Capacity SD Memory Card. 0 indicates that the card is Standard Capacity SD Memory Card. The Card Capacity

status bit is valid after the card power up procedure is completed and the card power up status bit is set to 1. The Host

shall read this status bit to identify a Standard or High Capacity SD Memory Card.

The OCR register shall be implemented by the cards.

OCR Register Definition

1) This bit is valid only when the card power up status bit is set.

2) This bit is set to LOW if the card has not finished the power up routine.

Rev1.2

SD80 Secure Digital Card

Transcend Information Inc.

A voltage range is not supported if the corresponding bit value is set to LOW. As long as the card is busy, the

corresponding bit (31) is set to LOW.

2. CID Register

The Card IDentification (CID) register is 128 bits wide. It contains the card identification information used during the

card identification phase. Every individual flash card shall have a unique identification number. The structure of the

CID register is defined in the following paragraphs:

•

MID:

An 8-bit binary number that identifies the card manufacturer. The MID number is controlled, defined,

and allocated to a SD Memory Card manufacturer by the SD-3C, LLC. This procedure is established to

ensure uniqueness of the CID register.

•

OID :

A 2-character ASCII string that identifies the card OEM and/or the card contents (when used as a

distribution media either on ROM or FLASH cards). The OID number is controlled, defined, and allocated

to a SD Memory Card manufacturer by the SD-3C, LLC. This procedure is established to ensure

uniqueness of the CID register.

Note: SD-3C, LLC licenses companies that wish to manufacture and/or sell SD Memory Cards, including but not limited to flash memory,

ROM, OTP, RAM, and SDIO Combo Cards.

SD-3C, LLC is a limited liability company established by Matsushita Electric Industrial Co. Ltd., SanDisk Corporation and Toshiba

Corporation.

•

PNM :

The product name is a string, 5 ASCII characters long.

•

PRV

The product revision is composed of two Binary Coded Decimal (BCD) digits, four bits each, representing an “n.m”

revision number. The “n” is the most significant nibble and “m” is the least significant nibble.

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