Freescale Semiconductor KIT912F634EVME Manuale utente

Freescale Semiconductor, Inc.

User’s Guide

Document Number: KT912F634UG

Rev. 2.0, 10/2013

Archive Information

KIT912F634EVME Evaluation Board

Featuring the MM912F634 Integrated S12-Based Relay Driver with LIN Device

Figure 1. KIT912F634EVME Evaluation Board

1 Kit Contents/Packing List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2 Jump Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

3 Important Notice. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

4 KIT912F634EVME Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

5 Required Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

6 Setup Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

7 Hardware Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

8 Software Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

9 Schematics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

10 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

11 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

12 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Kit Contents/Packing List

KT912F634UG User’s Guide Rev. 2.0 10/2013

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Archive Information

1 Kit Contents/Packing List

• MM912F634 Evaluation Board (EVB)

• Cable, 6FT. USB2.0 A-M to B-M

• Warranty Card, Freescale

Jump Start

KT912F634UG User’s Guide Rev. 2.0 10/2013

Freescale Semiconductor, Inc. 3

Archive Information

2JumpStart

•Gotowww.freescale.com/analogtools

•Locate your kit

• Review your Tool Summary Page

• Look for

• Download documents, software and other information

Jump Start Your Design

Important Notice

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Archive Information

3 Important Notice

Freescale provides the enclosed product(s) under the following conditions:

This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES

ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs,

outputs, and supply terminals. This evaluation board may be used with any development system or other

source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This

evaluation board is not a Reference Design and is not intended to represent a final design recommendation

for any particular application. Final device in an application will be heavily dependent on proper printed circuit

board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O

signal quality.

The goods provided may not be complete in terms of required design, marketing, and or manufacturing related

protective considerations, including product safety measures typically found in the end product incorporating

the goods. Due to the open construction of the product, it is the user's responsibility to take any and all

appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the

customers applications, adequate design and operating safeguards must be provided by the customer to

minimize inherent or procedural hazards. For any safety concerns, contact Freescale sales and technical

support services.

Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from

the date of delivery and will be replaced by a new kit.

Freescale reserves the right to make changes without further notice to any products herein. Freescale makes

no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor

does Freescale assume any liability arising out of the application or use of any product or circuit, and

specifically disclaims any and all liability, including without limitation consequential or incidental damages.

“Typical” parameters can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typical”, must be validated for each customer application by customer’s

technical experts.

Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are

not designed, intended, or authorized for use as components in systems intended for surgical implant into the

body, or other applications intended to support or sustain life, or for any other application in which the failure

of the Freescale product could create a situation where personal injury or death may occur.

Should Buyer purchase or use Freescale products for any such unintended or unauthorized application, Buyer

shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and distributors

harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,

directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized

use, even if such claim alleges that Freescale was negligent regarding the design or manufacture of the

part.Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or

service names are the property of their respective owners.

KIT912F634EVME Introduction

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Archive Information

4 KIT912F634EVME Introduction

Freescale Semiconductor’s KIT912F634EVME is a system solution which gives the user the capability to easily

evaluate most of the features provided by the MM912F634 - integrated dual low-side and dual high-side switch

with embedded MCU and LIN transceiver for relay drivers. The MM912F634 features two dice in a single

package. The 16-bit core and the analog die are connected by means of the Die-to-Die interface that provides

direct address access to the registers on the analog die. The analog die contains HS and LS switches, as well

as a PWM module, ADC module, timer module, SCI module, LIN physical interface, and other general registers.

All external signals are accessible via header connectors, and most of the signals can also be checked via test

points. The evaluation module board also includes the TBDML programming/debugging interface, so no

external interface is needed. The board can be powered either from two 4.0 mm banana connectors or from the

LIN connector. For quick familiarization with the device, a graphical user interface, based on FreeMASTER

software, is provided together with the module. Thanks to the GUI, the user can easily evaluate the peripheral

modules, or directly access the registers on the analog die.

4.1 MM912F634 Features

• 16-Bit S12 CPU, 32 kByte FLASH, 2.0 kByte RAM

• Background Debug (BDM) and Debug Module (DBG)

• Die-to-die bus interface for transparent memory mapping

• On-chip oscillator and two independent watchdogs

• LIN 2.1 physical layer interface with integrated SCI

• Six digital MCU GPIOs shared with SPI (PA5…0)

• 10-bit, 15-channel - Analog-to-Digital Converter (ADC)

• 16-bit, 4-channel - Timer Module (TIM16B4C)

• 8-bit, 2-channel - Pulse Width Modulation module (PWM)

• Six high-voltage/wake-up inputs (L5.0)

• Three low-voltage GPIOs (PB2.0)

• Low power modes with cyclic-sense and forced wake-up

• Current Sense Module with selectable gain

• Reverse-battery-protected Voltage Sense Module

• Two protected low-side outputs to drive inductive loads

• Two protected high-side outputs

• Chip temperature sensor

• Hall sensor supply

• Integrated voltage regulator(s)

4.2 Caution

1. When working with the kit, always use an isolated laboratory power supply.

2. Keep in mind all ESD rules when handling the board. Avoid touching the connector pins, they are directly

connected to the device pins. Even though the device pins are ESD protected, this protection has its limits.

Some EDS events can destroy or damage the device, or cause its malfunction.

Required Equipment

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Archive Information

4.3 Acronyms

5 Required Equipment

• PC Computer running Windows XP or higher

• 12V Power Supply

• USB Cable (supplied)

6 Setup Guide

6.1 Hardware Setup

Setup and connections for the KIT912F634EVME are straightforward.

The KIT912F634EVME requires a connection to the power supply and a connection to the PC or notebook via

the USB cable. Figure 2 depicts a complete setup.

Follow these steps to set up the board:

1. Plug the USB cable into the connector J101 and connect the other end of the cable to the PC or notebook.

2. A basic jumper configuration is required to be able to use the KIT912F634EVME. See Table 2 for details.

Table 3 provides a complete index of jumper settings.

3. Connect a laboratory power supply via banana connectors to the board, using J2 (V_S supply) and J3

(GND). Alternatively, the LIN connector can be used for powering the board. The supply voltage has to be

in the range of 8.0 to 18 V. When power is applied to the KIT912F634EVME, the green power-on LEDs D6

(+5.0 V), D7 (supply), and D8 (+2.5 V) are lit when power is present and the corresponding jumpers JP4,

JP8, JP9 are closed.

Table 1. Explanation of Acronyms

Acronym Meaning Acronym Meaning

D2D Die to Die bus

interface

MCU Microcontroller Unit

BDM Background Debug

Module

HS High Side (switch)

EVB Evaluation Board LED Light Emitting Diode

EVM Evaluation Module LIN Local Interconnect

Network

ESD Electrostatic

Discharge,

Electrostatic Sensitive

Device

LS Low Side (switch)

GND In this document: main

supply ground

PWM Pulse Width

Modulation

GPIO General Purpose

Input/Output

SCI Serial Communication

Interface

GUI Graphical User

Interface

TBDML Turbo BDM Lite

ADC Analog to Digital

Converter

Setup Guide

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Archive Information

Figure 2. KIT912F634EVMEBasic Hardware Setup

Table 2. KIT912F634EVMEJumper Options for Basic Functionality

Jumper Function Connections

JP1 Supplying of the device logic (VDDX regulator) and Hall sensor supply

regulator enabled

closed

Supplying of the device logic (VDDX regulator) and Hall sensor supply

regulator disabled

open

JP2 Supplying of the HS drivers enabled closed

Supplying of the HS drivers disabled open

JP14 BDM signal from TBDML interface enabled closed

BDM signal from TBDML interface disabled, external BDM interface can

be used (connected to J4)

open

JP15 RST signal from TBDML interface enabled closed

RST signal from TBDML interface disabled, external BDM interface can

be used (connected to J4)

open

Power Supply

GND V_SUP

USB

(+12 V)

Optional

LIN Connector

Power

Hardware Description

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Archive Information

7 Hardware Description

7.1 Board Description

Figure 3 is a snapshot of the EVM with key component and connector locations. The following list corresponds

with the numbers listed on the picture.

1. LEDs to indicate of HS and LS switching

2. Input power connectors

3. Prototype area

4. TBDML interface

5. LIN connector

6. Wake-up button

7. Reset button

8. BDM connector for external programming/debugging BDM interface

9. MM912F634CV1AE

The board is protected against reverse battery voltage by diode D10, which can withstand up to 3.0 A

continuous current. The board operation is straightforward, as is the TDBML interface. (See section “TBDML”

on page 9), the board contains the passive components required for proper operation of the MM912F634.

Connectors provide access to all device pins and test points for important signals.

There are fifteen jumpers on the board. Power to the LEDs is provided through jumpers JP4, JP8, JP10, JP11,

JP12, and JP13. Removing these jumpers allows low power mode current consumption to be demonstrated.

JP6 supplies power to zener diode D11.

Two push buttons are included: SW1 resets the MCU, and SW2 allows wake-up from one of the low power

modes.

A small prototype area allows fast connection of additional components. Key power and ground vias are located

around the prototype area.

The EVM has three different grounds: LIN ground, main supply ground (also referred to as GND), and analog

ground. All grounds are connected together at a single point on the board, located under the MM912F634. The

bottom copper layer of the EVM and copper areas on the top surface are both assigned to GND.

Figure 3. Evaluation Module Board

Hardware Description

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Archive Information

7.1.1 MCU

The MM912F634 is a single package solution that integrates an HCS12 microcontroller with a SMARTMOS™

analog control IC, interfacing via the new high performance Die-to-Die Interface (D2D). The D2D controlled

analog die combines system basis chip and application specific functions, including a Local Interconnect

Network (LIN) transceiver.

The D2D Interface realizes the advantage of a seamless MCU register map, integrating the analog die registers,

while providing faster access than SPI based systems. The HCS12 includes 32 k of flash memory, 2.0 k of RAM,

and a special Die-to-Die Interface, serial peripheral interface (SPI), real time interrupt (RTI), computer operating

properly (COP), and an internal clock generator module. The analog die provides two high side and two low side

outputs with diagnostic functions, voltage regulators for a 5.0 V and 2.5 V MCU supply, window watchdog,

current sense amplifier, four channel timer (TIM), two channel pulse width modulation (PWM) capability, 10 bit

analog to digital converter (ADC), battery voltage sense (VSENSE), and local interconnect network (LIN).

The MM912F634 has three main operating modes: Normal (all functions available); Sleep (VDD off, Wake-up

via LIN, Wake-up inputs (L0-L5), Cyclic Sense, and Forced Wake-up) and Stop (VDD on with limited current

capability, Wake-up via LIN bus, Wake-up inputs (L0-L5), Cyclic Sense, forced Wake-up, and external reset).

7.1.2 TBDML

The Turbo BDM Light interface is a programming and debugging tool, and constitutes an interface between a

PC and the BDM debugging port of Freescale microcontrollers. It enables the debugger and other SW tools to

communicate with the microcontroller, and download code into its on-chip flash, etc. Among the benefits of using

the TBDML on the EVM is a much higher communication speed than other USB/BDM interfaces. It is also not

necessary to connect external devices to the EVM when programming/debugging is needed.

A BDM connector (J4) is placed on the EVM to allow the connection of another BDM tool. In this case, the

jumpers JP14 and JP15 should be removed to disable the TBDML interface.

7.2 Jumper Settings

In Figure 4 is the picture of the EVM with location of all jumpers. Table 3 summarizes the jumper settings.

Figure 4. Position of Jumpers on the EVM

JP11

JP1 JP2

JP3

JP4

JP5

JP6 JP7 JP8

JP9

JP12

JP14

JP13

JP15

JP10

Hardware Description

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10 Freescale Semiconductor, Inc.

Archive Information

Table 3. Jumper Setting

Jumper Function Connections

JP1 Supplying of the device logic (VDDX regulator) and hall sensor supply regulator enabled closed

Supplying of the device logic (VDDX regulator) and hall sensor supply regulator disabled open

JP2 Supplying of the HS drivers enabled closed

Supplying of the HS drivers disabled open

JP3 Wake-up pin L0 connected to HS1 output 1-2

Wake-up pin L0 connected to wake-up button SW2 2-3

JP4 VDDX output voltage (+5.0 V) connected to LED D6 closed

VDDX output voltage (+5.0 V) not connected to LED D6 open

JP5 BKGD/MODC pin connected to +5.0 V via a 3.0 k pull-up resistor 1-2

BKGD/MODC pin connected to GND 2-3

JP6 Supply voltage is connected to Zener diode D11 closed

Supply voltage is not connected to zener diode D11 (when the current consumption of the

device in low power modes is demonstrated).

open

JP7 TCLK pin (#44) is connected to 8.0 V (also jumper JP6 has to be inserted and the board has

to be powered at least with 8.0 V) to disable of the watchdog.

1-2

TCLK pin (#44) is connected to GND 2-3

JP8 Supply voltage (+5.0 to 18 V) is connected to LED D8 closed

Supply voltage (+5.0 to 18 V) is not connected to LED D8 open

JP9 VDD output voltage (+2.5 V) is connected to LED D8 closed

VDD output voltage (+2.5 V) is not connected to LED D8 open

JP10 Diode D2 is connected to output HS2 closed

Diode D2 is not connected to output HS2 open

JP11 Diode D1 is connected to output HS1 closed

Diode D1 is not connected to output HS1 open

JP12 Diode D3 is connected to output LS1 closed

Diode D3 is not connected to output LS1 open

JP13 Diode D4 is connected to output LS2 closed

Diode D4 is not connected to output LS2 open

JP14 BDM signal from TBDML interface enabled closed

BDM signal from TBDML interface disabled, external BDM interface can be used (connected

to J4)

open

JP15 RST signal from TBDML interface enabled closed

RST signal from TBDML interface disabled, external BDM interface can be used (connected

to J4)

open

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