Linear Technology DC2042A Guida rapida alla configurazione

dc2042af

DEMO MANUAL DC2042A

DESCRIPTION

LTC3588-1/LTC3108/LTC3105/

LTC3459/LTC2935-2/LTC2935-4

Energy Harvesting (EH) Multisource

Demo Board

The DC2042A is a versatile energy harvesting demo board

that is capable of accepting piezoelectric, solar, 4mA to

20mA loops, thermal-powered energy sources or any high

impedance AC or DC source. The board contains four

independent circuits consisting of the following EH ICs:

• LT C

3588-1: Piezoelectric Energy Harvesting Power

Supply.

• LTC3108: Ultralow Voltage Step-Up Converter and

Power Manager.

• LTC3105: Step-Up DC/DC Converter with Power Point

Control and LDO Regulator.

• LTC3459: 10V Micropower Synchronous Boost

Converter.

• LTC2935-2/LTC2935-4: Ultralow Power Supervisor

with Power-Fail Output Selectable Thresholds.

The board supports the following interconnects:

• Direct connection with the Dust Mote demo boards, the

DC9003A-B Mote on a chip or the DC9003A-A Manager

on a chip.

• Energy Micro STK development kit.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

In addition, many turrets are provided and one transducer

header is available to make it easy to connect transducers

to the board.

The board contains multiple jumpers that allow the board

to be configured in various ways. The standard build for

the board has three jumpers installed out of the possible

10 jumpers. The board is very customizable to the end

users’ needs. This compatibility makes it a perfect evalu-

ation tool for any low power energy harvesting system

Please refer to the individual data sheets for the opera-

tion of each power management circuit. The application

section of this demo manual describes the system level

functionality of this board and the various ways it can be

used in early design prototyping.

Design files for this circuit board are available at

http://www.linear.com/demo

DC2042A Connected to DC9003A-B Dust Mote (Top View)

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DEMO MANUAL DC2042A

QUICK START PROCEDURE

DC2042A Connected to DC9003A-B Dust Mote (Bottom View)

DESCRIPTION

Refer to Figures 2 through 6 for the proper measurement

equipment setup and jumper settings for the following

test procedure.

1. Note the Header KEY locations that guarantee proper

interconnect of compatible adaptor boards.

J1 (Energy Micro STK Header) does not have a KEY.

J2 (Dust Mote Header) has a KEY in position 5.

J3 (Horizontal Transducer Header, NOT INSTALLED

on standard build) has a KEY in position 12.

J4 (Vertical Transducer Header) has a KEY in position

12.

Figure 1a. J1, Energy Micro Header and J2, Dust Mote Header

Figure 1b. J3, Horizontal Transducer Header

Figure 1c. J4, Vertical Transducer Header

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DEMO MANUAL DC2042A

QUICK START PROCEDURE

2. Configure the test equipment and jumpers as shown

in Figure 2. Verify the jumper settings are as follows:

JP1. OPEN

JP2. OPEN

JP3. OPEN

JP4. OPEN

JP5. OPEN

JP6. OPEN

JP7. OPEN

JP8. INSTALLED

JP9. INSTALLED in “ON” Position

JP10. OPEN

3. Slowly increase PS1 and observe the voltage at which

VM2 turns on. VM1 should be equal to approximately

3.15V.

4. Slowly decrease PS1 towards zero. Observe the volt-

age on VM1 at which VM2 drops rapidly to 0V. VM1

should be equal to approximately 2.25V.

5. Turn off PS1

6. Install JP4 and reconfigure the test equipment as

shown in Figure 3 (Solar Circuit testing).

7. Disconnect PS2 and Set PS2 to 3.0V. Turn off PS2.

Reconnect PS2 and turn on PS2.

8. Observe the voltage on VM1 and VM2. The voltage

on VM1 should be approximately 2.49V and on VM2

should be 3.3V.

9. Turn off PS2

10. MOVE JP4 to JP1. Disconnect PS2 from the board.

Set PS3 equal to 6.0V. Reconfigure the test equipment

as shown in Figure 4.

11. Turn on PS3. Observe the voltage on VM1 and VM2.

The voltage on VM1 should be approximately 5.77V

and on VM2 should be 3.3V.

12. Use VM3 to observe the voltage on JP5-2. The voltage

should be equal to the same level observed on VM2.

13. Turn off PS3

14. MOVE JP1 to JP3. Disconnect PS3 from the board and

set PS4 equal to 5.0V. Reconfigure the test equipment

as shown in Figure 5.

15. Turn on PS4. Observe the voltage on VM1 and VM2.

The voltage on VM1 should be approximately 0.34V

and on VM2 should be 3.3V.

16. Use VM3 to observe the voltage on JP7-2. The voltage

should be approximately equal to the level observed

on VM2.

17. Turn off PS4

18. MOVE JP3 to JP2. Disconnect PS4 from the board

and set PS5 equal to 0.32V. Reconfigure the test

equipment as shown in Figure 6.

19. Turn on PS5. Observe the voltage on VM1 and VM2.

The voltage on VM1 should be approximately 0.14V

and VM2 should be 3.3V.

20. Use VM3 to observe the voltage on JP6-2. The voltage

should be approximately 2.0V.

21. Use VM3 to observe the voltage on JP10-1. The volt-

age should be approximately 5.0V.

22. Turn off PS5.

23. Reset the Jumpers as shown on Figure 7a.

JP1. OPEN

JP2. OPEN

JP3. OPEN

JP4. INSTALLED

JP5. OPEN

JP6. OPEN

JP7. OPEN

JP8. INSTALLED

JP9. INSTALLED in “ON” Position

JP10. OPEN

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DEMO MANUAL DC2042A

QUICK START PROCEDURE

Figure 2. VMCU Power Switchover Test Setup (Test Steps 2 to 5)

Figure 3. Solar Circuitry Test Setup (Test Steps 6 to 9 ) Proper Measurement Equipment Setup for DC2042A Solar Circuit Testing

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DEMO MANUAL DC2042A

QUICK START PROCEDURE

Figure 4. Piezoelectric Circuitry Test Setup (Test Steps 10 to 13 )

Proper Measurement Equipment Setup for DC2042A Piezoelectric Circuit Testing

Figure 5. 4mA to 20mA Loop Circuitry Test Setup (Test Steps 14 to 17)

Proper Measurement Equipment Setup for DC2042A 4mA to 20mA Loop Circuit Testing

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DEMO MANUAL DC2042A

QUICK START PROCEDURE

Figure 6. TEG-Powered Circuitry Test Setup (Test Steps 18 to 22)

Proper Measurement Equipment Setup for DC2042A TEG Circuit Testing

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DEMO MANUAL DC2042A

QUICK START PROCEDURE

Figure 7a. DC2042A Top Assembly Drawing

Figure 7b. DC2042A Bottom Assembly Drawings

J3 HORIZONTAL

TRANSDUCER

HEADER

J4 VERTICAL

TRANSDUCER HEADER

J2 DUST

EH HEADER

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DEMO MANUAL DC2042A

APPLICATION INFORMATION

JUMPER FUNCTIONS

JP1: Powerselection jumperusedtoselect theLTC3588-1,

piezoelectric energy harvesting power supply.

JP2: Power selection jumper used to select the LTC3108,

TEG-powered energy harvester.

JP3: Power selection jumper used to select the LTC3105,

JP4: Power selection jumper used to select the LTC3459,

JP5: Routes the LTC3588-1 PGOOD signal to the Dust

HeaderPGOODoutput.TheLTC3588-1PGOOD comparator

produces a logic high referenced to VOUT on the PGOOD

pin the first time the converter reaches the sleep threshold

of the programmed VOUT, signaling that the output is in

regulation. The PGOOD pin will remain high until VOUT

falls to 92% of the desired regulation voltage. Addition-

ally, if PGOOD is high and VIN falls below the UVLO falling

threshold, PGOOD will remain high until VOUT falls to 92%

of the desired regulation point. This allows output energy

to be used even if the input is lost.

JP6: Routes the LTC3108 PGOOD signal to the Dust

Header PGOOD output.

JP7: Routes the LTC3105 PGOOD signal to the Dust

Header PGOOD output.

JP8: Routes the LTC3459 PGOOD signal to the Dust

Header PGOOD output.

JP9: Connects the fifteen optional energy storage capaci-

tors directly to VOUT (VSUPPLY of the Dust Header) to be

used by the load to store energy at the output voltage level.

The 100μF capacitors have a voltage coefficient of 0.61

of their labeled value at 3.3V and 0.47 at 5.25V. Caution:

Only JP9 or JP10 may be connected at any one time.

Do not populate both JP9 AND JP10.

JP10: Connects the fifteen optional energy storage ca-

pacitors directly to VSTORE of the LTC3108 TEG-powered

energy harvester circuit, which is the output for the Stor-

age capacitor or battery. A large capacitor may be con-

nected from VSTORE to GND for powering the system in

the event the input voltage is lost. It will be charged up

to the maximum VAUX clamp voltage, typically 5.25V.

The 100µF capacitors have a voltage coefficient of 0.47

at 5.25V. Caution: Only JP9 or JP10 may be connected

at any one time. Do not populate both JP9 and JP10.

Note: For this board to properly interface with a Dust

Mote (DC9003A-B) or aManager (DC9003A-A) board and

switch the power from the battery to the energy harvest-

ing source, resistor R3 on the Dust Mote board must be

changed to 750kΩ and R4 must be changed to 5.1MΩ.

TURRET FUNCTIONS

PZ1 (E1): Input connection for piezoelectric element or

other AC source (used in conjunction with PZ2). A high

impedance DC source may be applied between this pin

and BGND to power the LTC3588-1 circuit. Caution:The

maximum current into this pin is 50mA.

PZ2 (E2): Input connection for piezoelectric element or

other AC source (used in conjunction with PZ1). A high

impedance DC source may be applied between this pin

and BGND to power the LTC3588-1 circuit. Caution: The

maximum current into this pin is 50mA.

VIN, 20mV to 400mV (E3): Input to the LTC3108, TEG-

powered energy harvester. The input impedance of the

LTC3108 power circuit is approximately 3Ω, so the source

impedance of the TEG should be less than 10Ω to have

good power transfer. TEGs with approximately 3Ω will

have the best power transfer. The input voltage range is

20mV to 400mV.

BGND (E4, E6, E8, E11, E14): This is the board ground.

BGND is connected to all the circuits on the board except

the headers. BGND and HGND, the header ground, are

connected through Q3 when the VMCU voltage with

respect to BGND reaches the rising RESET threshold of

U2 and disconnected when VMCU falls to the falling reset

threshold. The board is configured from the factory to

connect BGND and HGND when VMCU equals 3.15V and

disconnect them when VMCU equals 2.25V.

+VIN, 4mA to 20mA Loop (E5): Input to the LTC3105

supplied by a diode voltage drop. The current into this

terminal must be limited to between 4mA and 20mA. The

current into this turret flows through diode D1 to gener-

ate the diode voltage drop and into the LTC3105 power

management circuit.

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DEMO MANUAL DC2042A

APPLICATION INFORMATION

VIN SOLAR (E7): Input to the LTC3459, solar-powered

circuit with maximum power point control provided by

the LTC2935-4. The input regulation point for the MPPC

function is 1.73V. The input range is 1.72V to 3.3V.

HGND (E9, E13): This is the header ground. HGND is the

switched ground to the headers that ensures the load is

presented with a quickly rising voltage. BGND and HGND

are connected through Q3 when the VMCU voltage with

respect to BGND reaches the rising RESET threshold of

U2 and disconnected when VMCU falls to the falling reset

threshold. The board is configured from the factory to

connect BGND and HGND when VMCU equals 3.15V and

disconnect them when VMCU equals 2.25V.

VMCU (E10, E12): Regulated output of all the active en-

ergy harvester power management circuits, referenced to

BGND. When VMCU is referenced to HGND it is a switched

output that is passed through the headers, J1 and J2, to

power the load.

J2 DUST HEADER SIGNALS

Pin 1 (VSUPPLY): Switched power from EH multisource

demo board. As configured from the factory via the

LTC2935-2 circuitry, this voltage is switched on at 3.15V

and off at 2.25V. On the board this node is labeled VMCU.

Pin 2 (NC): No connect on EH multisource demo board.

Pin 3 (GND): Switched GND when VSUPPLY is greater

than 3.15V, rising and 2.25V, falling. On the board this

signal is labeled HGND.

Pin 4 (PGOOD): PGOOD signal from EH multisource

demo board. When this signal is high, the SPDT switch

on the DUST demo board will switch from the battery to

the energy harvested source.

Pin 5 (KEY): Metal insert in header to ensure proper in-

sertion location and orientation. No electrical connection.

Pin 6 (VBAT): Raw battery voltage from (to) DUST board.

Pin 7 (RSVD): Reserved for future use, no connection on

EH multisource board.

Pin 8 (EHORBAT): Signal indicating if the battery or the

energy harvester is providing power to the system. Refer

to the individual device data sheet for the interpretation

of the polarity.

Pin 9 (I/O 2): Connected to general purpose I/O input on

DUST DC9003A-X.

Pin 10 (I/O 1): Connected to general purpose I/O input on

DUST DC9003A-X.

Pin 11 (+5V): 5V input provided by DC9006A board, not

anticipated to be used by or provided from EH board.

Pin 12 (V+): 12V input provided by DC9006A board, not

anticipated to be used by or provided from eh board.

J3 AND J4 TRANSDUCER HEADER SIGNALS

Pin 1 (VIN_LT C 3459): Solar panel input. The allowable

range for this input voltage is 1.72V to 3.3V.

Pins 2, 4, 6, 8, 10 (GND): Connected to board ground

“BGND” to power the power management circuits.

Pin 3 (VIN_LT C 3105): Connect in series with 4mA to 20mA

loop. The Loop current will flow into this pin and out a

board GND connection.

Pin 5 (VIN_LT C 3108): Thermal electric generator input,

input to step-up transformer. The allowable range for this

input voltage is 20mV to 400mV. The source impedance of

the TEG should be less than 10Ω for good power matching.

Pin 7 (VIN_LT C 3588-1): Rectified AC voltage, direct input

to LTC3588-1 DC/DC. The allowable range for this input

voltage is 5V to 18V. If the DC source is greater than 18V,

the maximum current allowed into this pin is 5mA.

Pin 9 (PZ1): Raw battery voltage from (to) the DC9003A-X

DUST board.

Pin 11 (PZ2): Reserved for future use, no connection on

EH multisource board.

Pin 12 (KEY): Metal insert in header to ensure proper

insertionlocation and orientation. No electrical connection.

dc2042af

DEMO MANUAL DC2042A

LTC3588-1: PIEZOELECTRIC ENERGY HARVESTING

POWER SUPPLY (VIBRATION OR HIGH IMPEDANCE

AC SOURCE)

The LTC3588-1 piezoelectric energy harvesting power

supplyis selected by installing the power selection jumper,

JP1. The PGOOD signal can be routed to the Dust Header

by installing jumper JP5. The Dust Eterna board will switch

from battery power to energy harvester power whenever

the PGOOD signal is high, provided that resistor R3 on

the Dust Mote board (DC9003A-B) is changed to 750kΩ

and R4 is changed to 5.1MΩ.

If the application requires a wide hyteresis window for

the PGOOD signal, the board has the provision to use the

independent PGOOD signal, shown in Figure 12, generated

by the LTC2935-2 and available on JP8. This signal is

labeled as the PGOOD signal for the LTC3459 circuit

(PGOOD_LTC3459), because the LTC3459 does not have

its own PGOOD output. The PGOOD_LTC3459 signal can

be used in place of any of the PGOOD signals generated

by the harvester circuits. The board is configured from

the factory to use the PGOOD_LT C 3459 signal as the

PGOOD signal to switch from battery power to energy

harvesting power.

The PGOOD_LT C 3459 signal is always used to switch

the output voltage on the header. Some loads do not like

to see a slowly rising input voltage. Switch Q3 ensures

that VSUPPLY and VMCU on the headers are off until the

energy harvested output voltage is high enough to power

the load. The LTC2935-2 is configured to turn on Q3 at

3.15V and turn off Q3 at 2.25V. With this circuit, the load

will see a fast voltage rise at start-up and be able to utilize

all the energy stored in the output capacitors between the

3.15V and 2.25V levels.

The optional components R1, R4, Q1 and C5 shown on

the schematic are not populated for a standard assembly.

The function of R1, R4, Q1 and C5 is to generate a short

PGOOD pulse that will indicate when the output capacitor

is charged to its maximum value. The short pulse occurs

every time the output capacitor charges up to the “output

sleep threshold,” which for a 3.3V output is 3.312V. By

populating these components the application can use

this short pulse as a sequence timer to step through the

program sequence or as an indication of when it can

perform energy-intensive functions, such as a sensor

read or a wireless transmission and/or receive, knowing

precisely how much charge is available in the output

capacitors. When this optional circuit is not used, the

amount of charge in the output capacitors is anywhere

between the maximum (COUT•VOUT_SLEEP) to eight per-

cent low. In the case where the energy harvesting source

can support the average load continuously, this optional

circuit is not needed.

Diode D2 is an optional component used to “Diode-OR”

multiple energy harvesting sources together. This diode

would be used in conjunction with one or more of the

other Oring diodes, D3, D4 or D5. When the Oring diodes

are installed the parallel jumper would not be populated.

The diode drop will be subtracted from the output volt-

age regulation point, so it is recommended to change

the feedback resistors or select a higher output voltage

setpoint to compensate for the diode drop. When more

than one of these diodes is installed and the associated

energy harvester inputs are powered, the board will switch

between energy harvester power circuits as needed to

maintain the output voltage.

APPLICATION INFORMATION

Figure 8. Detailed Schematic of LTC3588-1 Piezoelectric Energy Harvesting Power Supply

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