Quectel EG9 Series Guida

EG9x

Reference Design

LTE Module Series

Rev. EG9x_Reference_Design_Rev.A

Date: 2018-02-09

Status: Released

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LTE Module Series

EG9x Reference Design

EC20_R2.1_Reference_Design 1 / 4

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LTE Module Series

EG9x Reference Design

EC20_R2.1_Reference_Design 2 / 4

About the Document

History

Revision

Date

Author

Description

2018-02-09

Felix YIN

Initial

LTE Module Series

EG9x Reference Design

EC20_R2.1_Reference_Design 3 / 4

Contents

About the Document...................................................................................................................................2

Contents.......................................................................................................................................................3

1Reference Design.................................................................................................................................4

1.1. Introduction................................................................................................................................4

1.2. Schematics................................................................................................................................4

LTE Module Series

EG9x Reference Design

EG9x_Reference_Design 4 / 4

1Reference Design

1.1. Introduction

This document provides the reference design for Quectel EG9x modules, which contain EG91 and EG95

modules.

1.2. Schematics

The schematics illustrated in the following pages are provided for your reference only.

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101 DATE

1. Keep all RESERVED and unused pins unconnected.

Notes:

Reference Design

2. It is recommended to reserve the test points for upgrading the firmware over USB interface and minimizing stub length of USB test signals.

Module Interface

Close to module

3. EG9x module provides a digital clock output (CLK_OUT) for an external audio codec, please refer to EG91 and EG95 Hardware Designs for further details.

Notes2

Model

EG9x-E

Installed Not installed

4. SMD difference between EG9x-E and EG9x-NA is shown as below:

R0105, R0107

R0106

EG9x-NA

R0105, R0107

R0106

EG9x module

C0101

100nF

1RESERVED

2RESERVED

3GND

4PCM_CLK

5PCM_SYNC

6PCM_DIN

7PCM_DOUT

8USB_VBUS

9USB_DP

10 USB_DM

11 RESERVED

12 RESERVED

13 RESERVED

14 RESERVED

15 PWRKEY

16 RESERVED

17 RESET_N

18 RESERVED

19 AP_READY

20 STATUS

21 NETLIGHT

22 DBG_RXD

23 DBG_TXD

24 RESERVED

25 CLK_OUT

26 SPI_CLK

27 SPI_MOSI

28 SPI_MISO

29 VDD_EXT

30 DTR

31 GND

VBAT_BB

RXD

TXD

CTS

RTS

DCD

I2C_SCL

I2C_SDA

USIM1_PRESENCE

USIM1_VDD

USIM1_RST

USIM1_DATA

USIM1_CLK

USIM_GND

GND

ANT_DIV

GND

RESERVED

VBAT_RF

GND

RESERVED

GND

ANT_MAIN

GND

U0101-A

63 RESERVED

64 RESERVED

65 RESERVED

66 RESERVED

67 GND

68 GND

69 GND

70 GND

71 GND

72 GND

73 GND

74 GND

75 USB_BOOT

76 RESERVED

77 RESERVED

78 RESERVED

79 GND

80 GND

81 GND

82 GND 83

USIM2_PRESENCE

USIM2_CLK

USIM2_RST

USIM2_DATA

USIM2_VDD

RESERVED

GND

RESERVED

100

GND

101

GND

102

GND

103

GND

104

GND

106 GND

105 GND

U0101-B

R0101 0R

R0103 NM_0R

R0102 0R

R0104 NM_0R

R0105 NM_0R

R0106 0R

R0107 NM_0R

[2,10]USB_VBUS

[2,10] PWRKEY

[2] RESET_N

[1,3,10]

VBAT

[9]ANT_MAIN

[8]

USIM1_CLK

[8]

USIM1_DATA

[8]

USIM1_RST

[8]

USIM1_PRESENCE

[8]

USIM_GND

USIM1_VDD

VDD_EXT

[4]RI_MODULE

[4]DCD_MODULE

[4]

RTS_MODULE

[4]CTS_MODULE

[4]TXD_MODULE

[4]

RXD_MODULE

[4] DTR_MODULE

[10] STATUS

[10] NETLIGHT

[5,6] PCM_CLK

[5,6] PCM_SYNC

[5,6] PCM_IN

[5,6] PCM_OUT

[5,6]

I2C_SDA

[5,6]

I2C_SCL

[2] AP_READY

CLK_OUT

[1,3,10]

VBAT

[10] DBG_RXD

[10] DBG_TXD

[10] SPI_CLK

[10] SPI_MOSI

[10] SPI_MISO

[2] USB_DP

[2] USB_DM

[10] USB_DP_TEST

[10] USB_DM_TEST

[8]

USIM2_RST

[8]

USIM2_CLK

[8]

USIM2_PRESENCE

[8]

USIM2_DATA

USIM2_VDD

[10] USB_BOOT

[1,9]

ANT_DIV

[9]

ANT_GPS

[1,9]ANT_DIV

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Notes:

1. U0201 represents customer's MCU.

2. EG9x can only work as a USB device and supports FS/HS modes. To communicate with USB interface, MCU needs to support USB host or OTG function.

VBUS_CONTROL is active high.

It is used to reset the module.It is used to turn on or off the module.

MCU Interface

The VBUS pins of MCU and EG9x should be provided by 5V power system for USB detection, and VBUS_CONTROL is used to turn on and off VBUS power supply.

3. AP_READY is used to detect the MCU's sleep state. For more details about AP_READY, please refer to EG91 and EG95 Hardware Designs

AP_READY High Level Detection AP_READY Low Level Detection

4. Transistor circuits (Q0203～Q0206) are used for level translation.

The Necessary Control Circuit

Reference Design

5V power source from main board.

and AT Command manuals.

VDD 2

GND 3

TXD 4

RXD 5

DTR 6

RI 7

CTS 8

RTS 9

DCD

USB_DM 13

USB_ID 14

GPIO_01 15

GPIO_02 16

GPIO_03 17

GPIO_04

USB_VBUS 11

USB_DP

GPIO_05 19

GPIO_06 20

GPIO_07

U0201

Q0206

DTC043ZEBTL

R0203

47K

R0201

Q0205

DTC043ZEBTL

Q0204

DTC043ZEBTL

R0205

4.7K

R0204

4.7K

Q0203

2SC4617TLQ

Q0201 SI2333CDS-T1

Q0202

DTC043ZEBTL

R0202

10K

C0201

470nF

R0206

100K

C0202

1nF

VDD_MCU

[4]

RXD_MCU

[4]

TXD_MCU

[4]

DTR_MCU

[4]

RI_MCU

[1]

USB_DP

[1]

USB_DM

[1,2,10]

USB_VBUS

[2]

ON/OFF_MCU

[2]

RESET_MCU

[2]

VBUS_CONTROL

[2]

SLEEP_STATUS

VDD_EXT

[1,2]

AP_READY

[2] SLEEP_STATUS

[1]

RESET_N

[2] RESET_MCU

[1,10]

PWRKEY

[2] ON/OFF_MCU

VDD_EXT

[2] SLEEP_STATUS [1,2]

AP_READY

VDD_EXT

[4]

CTS_MCU

[4]

RTS_MCU

[4]

DCD_MCU

[3]

VBAT_EN

DC_5V [1,2,10]

USB_VBUS

[2] VBUS_CONTROL

[3]

CODEC_POWER_EN

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EG9x

e.g. 5V

LDO Application

It is used when the input voltage is below 7V.

VBAT = (R0302/R0303+1)*1.24 = 3.88V

Close to the module VBAT pins

Notes:

2. VBAT should be routed in star mode to VBAT_BB and VBAT_RF pins.

Power Supply Design

VBAT Design

Connect to VBAT_BB pins

Connect to VBAT_RF pins

Reference Design

1. The power supply must be able to provide sufficient current up to 2A or more.

3. The recommended operating voltage of VBAT is 3.3V～4.3V.

Notes:

DC-DC Application

It is used when the input voltage is above 7V. Use a DC-DC convertor to convert a high

e.g. DC12V IN DC-DC DC 5V OUT LDO DC 3.8V for module

input voltage to a 5V output, and then the LDOs will generate a 3.8V typical voltage for the

LDO DC 1.8V for codec

module and 1.8V & 3.3V typical voltages for codec.

LDO DC 3.3V for codec

1. The load current is recommended to be greater than 10mA.

2. The power supply must be able to provide sufficient current up to 2A or more.

VDD_1V8 = [(R0311+R0312)/R0312]*1.207 = 1.8V

VDD_3.3V = (R0305/R0306+1)*1.207 = 3.3V

Supply Power for PCM Codec

e.g. 5V

Notes:

Power-on Sequence: power on VDD_1V8 first, then VDD_3.3V.

Power-off Sequence: power off VDD_3.3V first, then VDD_1V8.

1. CODEC_POWER_EN must be at low level in order to ensure the normal output voltage of VDD_3.3V.

If VDD_3.3V power supply needs to be switched off, please keep CODEC_POWER_EN at high level.

2. The following power-on/off sequences should be complied with to ensure the audio codec works normally.

C0303

470uF

1EN

2IN

3GND

OUT

5ADJ

U0301

MIC29302WU

C0304

100nF

C0302

100nF

C0301

470uF

R0302

100K

R0303

47K

C0305

100uF

D0301

PZ3D4V2H

R0301

51K

C0306

100nF

C0307

33pF

C0308

10pF

C0310

100nF

C0311

33pF

C0312

10pF

C0309

100uF

R0304

330R

D0302

TVS

Q0301

DTC043ZEBTL

1IN

3EN

OUT 4

2GND

U0302

SGM2019-ADJYN5G/TR

C0320

4.7uF

R0310

39K_1%

R0311

75K_1%

C0318

100nF

C0321

100nF

C0322

33pF

C0319

1uF

C0315

4.7uF

R0305

73.2K

R0306

42.2K

C0316

100nF

C0313

1uF

C0314

100nF

1IN

3EN

OUT 4

2GND

U0303

SGM2019-ADJYN5G/TR

C0317

33pF

R0308

100K

R0309

100K

R0307

Q0302

DTC043ZE

[3] DC_IN

VBAT

[1,3,10]

VBAT

[1,3,10]

VBAT

[2] VBAT_EN

VDD_1V8

VDD_3.3V

[3] DC_IN

[1,2,4,8,10] VDD_EXT

[2] CODEC_POWER_EN

VDD_1V8

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EG9x

Notes:

UART Design

UART Translation - IC Solution

UART Translation - Transistor Solution (Recommended)

1. The power supply voltage of VCCA should not exceed that of VCCB. For more information about TXS0108E, please refer to the datasheet from TI.

2. If a high baud rate is needed, it is highly recommended to install a 1nF capacitor (C0403/C0404) on transistor circiut.

Reference Design

3. The transistor circuit of DTR is similar to that of RTS interface, and the transistor circuit of RI and DCD is similar to that of CTS interface.

C0401

100nF

R0402

120K

R0401

10K

C0402 100nF

Q0401

2SC4617TLQ Q0402 2SC4617TLQ

R0404

4.7K

R0403

4.7K

C0403

1nF

R0405

4.7K

R0406

4.7K

C0404

1nF

Q0403

2SC4617TLQ

R0408

4.7K

R0407

4.7K

Q0404 2SC4617TLQ

R0409

4.7K

R0410

4.7K

6A5

7A6

8A7

9A8

10 OE

5A4

4A3

VCCB

GND

3A2

2VCCA

1A1

U0401

TXS0108E

C0405

1nF

C0406

1nF

VDD_EXT

VDD_EXT VDD_MCU

[1,4] TXD_MODULE

[1,4] RXD_MODULE

[1] RI_MODULE

[1] DTR_MODULE

[2,4]

TXD_MCU

[2,4]

RXD_MCU

[2]

DTR_MCU

[2]

RI_MCU

[2,4] RXD_MCU [1,4]

RXD_MODULE

VDD_EXT

[2,4] TXD_MCU [1,4]

TXD_MODULE

VDD_EXTVDD_MCU

VDD_EXT

[1,4]

RTS_MODULE

[2,4] RTS_MCU

VDD_EXT VDD_MCU

[2,4] CTS_MCU [1,4]

CTS_MODULE

VDD_EXT

[2,4]

CTS_MCU

[2,4]

RTS_MCU

[1,4] CTS_MODULE

[1,4] RTS_MODULE

[1] DCD_MODULE [2]

DCD_MCU

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Reference Design

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Notes:

3. EG9x module will automatically initialize the codec via I2C interface after it is turned on successfully, so all power supplies for the codec need to be powered on before that.

Audio Codec Design (ALC5616)

1. ALC5616 power-on sequence: DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD -> MICVDD -> software initialization.

2. ALC5616 power-off sequence: close codec function by software -> MICVDD -> DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD.

2IN1P/DMC_DAT

3IN2P

4IN2N/JD2

DACREF 6

AVDD

7AGND

LOUTR/N

CPN2

CPP2

CPN1

CPP1

CPVDD

CPVPP

CPVREF

CPVEE

HPO_L

21 ADCDAT1

22 DACDAT1

23 LRCK1

SCL

SDA

28 GPIO1/IRQ1

DBVDD

DCVDD

MICVDD

32 MICBIAS1

VREF2

24 BCLK1

1JD1

LOUTL/P

HPO_R

25 MCLK

33 DGND

U0501

ALC5616

C0505

4.7uF

C0504

4.7uF

C0503

100nF

R0501 0R

C0501

4.7uF

C0502

100nF

C0509

2.2uF

C0510

100nF

C0506

4.7uF

C0507

100nF

C0508

2.2uF

C0515 2.2uF

C0516 2.2uF

C0511 4.7uF R0503

R0508 NM_10K

R0510

4.7K

R0509

4.7K

C0523 4.7uF

C0521 2.2uF

C0522 2.2uF

R0504 0R

R0505 0R

R0506 0R

R0507 0R

C0512

C0513

C0514

C0524 2.2uF

C0525 2.2uF

R0516

R0514

1.5K

R0513

R0515

1.5K

C0526

10uF

R0502 0R

C0517 1uF

C0518 1uF

C0519 1uF

C0520 1uF

R0511 0R

R0512 0R

R0522

R0523

C0549

NM_33pF

C0548

NM_33pF

R0524 0R

R0525 0R

VDD_3.3V

VDD_1V8

VDD_3.3V

[1,6]

I2C_SDA

[1,6]

I2C_SCL

VDD_1V8

[1,6] PCM_OUT

[1,6] PCM_IN

[1,6] PCM_CLK

[1,6] PCM_SYNC

[5] MIC+

[5] MIC-

[6,7]

SPK_P

[6,7]

SPK_N

MICBIAS

[6,7] MIC_P

[6,7] MIC_N

MICBIAS

[5]

MIC+

[5]

MIC-

VDD_1V8

[6,7]

SPK_R

[6,7]

SPK_L

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