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to a voltage by VR3 with T15 and is fed to the AF Board; VR3 sets the AM output amplitude.
The other output is applied to C22, which is backed off by the a.g.c. reference current
source (T17 to T19); VR6 sets the a.g.c. threshold. The potential on C22 is applied to the
a.g.c. control FET T2. If the level of the IF signal applied to the demodulator is not correct
the current into C22 will be greater or less than the back off current, and the signal level
into the IF amplifier will be controlled accordingly.
The signal at T13 collector is a clipped version of the IF and feeds the limiting amplifier T25
to T27, C25, T28, T29 form a monostable with emitter current controlled by T32. VR4
controls the clipping level, which thus sets the FM demodulator output amplitude.
The pulse outputs at the collectors of T28, T29, are of opposite phase. When T31 is on, the
output is fed via D19 and when T31 is off, the output is fed via D20.
Transistor T41 with associated diodes clips the IF signal to remove any AM and the clipped
signal is applied to C33 of the series tuned circuit C33, L6. T42 provides an anti-phase signal
which is applied to the other end of the tuned circuit (L6). Bistable ICI via T43 selects at TP3
either the in-phase or the anti-phase signal (at D27, D28) to be applied to the phase
detector, with the quadrature signal at TP4 from the centre of the tuned circuit (C33/L6).
The phase detector consists of two series current switches, T44 controlled by T56, and T57
controlled by T55. The output current feeds the 'current mirror' circuit T51 and T52. Preset
controls VR1 and VR2 set the gain and offset respectively. The current output is fed through
the composite amplifier T58, T60, T61, T62, to the integrator capacitor C45 and via L12, L8,
L7 to the varicap diodes D1, D2, D22, D23 causing the L.O. frequency to change.
The tuning voltage is monitored at the dual comparator T59, T54, T53. When the voltage is
outside the normal range, monostable T47, T46 is triggered which, in turn, clocks the ICI.
Also, the reset circuit T48 to T50 operates to reset the integrator at T58 base.
Transistors T20, T21 act as a dual comparator to detect if the a.g.c. voltage is within the
working voltage range. Diodes D14, D21 detect the presence of a 420kHz IF signal at the
tuned circuit C33/L6. This is combined with the a.g.c. detector output through D13, and is
converted to a logic signal by T22, T23 to switch the Lock line and Lock LED.
AF Circuit
The audio inputs are fed via analogue switch U1a which selects AM or FM into the active
filter U2a, U2b. This is a 3 pole 60kHz low pass filter with a gain of approximately 2.5.
Trimmer CV1 is adjusted to give the 60kHz filter a flat response (within 0.5dB) to 60kHz. The
output is fed into the analogue 8 input switch U4 and to the input of a 15kHz low pass filter
U2c. The output of this filter is fed to the switch U4 and the input of a 3.5kHz low pass filter
U2d and U3a. The output of the second stage (U3a) is fed to the analogue switch U4 and
both first and second stage outputs feed the psophometric filter U3b and U3c.
Potentiometer RV2 is used to adjust the gain of the psophometric filter to unity at 800Hz.
The output of this filter is also fed into the analogue switch U4. The 60kHz filter output is
also used to feed into de-emphasis filter R6, C9 to give 750µS de-emphasis. This along with
three test points at various points along these filters is fed into the analogue switch U4.
Control of the analogue switch U4 is from U18 which has inputs from the front panel
controls.
The analogue switch output U4 feeds an amplifier U3d which is selectable x1/x10. This feeds
an amplifier U5a which has a gain of x1. These two gains are used to give the 10 and 100
ranges; driven by U15a, U15b and U15c which has inputs from the front panel as before. The
output of this series of amplifiers is fed through a 25Hz active high pass filter U5b. The signal
