Texas Instruments BQ24150 Manuale utente

User's Guide

SLUU321C–June 2008–Revised June 2011

bq24150/150A/151/151A/152 YFF EVM (HPA256)

Contents

1 Introduction .................................................................................................................. 1

1.1 EVM Features ...................................................................................................... 1

1.2 General Description ................................................................................................ 2

1.3 I/O Description ...................................................................................................... 2

1.4 Control and Key Parameters Setting ............................................................................ 2

1.5 Recommended Operating Conditions ........................................................................... 2

2 Test Summary ............................................................................................................... 3

2.1 Definitions ........................................................................................................... 3

2.2 Equipment ........................................................................................................... 3

2.3 Equipment Setup ................................................................................................... 4

2.4 Procedure ........................................................................................................... 5

3 PCB Layout Guideline ...................................................................................................... 6

4 Bill of Materials, Board Layout and Schematics ........................................................................ 8

4.1 Bill of Materials ..................................................................................................... 8

4.2 Board Layout ...................................................................................................... 10

4.3 Schematic ......................................................................................................... 12

List of Figures

1 Connections of the HPA172 Kit........................................................................................... 4

2 Original Test Setup for HPA256 (bq2415x EVM)....................................................................... 5

3 The Main Window of the bq2415x Evaluation Software (For bq24150/150A/151/151A/152)..................... 5

4 Test setup for HPA256 .................................................................................................... 6

5 Top Layer................................................................................................................... 10

6 Bottom Layer............................................................................................................... 10

7 Top Assembly.............................................................................................................. 11

8 Top Silk ..................................................................................................................... 11

List of Tables

1 Factory Jumper Settings ................................................................................................... 4

1 Introduction

1.1 EVM Features

•Evaluation Module For BQ24150/150A/151/151A/152 in chipscale (YFF) package

•High Efficiency Fully Integrated NMOS-NMOS Synchronous Buck Charger With 3MHz Frequency

•Integrated Power FETs for Up To 1.25-A Charge Rate

•Programmable Battery Voltage, Charge Current, and Input Current via I2C Interface

•Input Operating Range 4 V–6 V

•Boost Mode Operation for USB OTG

•LED Indication for Status Signals

SLUU321C–June 2008–Revised June 2011 bq24150/150A/151/151A/152 YFF EVM (HPA256)

Introduction

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•

Test Points for Key Signals Available for Testing Purpose. Easy Probe Hook-up

•Jumpers Available. Easy to Change Connections.

1.2 General Description

The BQ24150/150A/151/151A/152 evaluation module is a complete charger module for evaluating

compact, flexible, high-efficiency, USB-friendly switch-mode charge management solution for single-cell

Li-ion and Li-polymer batteries used in a wide range of portable applications.

The BQ24150/150A/151/151A/152 integrates a synchronous PWM controller, power MOSFETs, input

current sensing, high-accuracy current and voltage regulation, and charge termination, into a small WCSP

package.

The charge parameters can be programmed through an I2C interface.

For details, see the appropriate data sheets (SLUS824,SLUS847,SLUSA27, and SLUS931).

1.3 I/O Description

Jack Description

J1–DC+ AC adapter or USB, positive output

J1–DC–AC adapter or USB, negative output

J2–BAT–Battery negative terminal, connect to DC-

J2-AUXPWR/CD Connect to AUXPWR pin or CD pin

J2-BAT+ Charger positive output, connect to CSOUT pin

J3–SCL I2C clock, connect to SCL pin

J3–SDA I2C data, connect to SDA pin

J3–DC–AC adapter or USB, negative output

J4–STAT Status output, can be connected to STAT pin by JMP1 set to EXT (2-3)

J4–OTG/SLRST Connect to OTG/SLRST pin

J4–DC–AC adapter or USB, negative output

1.4 Control and Key Parameters Setting

Jack Description Factory Setting

LED 1-2: Connect STAT pin to LED on EVM

JMP1 Jumper On LED (1-2)

EXT 2-3: Connect STAT pin to J4-1

HI 1-2: OTG or SLRST high (input or battery voltage)

JMP2 LO 2-3: OTG or SLRST low (ground) See Table 1

JMP3 J2-BAT+ connect to J2-AUXPWR/CD

JMP4 AUXPWR/CD pin connect to high or low or float

JMP5 OTG/SLRST pin 10k resistor to ground or float Jumper ON

1.5 Recommended Operating Conditions

Min Typ Max Unit Notes

Supply voltage, VIN Input voltage from ac adapter input 4 5 6 V

Battery voltage, VBAT Voltage applied at VBAT terminal of J8 0 3-4.2 4.44 V

Supply current, IAC Maximum input current from ac adapter input 0 0.1–0.5 1.5 A

Charge current, Ichrg Battery charge current 0.55 0.7 1.25 A

Operating junction temperature range, TJ0 125 °C

2bq24150/150A/151/151A/152 YFF EVM (HPA256) SLUU321C–June 2008–Revised June 2011

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Test Summary

2 Test Summary

2.1 Definitions

This procedure details how to configure the HPA256 evaluation board. On the test procedure the following

naming conventions are followed. Refer to the HPA256 schematic for details.

VXXX : External voltage supply name (VADP, VBT, VSBT)

LOADW: External load name (LOADR, LOADI)

V(TPyyy): Voltage at internal test point TPyyy. For example, V(TP12) means the voltage at

TP12.

V(Jxx): Voltage at jack terminal Jxx

V(TP(XXX)): Voltage at test point “XXX”. For example, V(ACDET) means the voltage at the test

point which is marked as “ACDET”.

V(XXX, YYY): Voltage across point XXX and YYY.

I(JXX(YYY)): Current going out from the YYY terminal of jack XX.

Jxx(BBB): Terminal or pin BBB of jack xx

Jxx ON : Internal jumper Jxx terminals are shorted

Jxx OFF: Internal jumper Jxx terminals are open

Jxx (-YY-) ON: Internal jumper Jxx adjacent terminals marked as “YY”are shorted

Measure: →A,B Check specified parameters A, B. If measured values are not within specified limits

the unit under test has failed.

Observe →A,B Observe if A, B occur. If they do not occur, the unit under test has failed.

Assembly drawings have location for jumpers, test points and individual components.

2.2 Equipment

2.2.1 POWER SUPPLIES

Power Supply #1 (PS#1): a power supply capable of supplying 5-V at 2-A is required.

2.2.2 LOAD #1

A 10V (or above), 2A (or above) electronic load that can operate at constant current mode.

2.2.3 LOAD #2

A HP 6060B 3-60V/0–60A, 300W system DC electronic load.

Or: equivalent

2.2.4 METERS

Four Fluke 75, (equivalent or better)

Or: Two equivalent voltage meters and two equivalent current meters. The current meters must be able to

measure 2A current.

2.2.5 COMPUTER

A computer with at least one USB port and a USB cable. The bq2415x evaluation software must be

properly installed.

2.2.6 HPA172 COMMUNICATION KIT

A HPA172 USB to I2C communication kit.

SLUU321C–June 2008–Revised June 2011 bq24150/150A/151/151A/152 YFF EVM (HPA256)

Computer

USB port

USB Interface

Adapter

I/O

USB

Texas Instruments

10-pin

Ribbon

Cable

To EVM

Test Summary

www.ti.com

2.2.7 SOFTWARE

Unzip BQ2415xSetup.zip and double click on the “SETUP.EXE”file. Follow the installation steps.

2.3 Equipment Setup

(A) Set the power supply #1 for 5V ±100mV DC, 2.0 ±0.1A current limit and then turn off supply.

(B) Connect the output of power supply #1 in series with a current meter (multimeter) to J1 (DC+, DC–).

(D) Connect the Load #2 in series with a current meter (multimeter) to J2 (BAT+, BAT–). Make sure a

voltage meter is connected across J2 (BAT+, BAT–). Turn on the Load #2. Use the constant voltage

mode. Set the output voltage to 2.5V.

(E) Turn off Load #2.

(F) Connect J5 to HPA172 kit by 10-pin ribbon cable. Connect the USB port of the HPA172 kit to the USB

port of the computer. The connections are shown in Figure 1.

Figure 1. Connections of the HPA172 Kit

(G) Installed jumpers per Table 1

Table 1. Factory Jumper Settings

Spin JMP1 JMP2 JMP3 JMP4 JMP5

HPA256-001 (-LED-) ON (-LO-) ON ON OFF ON

(bq24150)

HPA256-002 (-LED-) ON (-LO-) ON ON OFF ON

(bq24151)

HPA256-003 (-LED-) ON (-LO-) ON ON OFF ON

(bq24152)

HPA256-004 (-LED-) ON (-LO-) ON ON OFF ON

(bq24150A)

HPA256-005 (-LED-) ON (-LO-) ON ON OFF ON

(bq24151A)

4bq24150/150A/151/151A/152 YFF EVM (HPA256) SLUU321C–June 2008–Revised June 2011

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BQ2415x EVM

DC+

J 1

DC -

BAT+

SC L

BAT -

APPLICATION

CIRCUIT

J 4

D1 JMP1 JMP2

JMP3

AUXPWR

SDA

DC-

ST AT

OTG

S LRS T

JMP5

JMP4

Iin I

Power

supply #1

ILoad

Ichrg

USB

Cable HPA172 Ribbon

Cable

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Test Summary

(H) After the steps above, the test setup is shown in Figure 2

Figure 2. Original Test Setup for HPA256 (bq2415x EVM)

(I) Turn on the computer.

•Open the bq2415x evaluation software. The main window of the software is shown in Figure 3.

Figure 3. The Main Window of the bq2415x Evaluation Software (For bq24150/150A/151/151A/152)

2.4 Procedure

2.4.1 Charge Voltage and Current Regulation

1. Make sure the EQUIPMENT SETUP steps are followed. Turn on PS#1.

2. Software setup:

•Click Immediate Update Disabled button. It changes to Immediate Update Enabled. Check Auto

Reset Enable, set Rate to 5 seconds. Check Periodic Updates, set Rate to 1 second. Make sure

SLUU321C–June 2008–Revised June 2011 bq24150/150A/151/151A/152 YFF EVM (HPA256)

BQ2415x EVM

DC+

J 1

DC -

BAT+

SC L

BAT -

APPLICATION

CIRCUIT

J 4

D1 JMP1 JMP2

JMP3

AUXPWR

SDA

DC-

ST AT

OT G

SLRS T

JMP5

JMP4

Power

supply #1

Load

I in

USB

Cable HPA172 Ribbon

Cable

PCB Layout Guideline

www.ti.com

Operation Mode is Charger Mode. Uncheck Charge Current Termination. Check STAT Pin. Select

Battery Regulation Voltage to 4.20V.

Measure →V(J2(VBAT+, VBAT–)) = 4.2 ±100mV

Observe →D1 is on.

3. Enable Load #2.

Measure →V(J2(VBAT+, VBAT–)) = 2.5 ±100mV

Measure →Ichrg = 160mA ±40mA

Measure →Iin = 93mA ±5mA

4. Select Charge Current to 950mA, select Input Current Limit to 500mA.

Measure →Ichrg = 750mA ±100mA

Measure →Iin = 475mA ±25mA

5. Check Disable Charger. Turn off PS#1, turn off Load #2 and disconnect

2.4.2 Boost Function

1. Adjust PS#1 output to 3.7V and disable the output. Connect the PS#1 in series with a current meter

(multimeter) to J2 (BAT+, BAT–). Make sure a voltage meter is connected across J2 (BAT+, BAT–).

2. Set the Load #1 current to 200mA ±20mA but disable the output. Connect the output of the Load #1 in

series with a current meter (multimeter) to J1 (DC+, DC–). Make sure a voltage meter is connected

across J1 (DC+, DC–). The setup is now like Figure 4 for HPA256.

Figure 4. Test setup for HPA256

3. Turn on PS#1 output

4. Software setup: Change Operation Mode to Boost Mode.

Measure →V(J1(DC+, DC–))=5V ±0.2V

5. Enable Load #1.

Measure →V(J1(DC+, DC–))=5V ±0.2V

Measure →Iin = 330mA ±40mA

Measure →Io = 200mA ±20mA

3 PCB Layout Guideline

1. To obtain optimal performance, the power input capacitors, connected from input to PGND, should be

placed as close as possible to the IC.

2. The output inductor should be placed close to the IC and the output capacitor connected between the

inductor and PGND of the IC. The intent is to minimize the current path loop area from the SW pin

through the LC filter and back to the PGND pin. To prevent high frequency oscillation problems, proper

layout to minimize high frequency current path loop is critical.

3. The sense resistor should be adjacent to the junction of the inductor and output capacitor. Route the

sense leads connected across the RSNS back to the IC, close to each other (minimize loop area) or

6bq24150/150A/151/151A/152 YFF EVM (HPA256) SLUU321C–June 2008–Revised June 2011

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PCB Layout Guideline

on top of each other on adjacent layers (do not route the sense leads through a high-current path).

4. Place all decoupling capacitor close to their respective IC pin and as close as to PGND (do not place

components such that routing interrupts power stage currents). All small control signals should be

routed away from the high current paths.

5. The PCB should have a ground plane (return) connected directly to the return of all components

through vias (two vias per capacitor for power-stage capacitors, two vias for the IC PGND, one via per

capacitor for small-signal components). A star ground design approach is typically used to keep circuit

block currents isolated (high-power/low-power small-signal) which reduces noise-coupling and

ground-bounce issues. A single ground plane for this design gives good results. With this small layout

and a single ground plane, there is no ground-bounce issue, and having the components segregated

minimizes coupling between signals.

6. The high-current charge paths into VBUS, PMID and from the SW pins must be sized appropriately for

the maximum charge current in order to avoid voltage drops in these traces. The PGND pins should be

connected to the ground plane to return current through the internal low-side FET.

SLUU321C–June 2008–Revised June 2011 bq24150/150A/151/151A/152 YFF EVM (HPA256)

Bill of Materials, Board Layout and Schematics

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4 Bill of Materials, Board Layout and Schematics

4.1 Bill of Materials

'24150- '24151- bq24152 '24150A- '24151A- RefDes Value Description Size Part Number MFR

001 002 -003 004 005

1 1 1 1 1 C1 1uF Capacitor, Ceramic, X5R, 603 GRM188R61C105K muRata

16V, +-10%

1 1 1 1 1 C2 4.7uF Capacitor, Ceramic, X7R, 805 GRM21BR71C475K muRata

16V, +-10%

2 2 2 2 2 C3, C9 10uF Capacitor, Ceramic, X5R, 603 GRM188R60J106M muRata

6.3V, +-20%

2 2 2 2 2 C4, C5 1uF Capacitor, Ceramic, X5R, 402 GRM155R61A105K muRata

10V, +-10%

1 1 1 1 1 C6 10nF Capacitor, Ceramic, X5R, 402 GRM155R61C103K muRata

16V, +-10%

2 2 2 2 2 C7, C8 0.1uF Capacitor, Ceramic, X7R, 402 GRM155R71C104K muRata

16V, +-10%

1 1 1 1 1 D1 Green Diode, LED, Green, 2.1-V, 603 LTST-C190GKT Liteon

20-mA, 6-mcd

1 1 1 1 1 D2 BAT54C Diode, Dual Schottky, SOT23 BAT54C Vishay-Liteon

200-mA, 30-V

1 1 1 1 1 J1 ED1514/2DS Terminal Block, 2-pin, 6-A, 0.27 x 0.25 inch ED1514/2DS OST

3.5mm

3 3 3 3 3 J2, J3, J4 ED1515/3DS Terminal Block, 3-pin, 6-A, 0.41 x 0.25 inch ED1515/3DS OST

3.5mm

1 1 1 1 1 J5 2510-6002UB Connector, Male Straight 2x5 0.338 x 0.788 inch 2510-6002UB 3M

pin, 100mil spacing, 4 Wall

3 3 3 3 3 JMP1, PTC03SAAN Header, 3-pin, 100mil 0.100 inch x 3 PTC03SAAN Sullins

JMP2, JMP4 spacing, (36-pin strip)

2 2 2 2 2 JMP3, JMP5 PTC02SAAN Header, 2-pin, 100mil 0.100 inch x 2 PTC02SAAN Sullins

spacing, (36-pin strip)

4 4 4 4 4 929950-00 Shorting jumpers, 2-pin, 929950-00 3M/ESD

100mil spacing,

1 1 1 1 1 L1 1.0uH 2.5mmx2mm, 1.0uH, +/-30%, 0.11x0.09 inch "LQM2HPN1R0MJ0 or muRata or

1.5A MIPS2520D1R0 or FDK or

MDT2520-CN1R0M or TOKO or

CP1008"Inter-Technical

1 1 1 1 1 R1 0.068 Resistor, Chip, 68mohm, 402 ERJ-2BWJR068X Panasonic

125mW, 5%

1 1 1 1 1 R2 5.1k Resistor, Chip, 5.1k-Ohms, 603 Std Std

1/16-W, 5%

8bq24150/150A/151/151A/152 YFF EVM (HPA256) SLUU321C–June 2008–Revised June 2011

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Bill of Materials, Board Layout and Schematics

'24150- '24151- bq24152 '24150A- '24151A- RefDes Value Description Size Part Number MFR

001 002 -003 004 005

1 1 1 1 1 R3 10k Resistor, Chip, 10k-Ohms, 603 Std Std

1/16-W, 5%

1 1 1 1 1 R4 200 Resistor, Chip, 200-Ohms, 603 Std Std

1/16-W, 5%

1 1 1 1 1 R5 200 Resistor, Chip, 200-Ohms, 603 Std Std

1/16-W, 5%

1 0 0 0 0 U1 BQ24150YFF IC, Battery Charger for WCSP BQ24150YFF TI

Single-Cell Li-Ion and

Li-Polymer Battery

0 1 0 0 0 U1 BQ24151YFF IC, Battery Charger for WCSP BQ24151YFF TI

Single-Cell Li-Ion and

Li-Polymer Battery

0 0 1 0 0 U1 BQ24152YFF IC, Battery Charger for WCSP BQ24152YFF TI

Single-Cell Li-Ion and

Li-Polymer Battery

0 0 0 1 0 U1 BQ24150AYFF IC, Battery Charger for WCSP BQ24150AYFF TI

Single-Cell Li-Ion and

Li-Polymer Battery

0 0 0 0 1 U1 BQ24151AYFF IC, Battery Charger for WCSP BQ24151AYFF TI

Single-Cell Li-Ion and

Li-Polymer Battery

1 1 1 1 1 -- HPA256 PCB, 2.0 In x 2.0 In x 0.031 PCB Any

SLUU321C–June 2008–Revised June 2011 bq24150/150A/151/151A/152 YFF EVM (HPA256)

Bill of Materials, Board Layout and Schematics

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4.2 Board Layout

Figure 5. Top Layer

Figure 6. Bottom Layer

10 bq24150/150A/151/151A/152 YFF EVM (HPA256) SLUU321C–June 2008–Revised June 2011

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