Texas Instruments PCM182xEVM Manuale utente

User’s Guide

PCM182xEVM/PCM182xQ1EVM EVM User's Guide

ABSTRACT

This user's guide describes the function and use of the PCM1820EVM /PCM1821EVM/ PCM1822EVM /

PCM1820Q1EVM/PCM1821Q1EVM/PCM1822Q1EVM evaluation modules. This document includes the

hardware configuration instructions, a quick-start guide, jumper and connector descriptions, schematics, and

printed-circuit board (PCB) layout that demonstrate TI's recommended practices for these devices .

Figure 1-1. EVM BOARD

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PCM182xEVM/PCM182xQ1EVM EVM User's Guide 1

Table of Contents

1 Introduction.............................................................................................................................................................................3

2 Power Supply.......................................................................................................................................................................... 3

3 Hardware Configuration.........................................................................................................................................................4

4 PCM182xEVM /PCM182xQ1EVM Inputs................................................................................................................................6

4.1 Onboard Microphone Inputs...............................................................................................................................................6

4.2 Line Inputs..........................................................................................................................................................................7

5 Layer Plots.............................................................................................................................................................................. 8

6 Schematics............................................................................................................................................................................12

7 Bill of Materials..................................................................................................................................................................... 13

8 Revision History................................................................................................................................................................... 15

List of Figures

Figure 1-1. EVM BOARD.............................................................................................................................................................1

Figure 2-1. PCM182x /PCM182x-Q1 Power Supply....................................................................................................................3

Figure 4-1. PCM182x /PCM182x-Q1 Input Architecture..............................................................................................................6

Figure 4-2. PCM182x/PCM182x-Q1 Onboard Microphones....................................................................................................... 7

Figure 4-3. PCM182x/ PCM182x-Q1 Line Inputs........................................................................................................................ 7

Figure 5-1. Top Layer...................................................................................................................................................................8

Figure 5-2. Power Plane 1........................................................................................................................................................... 9

Figure 5-3. Power Plane 2......................................................................................................................................................... 10

Figure 5-4. Bottom Layer........................................................................................................................................................... 11

Figure 6-1. Schematic................................................................................................................................................................12

Trademarks

Burr-Brown™ is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

Table of Contents www.ti.com

2PCM182xEVM/PCM182xQ1EVM EVM User's Guide SBAU363A – FEBRUARY 2021 – REVISED MARCH 2022

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1 Introduction

The PCM182xEVM/ PCM182xQ1EVM is an evaluation module (EVM) designed to demonstrate the performance

and functionality of the PCM182x / PCM182x-Q1 device. The devices covered are PCM1820/PCM1821/

PCM1822/PCM1820-Q1/PCM1821-Q1/PCM1822-Q1.The PCM182x/ PCM182x-Q1 is a high-performance audio

analog-to-digital converter (ADC) that is configured through logic-level mode selection pins and does not require

a digital interface such as I2C or SPI to configure registers. As such, no software is necessary to interface with

the EVM. The EVM is powered with a single 5-V supply. Access to the converter output is provided on the audio

serial interface in I2S or TDM format.

2 Power Supply

The PCM182xEVM/PCM182xQ1EVM can be powered with a single 5-V power supply connected to J6. Onboard

low dropout regulators convert the 5-V supply to the 3.3-V and 1.8-V rails used by the ADC. The analog supply,

AVDD, is fixed at 3.3 V. The digital supply, IOVDD, can be set to either 1.8 V or 3.3 V with J5. It is also possible

to power the ADC directly by removing J9 and J5 and applying a voltage directly to the AVDD and IOVDD test

points. Note that if this is done, it is important to keep J10 populated (or ensure there is a path between the pins

if the supply current is being monitored) as this jumper connects the applied IOVDD to the mode selection pins

and other circuitry that relies on IOVDD.

External

Power

+5V

LDO

+3.3V

+1.8V

AVDD

IOVDD

J5 J10

Figure 2-1. PCM182x /PCM182x-Q1 Power Supply

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PCM182xEVM/PCM182xQ1EVM EVM User's Guide 3

3 Hardware Configuration

The format of the audio data and the operating mode of the ADC are controlled by the following pins: MD0,

MD1, MSZ, and FMT0. These signals are referenced to IOVDD and can be set to high (1) or low (0). If no

shunt is installed, then a 47-kΩ pulldown resistor will set the pin low so that the ADC remains in a defined state.

Table 3-1 shows the header numbers and their pin functions and Table 3-2 , Table 3-2 and , Table 3-2 show the

possible modes and output formats. The MSZ pin selects whether the device is a master or a slave on the audio

bus. When MSZ is pulled high, the device is in master mode and MD1 becomes an input for MCLK. A shunt

connecting J19 to the center pin of J18 will route the MCLK signal provided on J8 to the MD1 pin on the ADC to

allow for easy interfacing with audio measurement equipment.

Table 3-1. PCM182xEVM /PCM182xQ1EVM Headers and Jumpers

Designator Function

J1 Differential line/mic input 1

J2 Differential line/mic input 2

J4 MICBIAS Selection

J5 IOVDD-SYS voltage Selection (1.8V or 3.3V)

J6 +5V input

J7 AC-MB Connector

J8 Audio Serial Interface header

J9 Connect AVDD to onboard 3.3V regulator

J10 Connect IOVDD to onboard regulator

J11 Connect MICBIAS to onboard MIC2

J12 Connect MIC2 OUT+ to ADC IN2P

J13 MSZ select

J14 Connect MICBIAS to onboard MIC1

J15 Connect MIC1 OUT+ to ADC IN1P

J16 Connect MIC1 OUT- to ADC IN1M

J17 MD0 select

J18 MD1 select

J19 MCLK to MD1

J20 FMT0 select

J21 Connect MIC2 OUT- to ADC IN2M

J22 IN2M capacitor bypass

J23 IN1P capacitor bypass

J24 IN2P capacitor bypass

J25 IN1M capacitor bypass

Table 3-2. PCM182xEVM /PCM182xQ1EVM MD0 Modes

MD0 Modes

MD0 MSZ (0 = Slave, 1 = Master) MD0 Functional Mode

0 0 Linear phase filters are used for the decimation in slave

mode. For master mode, the device always use linear

phase filters for the decimation.

0 1 System clock with frequency 256 × fS connected to the

MD1 pin as MCLK

1 0 System clock with frequency 512 × fS connected to the

MD1 pin as MCLK

1 1 Low latency filters are used for the decimation in slave

mode. For master mode, the device always use linear

phase filters for the decimation.

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Table 3-3. PCM182xEVM /PCM182xQ1EVM MD1 Modes

MD1 Modes

MD1 MSZ (0 = Slave, 1 = Master) MD0 Functional Mode

0 0 DRE Disabled

1 0 The DRE is enabled with DRE_LVL = –36 dB and

DRE_MAXGAIN = 24 dB

MCLK 1 MCLK input in master mode

Table 3-4. PCM182xEVM /PCM182xQ1EVM Audio Output Format

Audio Output Data Format

FMT0 Audio Serial Interface Format

0 2-channel output with inter IC sound (I2S) mode

1 2-channel output with time division multiplexing (TDM) mode

All hardware pins are tied low by default, placing the device in slave mode with a linear phase filter, DRE

disabled, and 2-channel I2S audio output. Note that DRE is not supported for PCM1821/PCM1821-Q1 and only

applies to PCM1820/PCM1822/PCM1820-Q1/PCM1822-Q1. For more information on the operating modes of

the PCM182x device, see the PCM182x Stereo Channel, 32-Bit, 192-kHz, Burr-Brown™ Audio ADC data sheet.

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PCM182xEVM/PCM182xQ1EVM EVM User's Guide 5

4 PCM182xEVM /PCM182xQ1EVM Inputs

The PCM1820/PCM1820-Q1 device is intended to be driven with differential line or microphone inputs. Each

of the inputs has a 1-µF AC coupling film capacitor. Coupled with the 2.5-kΩ input impedance of PCM1820/

PCM1820-Q1 , this sets the high pass filter cutoff frequency at approximately 63-Hz. PCM1821/PCM1821-Q1

has an input impedance of 10-kΩ, setting the cutoff frequency at 16-Hz. This can be adjusted by replacing the

input AC coupling capacitors on the EVM if necessary. Figure 4-1 shows the architecture of the inputs to the

evaluation module. The EVM supports a differential full scale input range of 2 VRMS with an AVDD of 3.3 V.

Please Note: PCM1822EVM/PCM1822Q1EVM is set up to support single ended inputs.

PCM182x

MIC2

IN2M

IN2P

IN2MIN2P

J21

J12

MICBIAS

J11

MIC1

IN1P IN1M

J16

J15

MICBIAS

J14

J23 J25 J24 J22

Figure 4-1. PCM182x /PCM182x-Q1 Input Architecture

4.1 Onboard Microphone Inputs

PCM182x EVM/PCM182xQ1 EVM has two onboard differential microphones that can be routed to the inputs

with jumpers. The microphones require a bias be applied to MPWR. MPWR can be tied to AVDD on J4, or

to MICBIAS if using a device that supports this feature. Note that the PCM182x/PCM182x-Q1 do not have

an integrated MICBIAS and this option is provided for future devices that might incorporate this feature. The

following jumpers need to be installed to use the onboard mics: J4, J11,J12, J14, J15, J16, and J21.

If the onboard mics are used, leave the J1 and J2 headers unconnected to preserve the microphone

performance.

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Figure 4-2. PCM182x/PCM182x-Q1 Onboard Microphones

4.2 Line Inputs

For the line input configuration, shown in Figure 4-3, the PCM1820/PCM1820-Q1 /PCM1821/PCM1821-Q1

captures the audio signal provided through terminals J1 (IN1) and J2 (IN2). The input accepted in this mode

is a differential, 2 VRMS, full-scale audio signal. Single-ended inputs are not supported by the PCM1820/

PCM1820-Q1 device and it is recommended to keep the inputs AC coupled.

Please Note: PCM1822EVM/PCM1822Q1EVM is set up to support single ended inputs.Resistance R3 and R5

are mounted as 0 ohms.

PCM1822/PCM1822-Q1 accepts , 1 VRMS, single ended/differential full-scale audio signal

Figure 4-3. PCM182x/ PCM182x-Q1 Line Inputs

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PCM182xEVM/PCM182xQ1EVM EVM User's Guide 7

5 Layer Plots

Figure 5-1. Top Layer

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Figure 5-2. Power Plane 1

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PCM182xEVM/PCM182xQ1EVM EVM User's Guide 9

Figure 5-3. Power Plane 2

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