Texas Instruments PGA281EVM Manuale utente

User's Guide

dit.SBOU130–May 2013

PGA281EVM

This user's guide describes the characteristics, operation, and use of the evaluation module (EVM) for the

PGA281. This document also includes the schematic, printed circuit board (PCB) layout, and a bill of

materials (BOM). Throughout this document the terms evaluation board,evaluation module, and EVM are

synonymous with the PGA281EVM.

Contents

1 Introduction .................................................................................................................. 2

2 PGA281EVM Hardware .................................................................................................... 3

3 Bill of Materials ............................................................................................................. 12

4 Related Documentation from Texas Instruments ..................................................................... 13

List of Figures

1 PGA281EVM ................................................................................................................ 2

2 PGA281EVM Schematic................................................................................................... 3

3 PGA281EVM Default Jumper Settings................................................................................... 4

4 Top Layer (Signal and Ground)........................................................................................... 8

5 Layer 2 (Power) ............................................................................................................. 9

6 Layer 3 (Power)............................................................................................................ 10

7 Bottom Layer (Power and Ground) ..................................................................................... 11

dit.SBOU130–May 2013 PGA281EVM

Introduction

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1 Introduction

1.1 PGA281

The PGA281 is a high-precision instrumentation amplifier with pin-programmable gain, attenuation, and

error detection. The PGA281 offers low offset voltage, near zero drift, and very low 1/f noise for high-

resolution, precision measurement. The high supply voltage and excellent common-mode rejection comply

with the requirements for universal industrial signal front-ends.

1.2 PGA281EVM

The PGA281EVM provides basic functional evaluation of the PGA281, along with the following features:

• Onboard power management circuitry generates all required power-supply rails from one split-supply

input

• DIP switch allows easy setting of pin-programmable gain

• Error flag LED provides visual feedback of any detected error condition

• Easy access to pertinent nodes with test points, BNC connectors, and banana jacks

• Component footprints allow multiple filtering configurations

A picture of the PGA281EVM is shown in Figure 1.

Figure 1. PGA281EVM

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GND

VSN

VSP

VSON

VSOP_EXT

1.3k

R12

1.3k

R16

100p

10p

GND

TP2

TP5

VDD

VSN

VSP

VSON

VSOP

VOCM

TP10 TP11 TP13TP12

GNDGNDGND

TP6 TP7 TP9

R11

R15

DNP

GND

TP1

TP4

GND

TP15

VDD

VSOP

VSOP_EXT

VSOP_INT

VSP

GND

10k

R21

GND

C14

10u

VSOP_INT

C12

10n

GND

33.2k

R20

GND

/EF

221

R17

TP3

Test Points

VSOP Source Jumper VDD Source Jumper

EF Status LED

LDOExternal Power Connections

Input Connections Output ConnectionsPGA281

VSOP

VOCM

100k

GND

VOCM Divider

GND

C10

10n

VSN

GND

10n

GND

VSP

10n

VSOP

GND

C11

10n

VOCM

GND

C13

10u

C15

10u

C16

10u

/EF

C17

10u

VDD_EXT

GND

VDD_EXT

10n

INN1

INP1

VOP 9

VON 8

VSOP 11

VSP 13

VDD 1

VSN

VSON

VOCM

EF 2

PGA281

VDD

R18

R23

R19

R22

External VSOP

JMP1

JMP2

LDO VSOP

VDD = VSOP

External VDD

Gain Select

100k

R10

100k

R14

VDD

R13

GND

OPEN - G = 0

CLOSED - G = 1

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011*

1100*

1101*

1110*

1111*

0.125 0.172

0.25

0.5

128

0.125

0.344

0.688

1.375

2.75

5.5

176

0.172

G3:G0 G4=0 G4=1

* Reserved

Gain Table

LTST-C190CKT

LED1

0.125 0.172

J10

TP14

OUT

GND

4EN 5

NC 6

NC 7

IN 8

TPS7A4101

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PGA281EVM Hardware

2 PGA281EVM Hardware

This section discusses the PGA281EVM hardware schematics and PCB layout.

2.1 Schematic

The schematic of the PGA281EVM is shown in Figure 2.

Figure 2. PGA281EVM Schematic

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2.2 Jumper Settings

The PGA281EVM jumper settings are given in Table 1. The default settings are shown in Figure 3.

Figure 3. PGA281EVM Default Jumper Settings

Table 1. PGA281EVM Jumper Settings

Jumper Position Function

VSOP provided by onboard low dropout (LDO)

INT (default) regulator

JMP1 EXT VSOP provided externally at J6

VSOP (default) VDD connected to VSOP

JMP2 EXT VDD provided externally at J8

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PGA281EVM Hardware

2.3 Power Supply Connections

Power is applied through banana connectors J5, J6, J7, J8, J9, and J10. The PGA281 requires three

supply voltages: the high-voltage analog input stage supply, the low-voltage analog output stage supply,

and the digital supply.

2.3.1 Analog Input Stage Power (VSP, VSN)

Power for the analog input stage is applied at J5 (VSP), J10 (GND), and J9 (VSN). The specified range for

these supplies is given in Table 2.

Table 2. Analog Input Stage Power

Name Minimum Maximum Description

VSP +5 V +18 V Positive supply for analog input stage

Ground reference voltage for analog

GND 0 V 0 V input stage

Negative supply voltage for analog input

VSN –5 V –18 V stage

2.3.2 Analog Output Stage Power (VSOP, VSON)

Power for the analog output stage is applied at J6 (VSOP) and J7 (VSON). The specified range for these

supplies is given in Table 3. On the PGA281EVM, VSON is always connected to GND.

Table 3. Analog Output Stage Power

NAME MINIMUM Maximum Description

VSOP +2.7 V +5.5 V Positive supply for analog output stage

Negative voltage/ground reference for

VSON 0 V 0 V analog output stage

2.3.3 Digital Logic Power (VDD)

Power for the digital core is applied at J8 (VDD). The specified range for VDD is the same as VSOP (+2.7

V to +5.5 V). VSON is used as the digital core ground reference.

2.3.4 Onboard LDO Regulator

The PGA281EVM contains an onboard LDO regulator (U2) that is used to generate VSOP and VDD from

VSP. This configuration greatly simplifies the power connections to the PGA281EVM, because then only

VSP, VSN, and GND must be provided. The LDO regulator output voltage can be adjusted by replacing

resistor R20. When using the LDO regulator in this manner, set jumpers JMP1 and JMP2 to INT and

VSOP, respectively.

Table 4. LDO Adjustable Output Voltages

R20 Resistance Output Voltage

33.2 kΩ5 V

18.2 kΩ3.3 V

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2.4 Input/Output Connections

The PGA281 is a differential input, differential output amplifier. The input signal is applied at BNC

connectors J1 (IN+) and J3 (IN–), while the output signal is measured at BNC connectors J2 (OUT+) and

J4 (OUT–).

2.5 VOCM

VOCM controls the output stage common-mode voltage. On the PGA281EVM, a resistive voltage divider

created by R3 and R4 sets VOCM equal to (VSOP/2).

2.6 Gain Select

Switch S1 controls the PGA281 gain. Each switch channel sets the logic level at the corresponding gain

set pin. When the switch channel is on (up position), GN= 1. When the switch channel is off (down

position), GN= 0. See Table 5 for all possible gain settings.

Table 5. PGA281 Gain Settings

G3:G0 G4 = 0 G4 = 1

0000 0.125 0.172

0001 0.25 0.344

0010 0.5 0.688

0011 1 1.375

0100 2 2.75

0101 4 5.5

0110 8 11

0111 16 22

1000 32 44

1001 64 88

1010 128 176

1011* 0.125 0.172

1100* 0.125 0.172

1101* 0.125 0.172

1110* 0.125 0.172

1111* 0.125 0.172

2.7 Error Flag

The PGA281 contains circuitry that monitors the integrity of the analog signal at several of the internal

nodes. When signal conditions are outside the linear range, the error flag pin goes active (sets to VDD). In

an error condition, LED1 on the PGA281EVM turns on.

Error conditions include:

• Input common-mode range exceeded

• Input clamp active

• Input stage at supply rail

• Input-stage current limit exceeded

• Output stage at supply rail

• Output-stage current limit exceeded

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PGA281EVM Hardware

2.8 PGA281EVM PCB Layout

Figure 4,Figure 5,Figure 6, and Figure 7 depict the four layers of the PGA281EVM PCB layout.

NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid out;

they are not intended to be used for manufacturing PGA281EVM PCBs.

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Figure 4. Top Layer (Signal and Ground)

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Figure 5. Layer 2 (Power)

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Figure 6. Layer 3 (Power)

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