Texas Instruments TSW4100EVM Manuale utente

User's GuideSLWU052A – December 2007 – Revised September 2008
TSW4100EVM
Contents1 Introduction ................................................................................................................... 32 TSW4100 Interfaces ......................................................................................................... 52.1 USB Port J26 ........................................................................................................ 52.2 USB Connector J25 ................................................................................................ 53 Hardware Configuration ..................................................................................................... 53.1 Power Requirements ............................................................................................... 53.2 Jumper Settings ..................................................................................................... 53.3 Apply Power to Board .............................................................................................. 64 Software Installation ......................................................................................................... 64.1 Installing the TSW4100 Interface to GC5016 CDC and DAC Software ..................................... 74.2 Installing the USB Driver Software ............................................................................... 74.3 Installing the MATLAB Runtime Engine ......................................................................... 84.4 Installing the TSW4100GUI Software........................................................................... 115 Running the TSW4100 CDC and DAC Interface ....................................................................... 145.1 Starting the TSW4100 Interface ................................................................................. 145.2 Loading the CDCM7005 with Default Values .................................................................. 155.3 Loading the DAC5688 ........................................................................................... 166 TSW4100 Graphical User Interface (GUI) Software ................................................................... 206.1 Starting the TSW4100GUI ....................................................................................... 206.2 Graphical User Interface Controls ............................................................................... 226.3 Filter Response Windows ........................................................................................ 267 Designing and Testing a Filter (Step-by-Step) ......................................................................... 277.1 Step 1—Start TSW4100GUI ..................................................................................... 277.2 Step 2—Channel Selection ...................................................................................... 287.3 Step 3—Selecting Filter Design Parameters .................................................................. 287.4 Step 4—Saving Filter Design Information ...................................................................... 297.5 Step 5—Running the Filter Design .............................................................................. 297.6 Step 6—Briefly Examining the Filter Response Windows ................................................... 297.7 Step 7—Examine the Filter Response Passband ............................................................. 317.8 Step 8—Evaluate Effect of Taps on Filter Latency ........................................................... 327.9 Step 9—Redesign by Decreasing the CIC Decimation ...................................................... 337.10 Step 10—Redesign by Changing the Filter Parameters ..................................................... 358 Programming the TSW4100 .............................................................................................. 378.1 Connecting an input source and output analyzer ............................................................. 378.2 Program clock PLL and DAC .................................................................................... 388.3 Programming the DUC and DDCs .............................................................................. 398.4 Setting the Sync Delay for a Channel .......................................................................... 408.5 Calibrating the Sync Delay Using an Oscilloscope ........................................................... 428.6 Calibrating the Sync Delay Using an Spectrum Analyzer .................................................... 498.7 Requirement for Nyquist Filtering for the ADC ................................................................ 518.8 Adding Other Channels ........................................................................................... 528.9 Using Other Nyquist Zones ...................................................................................... 53Appendix A Firmware Downloading (if updates are needed) ............................................................. 55Appendix B Bill of Materials .................................................................................................... 58EP2C8 Cyclone II, EPCS4, ByteBlaster II, Quartus II are trademarks of Altera Corporation.
SLWU052A – December 2007 – Revised September 2008 TSW4100EVM 1Submit Documentation Feedback

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List of Figures
1 TSW4100 Block Diagram ................................................................................................... 42 Choose Setup Language ................................................................................................... 83 MATLAB Welcome Screen ................................................................................................. 84 Customer Information ....................................................................................................... 95 Destination Folder ........................................................................................................... 96 Ready to Install the Program ............................................................................................. 107 InstallShield Wizard Completed .......................................................................................... 108 TSW4100 Installation Welcome .......................................................................................... 119 TSW4100 License Agreement ............................................................................................ 1110 Customer Information ...................................................................................................... 1211 Setup Type .................................................................................................................. 1212 Ready to Install the Program ............................................................................................. 1313 InstallShield Wizard Completed .......................................................................................... 1314 TSW4100 CDC/DAC Graphical User Interface......................................................................... 1415 CDCM7005 Interface ...................................................................................................... 1516 DAC5688 Interface ......................................................................................................... 1717 DAC5688 Options .......................................................................................................... 1818 DAC5688 Filters ............................................................................................................ 1819 Clock Settings .............................................................................................................. 1920 DAC Gain .................................................................................................................... 1921 SIF Control .................................................................................................................. 2022 TSW4100GUI DOS Test Window ........................................................................................ 2123 TSW4100GUI Interface .................................................................................................... 2124 General Settings Controls ................................................................................................. 2225 Status area .................................................................................................................. 2226 Left Column Interface Controls ........................................................................................... 2327 Channel Selection Controls ............................................................................................... 2328 Channel Configuration Controls .......................................................................................... 2429 Filter Load and Design Settings .......................................................................................... 2530 (Figure 2*N–1 Window) Frequency Response Before CIC Compensation and Quantitization .................. 2631 (Figure 2*N window) Frequency Response with Convolved End to End Response .............................. 2732 Channel Selection Controls ............................................................................................... 2833 CIC Decimation Rate ...................................................................................................... 2834 Filter Design Parameters .................................................................................................. 2835 Save Filter Design and Responses ...................................................................................... 2936 DDC (TX) and DUC (RX) PFIR Responses - Before CIC Correction Convolution ............................... 3037 Composite Frequency Response ........................................................................................ 3038 Passband for the Composite Frequency Response ................................................................... 3139 Define the Passband Area to Magnify ................................................................................... 3140 Magnified Filter Passband ................................................................................................ 3241 PFIR Tap and Filter Latency ............................................................................................. 3342 Redesigned Filter Settings ................................................................................................ 3343 Redesigned Filter Response (without CIC Compensation) ........................................................... 3444 Redesigned Filter Passband .............................................................................................. 3445 Redesigned Filter Stopband .............................................................................................. 3546 Passband of Successful Filter Design ................................................................................... 3547 Complete Response of Successful Filter Design ...................................................................... 3648 Filter Latency................................................................................................................ 3649 Filter with Reduced Stopband ........................................................................................... 3750 DAC Stand Alone Test Spectrum ........................................................................................ 3851 TSW4100 Interface with Filter Design Settings ........................................................................ 3952 Filter Design Output Spectrum ........................................................................................... 4053 Proper DDC Output and DUC Input Timing Alignment ................................................................ 4054 DUC Input Time ............................................................................................................ 4155 Test Points .................................................................................................................. 42
2TSW4100EVM SLWU052A – December 2007 – Revised September 2008Submit Documentation Feedback

1 Introduction

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Introduction

56 Starting Interface Timing for Channel 1 ................................................................................. 4357 Channel 1 Interface Timing After a Sync Delay of 96 ................................................................. 4458 Channel 1 Interface Timing With a Sync Delay of 96 and Negative SCK Polarity ................................ 4559 Starting Interface Timing for Channel 3 ................................................................................. 4660 Channel 3 Interface Timing With a Sync Delay of 129 ................................................................ 4761 Incorrect Interface Timing for a Decimation of 6 and SCK Divider Ratio of 2 ...................................... 4862 Correct Interface Timing for a Decimation of 6 and SCK Divider Ratio of 2 ....................................... 4863 4 Phases Where Only I or Q Are Transferred .......................................................................... 5064 2 Phases Where Only I or Q Are Transferred .......................................................................... 5065 With and Without an ADC Filter to Remove Output Frequency Harmonics ........................................ 5166 Multiple Channel Configuration ........................................................................................... 5267 Multiple Channel Example on Spectrum Analyzer ..................................................................... 5368 TSW4100GUI Settings to Generate Third Nyquist Zone .............................................................. 5469 Third Nyquist Zone Example Output Spectrum ........................................................................ 54A-1 Quartus II Programming Interface ........................................................................................ 55A-2 Hardware Setup Window .................................................................................................. 56A-3 EP2C8 Device Detected ................................................................................................... 57

List of Tables

1 Two Pin Jumper List ........................................................................................................ 52 Three Pin Jumper List ....................................................................................................... 53 Jumper J15 List .............................................................................................................. 64 Channel Selection Options ............................................................................................... 245 Nyquist Zone Frequencies and DAC Settings .......................................................................... 246................................................................................................................................ 49A-1 JTAG Connector J14 Pinout .............................................................................................. 57B-1 TSW4100 Bill of Materials ................................................................................................. 58

The TSW4100 contains a signal chain consisting of an ADC, DDC, DUC, and DAC to create a repeaterapplication. The design has a clock distribution solution, and an interface for programming and readingprogrammable devices on the TSW4100 with a PC. In addition to the interfaces, the TSW4100 providestest connectors, which can be used to monitor the RX outputs or provide inputs to the TX portion of thechain.

The TSW4100 requires only a single 5-6 V DC power source at 3 A to operate.

The block diagram of the TSW4100 is shown in Figure 1 .

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14bit ADC

GC5016

DDC

Analog

Input

CDCM

7005

FPGA

Ext_Sync

SIA

SIB SOB

DUC SIA

Filter

VCXO- 160

Mux

10Mhz

Ext

Mhz

Xfor

mer

EXT

CLK

CFS,CCK

COUT[15..0]

DOUT [15..0]

XFM

SPLIT IQ PARALLEL

(2) INTER IQ

(2) SPLITIQ-(4) DDC

TDM- DDC

FPGA

LOGIC ANALYZER TEST CONNECTOR

DB25& USB

PARALLEL& USB PORTs

CONTROL

BUS

GC5016

DUC

AFS,ACK

AIN [15..0]

BIN [15..0]

DAC5688

AOUT[15..0]

BOUT[15..0]

IFLG QFLG

ADC_SPI

CDC_SPI

GC5016DUC_CLK

DAC CLK1

DAC CLK2

CONTROL

BUS

SIA

GC5016DUC_CLK

DUC SIA SOB

SIB

FLASH

eprom

DAC_SPI

Xfor

mer

Xfor

mer

REAL IF

Or I

REAL IF2

Or Q

DAC_SYNC

CPLD_CLK

Xfor

mer

Xfor

mer

JTAG

CONNECTOR

CLK

A & B OUT[15..0] C & D IN [15..0]

Introduction

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Figure 1. TSW4100 Block Diagram

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2 TSW4100 Interfaces

2.1 USB Port J26

2.2 USB Connector J25

3 Hardware Configuration

3.1 Power Requirements

3.2 Jumper Settings

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TSW4100 Interfaces

USB port connector J26 provides a PC interface to allow writes and reads between a PC/Laptop and theFPGA and the two GC5016 (SLWS142 ) devices. This interface helps program the two GC5016 deviceswith existing software provided by TI. The parallel port connector provides the same functionality whenconfigured. The default TSW4100 configuration has the USB port enabled and leaves the parallel portdisabled.

USB connector J25 provides a PC interface to allow writes and reads between a PC/Laptop and theDAC5688 and the CDCM7005 (SCAS793 ) devices. There is an option to allow this interface to write to theADS5545 (SLWS180 ) device when configured for serial interface, but the board has this part configuredfor parallel interface mode. With this configuration, the part operation is determined by jumpers.

By using the provided software and on-board jumpers, the TSW4100 can be set up in a variety ofconfigurations to accommodate a specific operation mode. Before starting evaluation, the user shoulddecide on the configuration and make the appropriate connections and load the appropriate parametersfor the GC5016's, DAC5688, ADS5545, and CDCM7005 devices.

The TSW4100 requires 5V-6V DC at approximately 3.0 Amps. The board contains several on-boardregulators that generate the necessary voltages from the 5V-6V DC source The board provides bananajacks J4 (red) and J5 (black) for use with a separate power supply. When using this mode, connect5V-6V DC to J4 and the return to J5.

The board jumper description and default settings are shown in Tables 1, 2, and 3. Details of the softwareoperation modes can be found in the software section of this document. Table 1 ,Table 2 , and Table 3explain the functionality of the board jumpers.

Table 1. Two Pin Jumper List

Jumper Function Installed Removed Default

J7 DUC clock input test point N/A N/A N/AJ10 DDC clock input test point N/A N/A N/AJ18 Sets Parallel port J2 interface device drive mode Open drain Totem pole RemovedJ19 Used to disable VCXO U19 when providing external oscillator at Enables U19 Disables U19 InstalledJ20

Table 2. Three Pin Jumper List

Jumper Function Location: Pins 1-2 Location: Pins 2-3 Default

JP7 CDCM7005 reference select Reference clock provided by J21 Reference clock provided by Y1 2-3or Y2JP5 CDCM7005 complimentary clock input select Clock provided from Input connected to VBB of 1-2VCXO U19 CDCM7005JP6 CDCM7005 clock input select Clock provided from VCXO U19 Input clock provided from J20 1-2JP1 ADS5545 output enable Output enabled Output disabled 1-2SJP3 ADS5545 output clock direction Sends output clock to DDC Sends output clock to FPGA 1-2

SLWU052A – December 2007 – Revised September 2008 TSW4100EVM 5Submit Documentation Feedback

3.3 Apply Power to Board

4 Software Installation

Software Installation

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Table 2. Three Pin Jumper List (continued)

Jumper Function Location: Pins 1-2 Location: Pins 2-3 Default

SJP11 ADC input clock select Provides clock from CDCM7005 Provides clock from SMA removedto T5 connector J13JP4 ADC clock buffer enable Disables ADC clock buffer U14 Enables ADC clock buffer U14 2-3J17 Selects cable side operation voltage of Sets VCAB to +3.3V Sets VCAB to +5V 2-3U6 for parallel port J2JP12 Selects signal path for DAC5688 CDCM7005 output Y1A to DAC Connects DAC CLK1CB to LED 1-2CLK1B Connects CLK1CB D9.JP13 Selects signal path for DAC5688 CLK1 Connects CDCM7005 output Connects DAC CLK1C to 1-2Y1B to DAC CLK1C FPGA.SJP9 DDC input clock select ADC output clock to DDC FPGA output clock to DDC 1-2SJP8 DUC input clock select FPGA output clock to DUC CDCM7705 output clock to 1-2DUCSJP1 Selects +5V source for USB controller +5V sourced from board. +5V sourced from USB cable. 1-2U24SJP2 Selects +5V source for USB controller +5V sourced from board. +5V sourced from USB cable. 1-2U21

Table 3. Jumper J15 List

Jumper Function Location = +3.3V Location = GND Default

PLL_VDD Sets logic value of SYNC pin of DAC5688 Sets SYNC to GND Sets SYNC to +3.3V 1-2Sleep N/A N/A N/A Not UsedEXT_LO Sets logic value of EXTLO pin of DAC5688 Sets EXTLO to GND Sets EXTLO to +3.3V 7-8TXENABLE Sets logic value of TXENABLE pin of Sets TXENABLE to GND Sets TXENABLE to +3.3V 11-12DAC5688CDC_PD Sets logic value of Power Down pin of Sets PD to GND Sets PD to +3.3V 14-15CDCM7005

The TSW4100 contains an Altera EP2C8 Cyclone II™ FPGA (U10) and an Altera EPCS4™reprogrammable serial configuration PROM. The EPCS4 is pre-programmed to a default configuration. Toprepare the board for operation:1. Plug in the provided power supply to connector J3 and the other end to +110 VAC.2. Press the DAC RESET switch SW5 on the TSW4100 board.3. Ensure the FPGA is configured by verifying the D2 LED is on.4. Verify the CDCM7005 VCXO and reference clock are present (D4 and D5 LEDs are on).

This section describes the software installation procedures needed to operate the TSW4100:•Section 4.1 Installing the TSW4100 interface to the GC5016 CDC and DAC Software•Section 4.2 Installing the USB Driver Software•Section 4.3 Installing the MATLAB Runtime Engine•Section 4.4 Installing the TSW4100GUI Software

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4.1 Installing the TSW4100 Interface to GC5016 CDC and DAC Software

4.2 Installing the USB Driver Software

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Software Installation

The TSW4100 uses a modified version of the existing DAC5688 EVM LabView software program forwriting and reading to the DAC5688 and CDCM7005. This software is separate from the TSW4100software used to design and load GC5016 filter configurations.

Note: Once all software is loaded, TI recommends the host computer be restarted. This softwarehas been verified to be functional for the Windows 2000 and Windows XP operatingsystems.

1. Copy the folder TSW4100_DAC_CDC_Installer found on the TSW4100 Installation CD-ROM to atemporary directory on the host PC.2. Double-click the setup.exe filename found under this directory.3. Follow the standard Windows Installation procedure that includes accepting the License Agreementand using the default installation directory.

CAUTION

Do not start the software after completing the installation.

The USB interface adapter provides an additional, dedicated PC IP address to connect to the TSW4100IP address. To install this adapter:1. Plug in one of the USB cables between J25 of the TSW4100 board and a PC. The software shouldrecognize the connection and ask for drivers.2. After the Welcome to the Found New Hardware Wizard message displays, select the No, not at thisTime option.3. Select the Install from a list or specific location (advanced) option.4. If asked, click on the Don't' search. I will choose the driver to install option.5. If a window opens with the following driver name Texas Instruments TSW4100 DAC and CDCController, select this then click next. If this does not appear, navigate to the C:\ProgramFiles\TSW4100_DAC_CDC\TSW4100 Drivers directory.6. Click Open.7. The software loads the drivers in this directory. When prompted, select the Continue anyways option.8. Complete the USB driver installation. If the driver cannot be found, click on the option Don't search. Iwill choose the driver to install. Click Next.9. A new widow should open with a couple of options to choose from. Select TSW4100 DAC and CDCController. Click Next.10. Repeat steps 6 and 7. This completes the TSW4100 DAC and CDC driver installation.11. Copy the folder TSW4100_GC5016 Drivers found on the TSW4100 Installation CD-ROM to atemporary directory on the host PC.12. Plug in the other USB cable between J26 of the TSW4100 board and a PC. The software shouldrecognize the connection and ask for drivers.13. After the Welcome to the Found New Hardware Wizard message displays, select the No, not at thisTime option.14. Select the Install from a list or specific location (advanced) option.15. Navigate to the TSW4100_GC5016 Drivers directory.16. Click Open.17. The software loads the drivers in this directory. When prompted, select the Continue anyways option.18. Complete the USB driver installation.

SLWU052A – December 2007 – Revised September 2008 TSW4100EVM 7Submit Documentation Feedback

4.3 Installing the MATLAB Runtime Engine

Software Installation

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This section helps you install the MATLAB Runtime engine which is used to run the provide MATLABexecutable code.1. Double-click on the MCRInstaller.exe file located on the TSW4100 installation CD. The Choose SetupLanguage (Figure 2 ) displays. Click OK for English (United States).

Figure 2. Choose Setup Language

2. When the MATLAB Component Runtime 7.5 screen (Figure 3 ) displays, click Next.

Figure 3. MATLAB Welcome Screen

3. For the Customer Information (Figure 4 ) screen, specify the User Name,Organization, select thedesired user option button, and click Next.

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Software Installation

Figure 4. Customer Information

4. When the Destination Folder screen (Figure 5 ) displays, click Next to install the MATLAB software inthe default directory.

Figure 5. Destination Folder

5. When the Ready to Install the Program screen (Figure 6 ) displays, click Install to begin the installation.The installation lasts approximately five minutes.

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Software Installation

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Figure 6. Ready to Install the Program

6. Click Finish once the InstallShield Wizard Completed screen (Figure 7 ) displays.

Figure 7. InstallShield Wizard Completed

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