Texas Instruments TPS65023EVM Manuale utente

1 Introduction

1.1 Requirements

1.1.1 Personal Computer

User's GuideSLVU193 – December 2006

TPS65023EVM

This user’s guide describes the characteristics, operation, and use of theTPS65023EVM-205 evaluation module (EVM). This EVM is designed to help the userevaluate and test the various operating modes of the TPS65023. This user’s guideincludes setup instructions for the hardware and software, a schematic diagram, a billof materials, and PCB layout drawings for the evaluation module.

Related Documentation From Texas InstrumentsTPS65023, Power Management IC For Li-Ion Powered Systems data sheet(SLVS670 )

Contents1 Introduction .......................................................................................... 12 Setup ................................................................................................. 23 Board Layout ........................................................................................ 44 Schematic and Bill of Materials ................................................................... 9

List of Figures

1 Assembly Layer ..................................................................................... 52 Top Layer Routing .................................................................................. 63 Layer 2 Routing, GND Plane ...................................................................... 74 Layer 3 Routing, Vin Plane ........................................................................ 85 Bottom Layer Routing .............................................................................. 96 Figure 6. TPS65023EVM-205 Schematic ...................................................... 10

List of Tables

1 TPS65023EVM-205 Bill of Materials ........................................................... 10

The Texas Instruments TPS65023EVM is an integrated power management IC for applications that arepowered with one Li-ion or Li-polymer cell and require multiple power rails. The TPS65023 contains threehighly efficient switching step-down converters, two LDOs, and additional status and I/O pins. The deviceis controlled via an I

C interface (HPA172).

In order for this EVM to operate properly, the following components must be connected and properlyconfigured.

A computer with a USB port is required to operate this EVM. The TPS65023 interface software, which isrun on the personal computer (PC), communicates with the EVM via the PC USB port. The user sendscommands to the EVM as well as reads the contents of the TPS65023 internal registers through the USBport.

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1.1.2 Printed Circuit Board Assembly

1.1.3 USB to I

C Adapter

1.1.4 Software

2 Setup

2.1 Input/Output Connector Descriptions

Setup

The TPS65023EVM-205 PCB contains the TPS65023 IC and its required external components. Thisboard contains several jumpers and connectors that allow the user to customize the board for specificoperating conditions.

The HPA172 is the link that allows the PC and the EVM to communicate. The adapter connects to the PCwith the supplied USB cable on one side and to the EVM though the supplied ribbon cable on the other.When the user writes a command to the EVM, the interface program, which is run from the PC, sends thecommand to the PC USB port. The adapter receives the USB command and converts the signal to an I

Cprotocol. It then sends the I2C signal to the TPS65023 board. When the user reads a status register fromthe EVM, the PC sends a command to read a register on the EVM. When the EVM receives thecommand, it reports the status of the register via the I2C interface. The adapter receives the informationon the I2C interface, converts it to a USB protocol, and sends it to the PC.

Texas Instruments provides software to assist the user in evaluating this EVM. To install the software,insert the enclosed CD into your computer. The software should start automatically. If it does not, go to<Start>, <Run>, and type D:\setup.exe, and click <OK> (assuming that D: is your CD drive). Check theTPS65023 product folder on the TI Web site for the latest version of the software.

This section describes the jumpers and connectors on the EVM, as well as how to properly connect, setup, and use the TPS65023EVM-205.

J1 – VIN

Input voltage from external power supply, recommended maximum 5.5 V. Input current dependson load but typically is less than 2 A.J2 – GND

This is the return connection for VIN.J3 – VINLDO/GND

Input voltage and return for LDO1 and LDO2C. Resistor R20 connects this pin to VDCDC1. If anexternal power supply is used, remove R20. Recommended maximum input voltage is 5.5 V.J4 – VSYSIN/GND

Input voltage and return for VSYSIN, one of the input voltages for RTC. Resistor R21 can beused to connect this input to VDCDC1. If an external power supply is used, remove R21.Recommended maximum input voltage is 4 V.J5 – VBACKUP/GND

Input voltage and return for VBACKUP, one of the input voltages for RTC. There are no onboardconnections to a voltage input. Recommended maximum input voltage is 4 V.J6 – VRTC/GND

Output voltage from RTC circuit.

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Setup

J7 – Fault Outputs

Four fault outputs are available on this connector:PWRFAIL– Fault occurs when input voltage is less than 3 V. Pulled up to VRTC when safe; lowfor fail.INT– Fault occurs when there is a fail on an input or output voltage; acts as a sum fail. Pulled upto VIN when safe; low for fail.RESPWRON– Low reset signal controlled by SW1, 144 ms. Pulled up to VIN normally.LOWBAT– Fault occurs when input voltage is less than 3.6 V. Pulled up to VIN when safe; lowfor fail.J8 – USB

This header duplicates the signals from the J20 interface connector.J9 – VDCDC1

Output from DCDC1 switching regulator maximum output current 1.2 A; default voltage setting is3.3 V.J10 – GND

Return for VDCDC1.J11 – VDCDC2

Output from DCDC2 switching regulator; maximum output current 1 A, default voltage setting is2.5 V.J12 – GND

Return for VDCDC2J13 – VLDO1

Output from low dropout regulator VLDO1; maximum output current 200 mA, default value 1.1 V.J14 – GND

Return for VLDO1J15 – VLDO2

Output from low dropout regulator VLDO2; maximum output current 200 mA, default value 1.3 V.J16 – GND

Return for VLDO2.J17 – VDCDC3

Output from switching regulator DCDC3; maximum output current 800 mA, default value 1.55 V.J18– GND

Return for VDCDC3.J19 – USB

USB interface connector..JP1 – DEF1

Sets default voltage for DCDC1, 1.2 V or 1.6 V.JP2 – DEF2

Sets default voltage for DCDC2, 3.3 V or 1.8 V.JP3 – DEF3

Sets default voltage for DCDC3, 3.3 V or 1.8 V.

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2.2 Setup

3 Board Layout

3.1 Layout

Board Layout

JP4 – DCDC1 ON/OFF

EN for DCDC1 converter; default setting is ONJP5 – DCDC2 ON/OFF

EN for DCDC2 converter; default setting is ON.JP6 – DCDC3 ON/OFF

EN for DCDC3 converter; default setting is ON.JP7 – LDO ON/OFF

EN for both LDO1 and LDO2 regulators; default setting is ON.JP8 – DEFLDO1

Sets default voltage for LDO1 and LDO2 in combination with DEFLDO2. (See SLVS670 , Table3.)JP9 – DEFLDO2

Sets default voltage for LDO1 and LDO2 in combination with DEFLDO1. (See SLVS670 , Table3.)S1 – HOT_RST

S1 is a normally open, momentary pushbutton switch that, when pressed, connects theHOT_RST input of the TPS65023 to GND, generating the HOT_RESET pulse. HOT_RESET pinis pulled up externally.

The following steps must be followed before the EVM can be operated.1. Install the TPS65023EVM software.2. Connect input voltages and loads to the EVM.3. Configure all EVM jumpers to factory setting.

JP4–ON JP1–1.6V JP3–1.8VJP2–1.8V JP5–ON JP6–ONJP7–ON JP9–High JP8–High

4. Connect the ribbon cable between the EVM and the USB-TO-GPIO (HPA172) adapter.5. Connect the USB cable between the computer and the HPA172EVM.6. Turn on all supplies.7. Run the TPS65023EVM software

This section provides the TPS65023EVM-205 board layout and illustrations.

Board layout is critical for all switch mode power supplies. Figure 1 through Figure 5 show the board layoutfor the TPS65023EVM-205 PWB. The nodes with high switching frequencies and currents are short andare isolated from the noise-sensitive feedback circuitry. Careful attention has been given to the routing ofhigh-frequency current loops. See the data sheet for specific layout guidelines.

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Board Layout

Figure 1. Assembly Layer

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Board Layout

Figure 2. Top Layer Routing

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Board Layout

Figure 3. Layer 2 Routing, GND Plane

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Board Layout

Figure 4. Layer 3 Routing, Vin Plane

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4 Schematic and Bill of Materials

Schematic and Bill of Materials

Figure 5. Bottom Layer Routing

This section provides the TPS65023EVM-205 schematic and bill of materials.

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4.1 Schematic

4.2 Bill of Materials

Schematic and Bill of Materials

Figure 6. Figure 6. TPS65023EVM-205 Schematic

Table 1. TPS65023EVM-205 Bill of Materials

Count RefDes Value Description Size Part Number MFR

9 C1, C2, C4, 10 µF Capacitor, ceramic, 6.3 V, X5R, 10% 0805 C2012X5R0J106K TDKC9–C11,

C14–C16

2 C12, C13 2.2 µF Capacitor, ceramic, 6.3 V, X5R, 10% 0603 C1608X5R0J225K TDK4 C3, C6, C7, C17 1.0 µF Capacitor, ceramic, 6.3 V, X5R, 10% 0603 C1608X5R0J105K TDK1 C5 1500 pF Capacitor, ceramic, 50 V, X7R, 10% 0603 C1608X7R1H152K TDK

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