Anritsu SQA-R MP1900A Manuale utente

Signal Quality Analyzer-R

MP1900A

PCIe/USB/Thunderbolt Test Solutions*

Product Brochure

*: Refer to the 32G/64G NRZ/PAM4 Signal Integrity Test Solution

Catalog (MP1900A_64G-E-A-1) for the information on MP1900A

PAM4 test solution.

Due to the explosive growth of data traﬃc resulting from the popularity of smartphones

and mobile terminals, network interfaces are transitioning to faster 200 GbE/400 GbE

standards, and PCI bus interface speeds now exceed 10G. In addition, the equipment

and chipsets using these interfaces support multi-channels and multi-protocols.

The MP1900A is a high-performance BERT with excellent expandability for supporting

Physical layer evaluations of these high-speed interfaces. The all-in-one design is ideal

for early stage R&D evaluations of all interfaces covering next-generation Ethernet

networks to bus interconnects.

Support 400 GbE/800 GbE and PCIe Gen4/5

Signal Quality Analyzer-R

MP1900A

Wide Application Support

100 GbE/200 GbE/400 GbE/800 GbE, CEI-25G/28G/56G/112G, InﬁniBand EDR/HDR, Fibre Channel

PCI Express Gen 1/2/3/4/5, Thunderbolt 1/2/3, USB3.2/4 Type C, SAS-3/-4, DP1.4

Optical module, SERDES, AOC, High-speed Interconnect

Excellent Expandability

Link Training

Signal Integrity

Evaluation

All-in-one support for both high-speed Ethernet

and PCI Express interface tests

Supports transmissions up to 512 Gbit/s

・32G bandwidth : 16ch NRZ, 8ch PAM4

・64G bandwidth : 4ch NRZ, 4ch PAM4

8 slots for adding extra modules

Backwards compatibility with

MP1800A series modules

Receiver tests are supported by the built-in

Protocol Awareness PCIe Link Training, USB

Link Training and LTSSM analysis functions.

Supports PCI Express Gen 1/2/3/4/5

USB3.2 Gen1/2

High Waveform Quality

and High Sensitivity

Low Intrinsic (Residual) Jitter output (115 fs rms)

High-sensitivity Data input (15 mV)

Operation bit rates from 2.4 Gbit/s to 32.1 Gbit/s

10Tap Emphasis built-in

Variable ISI Function

Multi-band CTLE

CDR Function (supports SSC)

Jitter Addition (SJ/RJ/BUJ/SSC) function

Voltage Noise Addition

(CM/DM/Gaussian) function

Certified for

PCIe Gen3/4

USB3.2

Thunderbolt3

PCIe Gen5

USB4

Compliance Test

Ready

Due to the explosive growth of data traﬃc resulting from the popularity of smartphones

and mobile terminals, network interfaces are transitioning to faster 200 GbE/400 GbE

standards, and PCI bus interface speeds now exceed 10G. In addition, the equipment

and chipsets using these interfaces support multi-channels and multi-protocols.

The MP1900A is a high-performance BERT with excellent expandability for supporting

Physical layer evaluations of these high-speed interfaces. The all-in-one design is ideal

for early stage R&D evaluations of all interfaces covering next-generation Ethernet

networks to bus interconnects.

Support 400 GbE/800 GbE and PCIe Gen4/5

Signal Quality Analyzer-R

MP1900A

Wide Application Support

100 GbE/200 GbE/400 GbE/800 GbE, CEI-25G/28G/56G/112G, InﬁniBand EDR/HDR, Fibre Channel

PCI Express Gen 1/2/3/4/5, Thunderbolt 1/2/3, USB3.2/4 Type C, SAS-3/-4, DP1.4

Optical module, SERDES, AOC, High-speed Interconnect

Excellent Expandability

Link Training

Signal Integrity

Evaluation

All-in-one support for both high-speed Ethernet

and PCI Express interface tests

Supports transmissions up to 512 Gbit/s

・32G bandwidth : 16ch NRZ, 8ch PAM4

・64G bandwidth : 4ch NRZ, 4ch PAM4

8 slots for adding extra modules

Backwards compatibility with

MP1800A series modules

Receiver tests are supported by the built-in

Protocol Awareness PCIe Link Training, USB

Link Training and LTSSM analysis functions.

Supports PCI Express Gen 1/2/3/4/5

USB3.2 Gen1/2

High Waveform Quality

and High Sensitivity

Low Intrinsic (Residual) Jitter output (115 fs rms)

High-sensitivity Data input (15 mV)

Operation bit rates from 2.4 Gbit/s to 32.1 Gbit/s

10Tap Emphasis built-in

Variable ISI Function

Multi-band CTLE

CDR Function (supports SSC)

Jitter Addition (SJ/RJ/BUJ/SSC) function

Voltage Noise Addition

(CM/DM/Gaussian) function

Certified for

PCIe Gen3/4

USB3.2

Thunderbolt3

PCIe Gen5

USB4

Compliance Test

Ready

Excellent Expandability

All-in-One Support for Evaluating Next-Generation NRZ/PAM4 Network Interfaces and High-Speed Serial Buses

The Signal Quality Analyzer–R MP1900A is a modular Bit Error Rate Tester (BERT) supporting equipment external interfaces, such as next-generation

Ethernet, by installing a pulse pattern generator (PPG) for outputting high-quality multi-channel NRZ/PAM4 signals over a wide bandwidth, a high-

sensitivity input error detector (ED), Jitter modulation sources for Jitter Tolerance tests, etc.

Additionally, optional noise generation and 10Tap Emphasis functions can be installed for Voltage Noise Tolerance tests, etc., and installing the

High-Speed Serial Data Test Software software enables efficient design evaluation for increasingly faster PCIe, USB, Thunderbolt, SAS and DP receivers.

NIC,Controllers

& HBAs

Storage device

SSD

PCI Express Switch

Server/Storage Racks

MP1900A

Link Training

LTSSM Analysis

Jitter Tolerance

PCI Express

Gen 1 to 5

SAS-3/-4

100 GbE

200 GbE

400 GbE

800 GbE

28G NRZ/PAM4

56G NRZ/PAM4

Network Racks

Optical Transceivers

Serdes,Gear Box

Ethernet

Evaluation

PCI Express

Evaluation

One Unit Supporting Evaluation of

both High-Speed Network Devices and High-Speed Serial Buses

MP1900A

High Cost Performance

Space Factor Improvement

Shorter Inspection Time

Excellent Expandability

Easy Flexibility for Multi-Channel Measurements at Various Transmission Rates and Formats

400 GbE is the standard for the next generation of large-capacity transmissions but it is still unknown how much further data traffic will grow. To

cope with this data traffic growth, in addition to speeding-up NRZ signals and introducing multi-channel signalling, introduction of PAM4-format

signals is also progressing. To facilitate this change to multi-channels and the new PAM4 signals, the MP1900A series is an 8-slot modular

instrument that can be easily customized by selecting and adding required function modules. This flexible expandability supporting the latest

communications methods ensures both efficient R&D investment and the fastest time to market.

In addition to installing PPG, ED, and noise-generation modules in the 8-slot main unit, existing modules for the previous MP1800A series can also

be installed. The 21G/32G bit/s SI PPG/ED modules support selection of both one and two channels, enabling up to 16-channel measurement for

both the PPG and ED. The PAM4 PPG and ED modules can be installed simultaneously to support up to a 4ch PPG and 4ch ED in a one channel per

module configuration. Moreover, the pattern for each channel can be synchronized, providing an ideal solution for evaluating DAC, MUX and

DEMUX devices as well as for crosstalk and skew tolerance tests.

*: Refer to the MP1900A Selection Guide (MP1900A-E-Z-1) for details of the supported multi-channel configurations and module combinations.

Consult our business sales representative for use of other module configurations not described in the MP1900A Selection Guide.

PRBS7 PRBS7 PRBS7

Differential

16ch

MP1900A

Pattern Sync Output

• NRZ (Max. 32 Gbit/s at 1ch)

16ch

8ch

4ch

2ch

1ch

256 Gbit/s 512 Gbit/s

PCIe 3.0 PCIe 4.0 PCIe 5.0

8 GT/s 16 GT/s 32 GT/s

1ch PAM4 PPG/ED

2.4 Gbit/s USB3.2 USB4, TBT3 32.1 Gbit/s

10 Gbit/s 20 Gbit/s

• NRZ (Max. 64 Gbit/s at 1ch)

4ch

1ch

128 Gbit/s 256 Gbit/s

• PAM4 (Max. 64 Gbaud at 1ch)

4ch

1ch

256 Gbit/s 512 Gbit/s

*: Refer to the 32G/64G NRZ/PAM4 Signal Integrity Test Solution Catalog

(MP1900A_64G-E-A-1) for details of PAM4 PPG/ED.

SI PPG/ED Module Expandability PAM4 PPG/ED Expandability*

Storage Receiver Test

(SAS-3/-4)

Receiver Jitter Tolerance Test

PCIe Gen3/4/5 Receiver Test

Base Specification

• Stressed Eye Test

CEM Specification

• Transmitter initial Tx Equalization

• Transmitter Link Equalization response

• Receiver Link Equalization

• PLL Bandwidth

USB Type-C Receiver Test

(USB4, Thunderbolt3, DP1.4)

Receiver Test

SJ Margin Test

Amplitude Margin Test

USB 3.2 Gen1/2 Receiver Test

Transmitter Eye Test

Receiver Jitter Tolerance Test

All-in-One

Test Support

MP1900A

Jitter Tolerance Test

SJ/RJ/BUJ Injection

Low-rate estimated BER measurement

General Interfaces

CEI-28G/56G/112G

InfiniBand

100G/400G/800G Ethernet

Fibre Channel

PCI Express

PCIe-Gen1, 2, 3, 4, 5

Storage Device

SAS-3/-4

USB3.2、

USB Type-C

(Thunderbolt3 DP1.4)

USB

Target Applications

Next-Generation High-Speed Digital Interface Receiver Test

The growth of IoT and Cloud computing applications is driving the need for digital equipment with high-speed serial interfaces handling large data

volumes. To meet this need, the PCI Express (PCIe) and USB interfaces used by this digital equipment are transitioning to both next-generation PCIe

Gen5 supporting speeds up to 32 GT/s as well as to Type-C USB3.2 Gen2 supporting 10 Gbit/s and USB4 supporting 20 Gbit/s, which is also

compatible with Thunderbolt.

The MP1900A is a wideband BERT with a built-in Gbit/s-class PPG, ED, and Jitter/Noise addition functions as well as application software supporting

measurement of next-generation, high-speed digital-interface standards (CEI-28G/56G/112G, InfiniBand, 100G/400G/800G Ethernet, Fibre Channel,

Thunderbolt 3, PCIe, USB, SAS, DP) from development through to manufacturing.

Various Applications

Internal and external interfaces, such as Ethernet,

PCIe, and SAS, are supported along with USB3.2, 3.4,

and Thunderbolt via USB Type-C connectors and

cables, and Display Port.

MP1900A supports PCIe 3.0, 4.0 and 5.0 as well as

SAS using the same configuration.

Multi Interface

Full Automation

Full Automation Software

Automation software for automating receiver tests of high-speed serial bus interfaces controls the MP1900A (PPG/ED, noise signal source, variable

ISI channel) and real-time oscilloscope to automate calibration of signals required for complex operations, Jitter Tolerance tests, and creation of

reports. The high-reproducibility, easy measurements greatly reduce the work load of test engineers.

Features

• Controls each measuring instrument to simplify calibration, measurement conditions settings, and test execution

• Calibrates test signal and executes receiver test with high reproducibility

• Automates standards-compliant Jitter and amplitude Pass/Fail evaluations

• Selectable Various Oscilloscope

Selectable Various Oscilloscope

Real-time oscilloscopes from the main makers can be used in combination with the MP1900A to calibrate test signals, helping cut capital investment

costs by making efficient use of owned assets.

Refer to the Selection Guide (MP1900A-E-Z-1) for the combination of supported real-time oscilloscopes and automation software.

Customers’ Real-Time Oscilloscope

MP1900A

Vendor K

High Performance BERT

Automation Software

Selectable Various Ocilloscopes

SI PPG/ED Signal Integrity Evaluation

Strengthened Signal Integrity Evaluations in Addition to New SI PPG, SI ED and Noise Generator Modules

Emphasis and equalizer functions are built-in to correct transmission path losses and assure signal integrity as signals become faster and as high-

speed devices use lower signal levels to help reduce power consumption.

10Tap Emphasis

The 10Tap Emphasis option installed in the transmission-side21G/32 Gbit/s SI PPG MU195020A can accurately replay simulated waveforms for

various devices and channels (corrected for loss after passage through channel) to help improve design efficiency.

Multi-band CTLE

Installing the CTLE option supporting multi-band input signals of 28, 16, and 8 Gbit/s at the receive-side of the 21G/32G bit/s SI ED MU195040A

permits BER measurements even when the Eye is closed by transmission path losses. Since this CTLE function is a hardware equalizer rather than the

software emulator, it supports evaluation of TRx BER performance under near-to-live conditions, such as BER evaluation of test signals, and

comparison of DUT BER measurement results.

3-band CTLE Block Image

Waveform adjustment using 10Tap Emphasis Function

ISI Setting Screen Example

Emphasis Setting Screen Example

ISI, CEI-28G, 14 dB Loss waveform (typical)

Data Input BER Measurement

Waveform after passage through 28 Gbit/s,

–10 dB @ 14 GHz channel

28 Gbit/s open Eye waveform using CTLE

28 Gbit/s

16 Gbit/s

8 Gbit/s

4 GHz

8 GHz

14 GHz

Additionally, the Variable ISI (option) can generate a signal with simulated Loss between the Tx and Rx channels of high-speed devices by setting the

channel Loss for the frequencies defined in CEI-28 G/25G and the S-parameter information, and can also easily output a Loss-corrected waveforms.

As a result, channel-Loss dependent high-speed device performance tests can be run easily with good reproducibility without needing to prototype

multiple channel boards, helping cut development time.

*For Variable ISI (option), use either in combination with ISI Board J1758A (select J1758A) or in combination with external channel board (select Not Specified).

SI PPG/ED Signal Integrity Evaluation

Jitter/Noise Addition

To perform DUT receiver stressed input tolerance tests, the BER is measured under the worst conditions using a stressed signal with added jitter and

voltage noise. Using the MP1900A series with the Jitter Modulation Source MU181500B, Jitter Tolerance Test MX183000A-PL001 software, and Noise

Generator MU195050A for adding CM/DM/White Noise supports receiver tolerance tests in conformance with the various interface standards. The

MP1900A series offers strong support for receiver stressed input tolerance tests by generating high-quality signals before jitter and noise addition as

well as for adding high-linearity jitter and noise.

Low Error Rate Estimation BER Measurements

Jitter Tolerance Test Function (MX183000A-PL001)

• High-versatility Jitter Tolerance measurements

• PHY Device Jitter Tolerance tests by impressing SJ/RJ/BUJ

• Standards-compliant Mask measurements

• Fast measurement times using low error rate estimation function, such

as 1E–12 and 1E–15

• Tolerance measurements versus device characteristics using four

Binary, Upward, Downward, Binary + Linear methods

Sinusoidal Jitter (SJ) CM/DM NoiseRandom Jitter (RJ) White Noise

DUT Rx

DUT Tx

Asynchronous

Clock

PCB Trace

10Tap Emphasis

Variable ISI

Jitter/Noise Addition

Multi-band CTLE

Built-in Clock Recovery

GHz

SI PPG/ED Link Training

The PCI Express and 10 Gbit/s USB3.2 standards require PHY layer tests

such as Jitter Tolerance tests on an established Link to assure

interconnectivity between the host and device. Additionally, it is

necessary to determine whether the cause is a physical or logical fault

at a Link fault.

The MP1900A PCI Express/USB functions have Protocol Awareness with

a Link Training function required for evaluating the PHY layer as well as

an analysis function for detecting each LTSSM state transition to help

troubleshoot faults. When more detailed debugging is required, the

training sequence generation timing can be adjusted using the

Sequence Editor function (MU195020A-050).

These all-in-one functions facilitate efficient PHY layer evaluation of

PCIe Gen1 to Gen5 and USB3.2 receivers through inspection and fault

troubleshooting.

Moreover, combination with the Jitter Tolerance Measurement function

(MX183000 A-PL001) supports consistent receiver tests of high-speed

serial interfaces.

LTSSM: Link Training Status State Machine

Supports physical layer measurements of add-in cards and system

boards

• Tx LEQ: Transmitter Link Equalization response Test

• Rx LEQ: Receiver Link Equalization Test

• Receiver Jitter Tolerance Test

MP1900A DUT

Transcation Transcation

Data Link Data Link

Physical Physical

Rx Tx TxRx

Logical Sub-block Logical Sub-block

Electrical Sub-block

ED PPG

Link Training

PCI Express Link Training (MX183000A-PL021/PL025)

PCIe Link Training State Transition

USB Link Training State Transition

LTSSM Log of each LTSSM State Transition

USB Link Training (MX183000A-PL022)

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