Intersil ISL28470EVAL1Z Manuale utente

AN1289.0

ISL28470EVAL1Z Evaluation

Board User’s Guide

Introduction

The ISL28470EVAL1Z evaluation board is a design platform

containing all the circuitry needed to characterize critical

performance parameters of the ISL28470 Quad

Instrumentation Amplifier using a variety of user defined test

circuits.

The ISL28470 is a quad channel instrumentation amplifier

optimized for 2.4V to 5V single supplies. The device features

an Input Range Enhancement Circuit (IREC) which

maintains CMRR performance for input voltages equal to the

positive supply and down to 50mV above the negative

supply rail. The input signal is capable of swinging above the

positive supply rail and to the negative supply with only a

slight degradation of the CMRR performance. The output

operation is rail to rail. The ISL28270 is compensated for a

minimum gain of 100.

Reference Documents

• ISL28470 Data Sheet, FN6260

Evaluation Board Key Features

The ISL28470EVAL1Z is designed to be operated from a

single supply (+2.4VDC to +5VDC), or from split supplies

(±1.2VDC to ±2/5V). The board is configured for 4

independent instrumentation amplifiers connected for a

closed loop gain of 101 with inverting and non-inverting high

impedance terminated with 100k resistors to ground. Each

amplifier contains it’s own VREF input to establish an input

common mode reference. An ENABLE select switch is

provided for each amplifier to be used to save power by

powering the device down.

Power Supplies (Refer to Figure 1)

External power connections are made through the +V, -V

and Ground connections on the evaluation board. For single

supply operation, the -V and Ground pins are tied together to

the power supply negative terminal. For split supplies, +V

and -V terminals connect to their respective power supply

terminals. De-coupling capacitors, C1and C2, connect to

ground through R1 and R2, 0Ωresistors. Resistors R3and

R4are 0Ωbut can be changed by the user to provide power

supply filtering, or to reduce the voltage rate-of-rise to less

than ±1V/µs. Anti-reverse diodes D1and D2protect the

circuit in the case of accidental polarity reversal.

FIGURE 1. POWER SUPPLY CIRCUIT

C10

R1C1

J3J2J1

GND V-V+

V-

V+

0.1µF 0.1µF

004.7µF 4.7µF

IN+

IN-

FB+

FB-

VREF(x)

IN+(x)

IN-(x)

GND 100kΩ

1kΩ

100kΩ

100kΩVOUT(x)

1/4 ISL28470

-V

ENABLE

10kΩ

0Ω

VCM

IN+

IN-

VREF

FIGURE 2. BASIC AMPLIFIER CONFIGURATION

Application Note February 12, 2007

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

2AN1289.0

February 12, 2007

Amplifier Configuration (Figure 2)

The schematic of each of the 4 Op Amps with the

components supplied is shown in Figure 2. The circuit

implements a differential input instrumentation amp with a

closed loop gain of 101. The circuit can operate from a

single 2.4VDC to +5VDC supply, or from dual supplies from

±1.2VDC to ±2.5VDC.The output common mode reference

is applied to the VREF pin, and has a range from ground

(VM) to VP.

User-selectable Options (Figure 3)

Component pads are included to enable a variety of user-

selectable circuits to be added to the amplifier differential

inputs, the VREF input, and the amplifier feedback loop. A

voltage divider and filter option can be added to establish a

power supply tracking common mode reference at the VREF

input, or a coaxial connection to the ISL28470 FB+ pin can

be made at the FB+ BNC connector. The differential inputs

have additional resistor placements for adding input

attenuation, or to establish input DC offsets through the

VREF pin. FIGURE 3. COMPONENT-SELECTABLE OPTIONS

R6R5

C3OPEN

DNPDNP VREFA

V+V-

VREFA

R13 R15

R17

R18

R21

R22 R23

R20

R19

R16

R14

J10

FB+A

-INA

+INA 0

DNP DNP DNP

DNP

100k

VREFA

ISL28470EVAL1Z Components Parts List

DEVICE # DESCRIPTION COMMENTS

C1, C2CAP-TANTALUM, SMD, D,4.7µF, 50V, 10%, LOW ESR, ROHS Power Supply Decoupling

C7, C8CAP, SMD, 0603, 0.01µF, 25V, 10%, X7R, ROHS Power Supply Decoupling

C9, C10 CAP, SMD, 0805, 0.1µF, 25V,10%, X7R, ROHS Power Supply Decoupling

C3-C6CAP, SMD, 0805, DNP-PLACE HOLDER, ROHS Optional VREF Filter

Not Populated

C11-C18 CAP, SMD, 0805, DNP-PLACE HOLDER, ROHS Optional Amplifier Feedback Caps

Not Populated

D1, D2DIODE-RECTIFIER, SMD, MELF, 2 Ld, 50V, 1A, GPP, ROHS Reverse Power Protection

U1 ISL28470FAZIC INSTRUMENTATION AMP, 28P, QSOP,

ROHS

R13, R14-R16, R19, R22, R24-R27, R30, R33,

R35-R38,R41, R44, R46-R49, R52, R55, R69,

R71, R73, R75

RESISTOR, SMD, 0603, 0.1%, MF, DNP-PLACE HOLDER User Selectable Resistors

Not Populated

R18, R21, R29, R32, R40, R43, R51, R54, R58,

R60, R63, R66 RES, SMD, 0603, 0Ω, 1/16W, TF, ROHS 0ΩUser Selectable Resistors

R17, R28, R39, R50 RES, SMD, 0603, 1k, 1/10W, 1%, TF, ROHS RGGain Resistors

R59, R61, R65, R67, R70, R72, R74, R76 RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS

R20, R23, R31, R34, R42, R45, R53, R56, R57,

R62, R64, R68 RES, SMD, 0603, 100k, 1/10W, 1%, TF, ROHS RFGain Resistors

R1-R4RES, SMD, 0805, 0Ω, 1/8W, TF, ROHS 0ΩUser Selectable Resistors

R5-R12 RES, SMD, 0805, DNP-PLACE HOLDER, ROHS User Selectable Resistors

Not Populated

S1-S4SWITCH-SEALED MINI TOGGLE, TH, 3P, SP, ON/NONE/ON,

GOLD Enable/Disable Select Switches

Application Note 1289

3AN1289.0

February 12, 2007

Application Note 1289

ISL28470EVAL1Z Top View

Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to

verify that the Application Note or Technical Brief is current before proceeding.

For information regarding Intersil Corporation and its products, see www.intersil.com

AN1289.0

February 12, 2007

ISL28470EVAL1Z Schematic Diagram

VREFAVREFD VREFC VREFB

V+

GND

V-

VOUT A

VOUT B

VOUT C

VOUT D

+IND

-IND

FB+D

+INC

-INC

FB+C

+INB

-INB

FB+B

+INA

-INA

FB+A

DISABLE

END

ENC

ENA

ENB

ENABLE

DISABLE

ENABLE

DISABLE

ENABLE

VREFD

R21

ROBERT POSPISIL

ISL28470EVAL1Z

R58

10K

R59

OPEN

C12

R57

100K

C11

OPEN

J20

J21

R60

R61

10K

OPEN

C14

R63

R65

10K

J22

OPEN

C16

R66

OPEN

C18

R67

10K

J23

R68

100K

C17

OPEN

C15

100K

R64

OPEN

C13

100K

R62

0.01UF

R15

R16

DNP

R17

R14

DNP

R13

J10

J11

J12 R29

R25

DNP

R24

R22

DNP

R23

100K 100K

R20

DNP

R19

R18

VREFA

VREFB

DNP

R27

R26

DNP

R28

100K

R31

DNP

R30

J13 R32

R33

DNP

R34

100K

DNP

R37

R38

R39

R36

DNP

R35

J14

J15

J16 R43

R40

R41

DNP

R42

100K

VREFC

100K

R45

DNP

R44

J17

J18

J19

R46

DNP

R47

R51

R52

DNP

R53

100K

R48

DNP

R50

R49

DNP

100K

DNP

R55

R54

R56

SSOP28

R69

DNP

R70

10K

R72

10K

R71

DNP

R74

10K

DNP

R73

R75

DNP

R76

10K

R1 C1

C10

0.1UF 0.1UF

4.7UF4.7UF

J2J3

DNPDNP

OPEN

DNP

OPEN

DNP

R10

R11

DNP

OPEN

DNP

R12

DNP

VREFA

VREFBVREFCVREFD

V-

V+ V- V+ V- V+ V-

V+

V-V+

VP VM

TITLE:

ENGINEER:

DRAWN BY:

SHEE

DATE

REV:

DAT

DESCRIPTION

LTR

ZONE

Generic

Pack.

M28.15

Application Note 1289

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